alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

fix(pm): mspi cannot access flash when pd pll source

Browse Source
This commit is contained in:
Lou Tianhao 2024-08-28 20:21:26 +08:00
parent d4447739a9
commit 46af50ee5a
3 changed files with 8 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
components/esp_hw_support/mspi_timing_tuning.c
View File

@ -28,7 +28,7 @@
#include "hal/spimem_flash_ll.h" #include "hal/spimem_flash_ll.h"
#endif #endif
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464 #if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 // TODO: IDF-10464
#include "hal/mspi_timing_tuning_ll.h" #include "hal/mspi_timing_tuning_ll.h"
#endif #endif
@ -469,7 +469,7 @@ void mspi_timing_psram_tuning(void)
void mspi_timing_enter_low_speed_mode(bool control_spi1) void mspi_timing_enter_low_speed_mode(bool control_spi1)
{ {
#if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464 #if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 // TODO: IDF-10464
mspi_ll_clock_src_sel(MSPI_CLK_SRC_XTAL); mspi_ll_clock_src_sel(MSPI_CLK_SRC_XTAL);
#else #else
spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_ROM_DEFAULT); spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_ROM_DEFAULT);
@ -509,7 +509,7 @@ void mspi_timing_enter_low_speed_mode(bool control_spi1)
void mspi_timing_enter_high_speed_mode(bool control_spi1) void mspi_timing_enter_high_speed_mode(bool control_spi1)
{ {
#if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464 #if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61// TODO: IDF-10464
mspi_ll_clock_src_sel(MSPI_CLK_SRC_SPLL); mspi_ll_clock_src_sel(MSPI_CLK_SRC_SPLL);
#else #else
spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_DEFAULT); spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_DEFAULT);

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
View File

@ -523,6 +523,10 @@ config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
bool bool
default y default y
config SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
bool
default y
config SOC_SYSTIMER_COUNTER_NUM config SOC_SYSTIMER_COUNTER_NUM
int int
default 2 default 2

1
components/soc/esp32c61/include/soc/soc_caps.h
View File

@ -319,6 +319,7 @@
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1 #define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
#define SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT 1
/*-------------------------- SYSTIMER CAPS ----------------------------------*/ /*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM 2 // Number of counter units #define SOC_SYSTIMER_COUNTER_NUM 2 // Number of counter units