wifi, bt: move esp_phy_common_clock_disable into periph_ctrl and put it into IRAM

Replace periph_module_enable/disable by periph_wifi_bt_common_module_enable which are in IRAM.
AddIRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rstandIRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rstto fit O0 optimization level.
Delete duplicated spinlock and counter.
This commit is contained in:
dongyou 2020-07-02 19:53:15 +08:00
parent bd72a9ab2b
commit 46691df851
3 changed files with 49 additions and 57 deletions

View File

@ -59,6 +59,29 @@ void periph_module_disable(periph_module_t periph);
*/
void periph_module_reset(periph_module_t periph);
/**
* @brief enable wifi bt common module
*
* @note If wifi_bt_common_module_enable is called a number of times,
* wifi_bt_common_module_disable has to be called the same number of times
* in order to put the peripheral into disabled state.
*
* @return NULL
*
*/
void wifi_bt_common_module_enable(void);
/**
* @brief disable wifi bt common module
*
* @note If wifi_bt_common_module_enable is called a number of times,
* wifi_bt_common_module_disable has to be called the same number of times
* in order to put the peripheral into disabled state.
*
* @return NULL
*
*/
void wifi_bt_common_module_disable(void);
#ifdef __cplusplus
}

View File

@ -21,6 +21,7 @@
#include "sdkconfig.h"
static portMUX_TYPE periph_spinlock = portMUX_INITIALIZER_UNLOCKED;
static uint8_t ref_counts = 0;
/* Static functions to return register address & mask for clk_en / rst of each peripheral */
static uint32_t get_clk_en_mask(periph_module_t periph);
@ -321,3 +322,26 @@ static uint32_t get_rst_en_reg(periph_module_t periph)
}
IRAM_ATTR void wifi_bt_common_module_enable(void)
{
portENTER_CRITICAL_SAFE(&periph_spinlock);
if (ref_counts == 0) {
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG,DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,0);
}
ref_counts++;
portEXIT_CRITICAL_SAFE(&periph_spinlock);
}
IRAM_ATTR void wifi_bt_common_module_disable(void)
{
portENTER_CRITICAL_SAFE(&periph_spinlock);
ref_counts--;
if (ref_counts == 0) {
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG,DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,0);
}
portEXIT_CRITICAL_SAFE(&periph_spinlock);
}

View File

@ -57,14 +57,6 @@ static uint32_t s_module_phy_rf_init = 0;
/* Whether modem sleep is turned on */
static volatile bool s_is_phy_rf_en = false;
#if CONFIG_IDF_TARGET_ESP32
/* Whether WiFi/BT common clock enabled reference */
static volatile int32_t s_common_clock_enable_ref = 0;
/* PHY spinlock mux */
static portMUX_TYPE s_phy_spin_lock = portMUX_INITIALIZER_UNLOCKED;
#endif
/* Bit mask of modules needing to enter modem sleep mode */
static uint32_t s_modem_sleep_module_enter = 0;
@ -130,63 +122,16 @@ static inline void phy_update_wifi_mac_time(bool en_clock_stopped, int64_t now)
}
}
}
IRAM_ATTR static inline void phy_spin_lock(void)
{
if (xPortInIsrContext()) {
portENTER_CRITICAL_ISR(&s_phy_spin_lock);
} else {
portENTER_CRITICAL(&s_phy_spin_lock);
}
}
IRAM_ATTR static inline void phy_spin_unlock(void)
{
if (xPortInIsrContext()) {
portEXIT_CRITICAL_ISR(&s_phy_spin_lock);
} else {
portEXIT_CRITICAL(&s_phy_spin_lock);
}
}
#endif
IRAM_ATTR void esp_phy_common_clock_enable(void)
{
#if CONFIG_IDF_TARGET_ESP32
phy_spin_lock();
if (s_common_clock_enable_ref == 0) {
// Enable WiFi/BT common clock
periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
}
s_common_clock_enable_ref++;
phy_spin_unlock();
#else
periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
#endif
wifi_bt_common_module_enable();
}
IRAM_ATTR void esp_phy_common_clock_disable(void)
{
#if CONFIG_IDF_TARGET_ESP32
phy_spin_lock();
if (s_common_clock_enable_ref > 0) {
s_common_clock_enable_ref --;
if (s_common_clock_enable_ref == 0) {
// Disable WiFi/BT common clock
periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
}
} else {
abort();
}
phy_spin_unlock();
#else
periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
#endif
wifi_bt_common_module_disable();
}
esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibration_mode_t mode,