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fix(csi): fixed csi bridge clock closed by csi host driver issue

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This commit is contained in:
Armando 2024-09-13 10:05:09 +08:00
parent 965986bcf1
commit 45b7b7dc1c
4 changed files with 13 additions and 31 deletions
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7
components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c
View File

@ -24,7 +24,6 @@
#include "esp_private/esp_cache_private.h"
#include "esp_private/esp_clk_tree_common.h"
#include "esp_cache.h"
#include "soc/soc_caps.h"
#if CONFIG_CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE
#define CSI_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
@ -65,11 +64,7 @@ static esp_err_t s_csi_claim_controller(csi_controller_t *controller)
controller->csi_id = i;
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_host_bus_clock(i, 0);
mipi_csi_ll_enable_host_clock(i, 0);
mipi_csi_ll_enable_host_config_clock(i, 0);
mipi_csi_ll_enable_host_bus_clock(i, 1);
mipi_csi_ll_enable_host_clock(i, 1);
mipi_csi_ll_enable_host_config_clock(i, 1);
mipi_csi_ll_reset_host_clock(i);
}
break;
@ -91,8 +86,6 @@ static esp_err_t s_csi_declaim_controller(csi_controller_t *controller)
s_platform.controllers[controller->csi_id] = NULL;
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_host_bus_clock(controller->csi_id, 0);
mipi_csi_ll_enable_host_clock(controller->csi_id, 0);
mipi_csi_ll_enable_host_config_clock(controller->csi_id, 0);
}
_lock_release(&s_platform.mutex);

2
components/esp_hw_support/mipi_csi_share_hw_ctrl.c
View File

@ -41,6 +41,7 @@ esp_err_t mipi_csi_brg_claim(mipi_csi_brg_user_t user, int *out_id)
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_brg_module_clock(i, true);
mipi_csi_ll_reset_brg_module_clock(i);
mipi_csi_brg_ll_enable_clock(MIPI_CSI_BRG_LL_GET_HW(i), true);
}
s_ctx.user[i] = user;
} else {
@ -80,6 +81,7 @@ esp_err_t mipi_csi_brg_declaim(int id)
} else if (s_ctx.ref_cnt[id] == 0) {
PERIPH_RCC_ATOMIC() {
mipi_csi_ll_enable_brg_module_clock(id, false);
mipi_csi_brg_ll_enable_clock(MIPI_CSI_BRG_LL_GET_HW(id), false);
}
s_ctx.user[id] = MIPI_CSI_BRG_USER_NO_USER;
}

11
components/hal/esp32p4/include/hal/mipi_csi_brg_ll.h
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@ -20,6 +20,17 @@ extern "C" {
#define MIPI_CSI_BRG_LL_BRG_NUMS 1
#define MIPI_CSI_BRG_LL_GET_HW(id) (((id) == 0) ? &MIPI_CSI_BRIDGE : NULL)
/**
* @brief Enable the clock for MIPI CSI bridge phy
*
* @param dev Pointer to the CSI bridge controller register base address
* @param en true to enable, false to disable
*/
static inline void mipi_csi_brg_ll_enable_clock(csi_brg_dev_t *dev, bool en)
{
dev->host_ctrl.csi_enableclk = en;
}
/**
* @brief Enable the CSI bridge
*

24
components/hal/esp32p4/include/hal/mipi_csi_ll.h
View File

@ -121,30 +121,6 @@ static inline void _mipi_csi_ll_enable_host_bus_clock(int group_id, bool en)
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define mipi_csi_ll_enable_host_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _mipi_csi_ll_enable_host_bus_clock(__VA_ARGS__)
/**
* @brief Enable the clock for MIPI CSI host
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mipi_csi_ll_enable_host_clock(int group_id, bool en)
{
(void)group_id;
MIPI_CSI_BRIDGE.host_ctrl.csi_enableclk = en;
}
/**
* @brief Enable the config clock for MIPI CSI host
*
* @param group_id Group ID
* @param en true to enable, false to disable
*/
static inline void mipi_csi_ll_enable_host_config_clock(int group_id, bool en)
{
(void)group_id;
MIPI_CSI_BRIDGE.host_ctrl.csi_cfg_clk_en = en;
}
/**
* @brief Reset the MIPI CSI host CLK
*