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Merge branch 'fix/wait_efuse_idle_after_wake_v5.2' into 'release/v5.2'
fix(esp_hw_support): wait eFuse controller idle after sleep wakeup (v5.2) See merge request espressif/esp-idf!31950
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commit
45aee0dac3
@ -346,6 +346,9 @@ uint32_t pmu_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp
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bool pmu_sleep_finish(void)
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{
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// Wait eFuse memory update done.
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while(efuse_ll_get_controller_state() != EFUSE_CONTROLLER_STATE_IDLE);
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return pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev);
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}
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@ -16,6 +16,15 @@
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extern "C" {
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#endif
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typedef enum {
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EFUSE_CONTROLLER_STATE_RESET = 0, ///< efuse_controllerid is on reset state.
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EFUSE_CONTROLLER_STATE_IDLE = 1, ///< efuse_controllerid is on idle state.
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EFUSE_CONTROLLER_STATE_READ_INIT = 2, ///< efuse_controllerid is on read init state.
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EFUSE_CONTROLLER_STATE_READ_BLK0 = 3, ///< efuse_controllerid is on reading block0 state.
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EFUSE_CONTROLLER_STATE_BLK0_CRC_CHECK = 4, ///< efuse_controllerid is on checking block0 crc state.
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EFUSE_CONTROLLER_STATE_READ_RS_BLK = 5, ///< efuse_controllerid is on reading RS block state.
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} efuse_controller_state_t;
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// Always inline these functions even no gcc optimization is applied.
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/******************* eFuse fields *************************/
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@ -175,6 +184,11 @@ __attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint1
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EFUSE.wr_tim_conf2.pwr_off_num = value;
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}
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__attribute__((always_inline)) static inline uint32_t efuse_ll_get_controller_state(void)
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{
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return EFUSE.status.state;
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}
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/******************* eFuse control functions *************************/
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#ifdef __cplusplus
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