diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt index 58698a7219..d4a21d3612 100644 --- a/components/hal/CMakeLists.txt +++ b/components/hal/CMakeLists.txt @@ -238,6 +238,13 @@ if(NOT BOOTLOADER_BUILD) list(APPEND srcs "huk_hal.c") endif() + if(CONFIG_SOC_USB_OTG_SUPPORTED) + list(APPEND srcs + "usb_hal.c" + "usb_dwc_hal.c" + "usb_phy_hal.c") + endif() + if(${target} STREQUAL "esp32") list(APPEND srcs "touch_sensor_hal.c" @@ -248,23 +255,17 @@ if(NOT BOOTLOADER_BUILD) if(${target} STREQUAL "esp32s2") list(APPEND srcs "touch_sensor_hal.c" - "usb_hal.c" - "usb_phy_hal.c" "xt_wdt_hal.c" "esp32s2/cp_dma_hal.c" - "esp32s2/touch_sensor_hal.c" - "usb_dwc_hal.c") + "esp32s2/touch_sensor_hal.c") endif() if(${target} STREQUAL "esp32s3") list(APPEND srcs "touch_sensor_hal.c" - "usb_hal.c" - "usb_phy_hal.c" "xt_wdt_hal.c" "esp32s3/touch_sensor_hal.c" - "esp32s3/rtc_cntl_hal.c" - "usb_dwc_hal.c") + "esp32s3/rtc_cntl_hal.c") endif() if(${target} STREQUAL "esp32c3") diff --git a/components/hal/include/hal/usb_dwc_hal.h b/components/hal/include/hal/usb_dwc_hal.h index 7af5bd45fa..133fe2bc45 100644 --- a/components/hal/include/hal/usb_dwc_hal.h +++ b/components/hal/include/hal/usb_dwc_hal.h @@ -6,25 +6,23 @@ #pragma once +#include "soc/soc_caps.h" +/* +This header is shared across all targets. Resolve to an empty header for targets +that don't support USB OTG. +*/ +#if SOC_USB_OTG_SUPPORTED +#include +#include +#include "hal/usb_dwc_ll.h" +#include "hal/usb_dwc_types.h" +#include "hal/assert.h" +#endif // SOC_USB_OTG_SUPPORTED + #ifdef __cplusplus extern "C" { #endif -/* -NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL - functions must be called from critical sections unless specified otherwise -*/ - -#include -#include -#include "soc/soc_caps.h" -#if SOC_USB_OTG_SUPPORTED -#include "soc/usb_dwc_struct.h" -#include "hal/usb_dwc_ll.h" -#endif -#include "hal/usb_dwc_types.h" -#include "hal/assert.h" - #if SOC_USB_OTG_SUPPORTED // ------------------------------------------------ Macros and Types --------------------------------------------------- diff --git a/components/hal/include/hal/usb_dwc_ll.h b/components/hal/include/hal/usb_dwc_ll.h index 5c3934e609..2900ff65f2 100644 --- a/components/hal/include/hal/usb_dwc_ll.h +++ b/components/hal/include/hal/usb_dwc_ll.h @@ -6,19 +6,25 @@ #pragma once +#include "soc/soc_caps.h" +/* +This header is shared across all targets. Resolve to an empty header for targets +that don't support USB OTG. +*/ +#if SOC_USB_OTG_SUPPORTED +#include +#include +#include "soc/usb_dwc_struct.h" +#include "soc/usb_dwc_cfg.h" +#include "hal/usb_dwc_types.h" +#include "hal/misc.h" +#endif // SOC_USB_OTG_SUPPORTED + #ifdef __cplusplus extern "C" { #endif -#include -#include -#include "soc/soc_caps.h" #if SOC_USB_OTG_SUPPORTED -#include "soc/usb_dwc_struct.h" -#endif -#include "hal/usb_dwc_types.h" -#include "hal/misc.h" - /* ----------------------------------------------------------------------------- --------------------------------- DWC Constants -------------------------------- @@ -187,7 +193,6 @@ Todo: Check sizes again and express this macro in terms of DWC config options (I #define USB_DWC_LL_INTR_CHAN_CHHLTD (1 << 1) #define USB_DWC_LL_INTR_CHAN_XFERCOMPL (1 << 0) -#if SOC_USB_OTG_SUPPORTED /* * QTD (Queue Transfer Descriptor) structure used in Scatter/Gather DMA mode. * Each QTD describes one transfer. Scatter gather mode will automatically split @@ -857,28 +862,48 @@ static inline uint32_t usb_dwc_ll_hctsiz_get_pid(volatile usb_dwc_host_chan_regs static inline void usb_dwc_ll_hctsiz_set_qtd_list_len(volatile usb_dwc_host_chan_regs_t *chan, int qtd_list_len) { - HAL_FORCE_MODIFY_U32_REG_FIELD(chan->hctsiz_reg, ntd, qtd_list_len - 1); //Set the length of the descriptor list + usb_dwc_hctsiz_reg_t hctsiz; + hctsiz.val = chan->hctsiz_reg.val; + //Set the length of the descriptor list. NTD occupies xfersize[15:8] + hctsiz.xfersize &= ~(0xFF << 8); + hctsiz.xfersize |= ((qtd_list_len - 1) & 0xFF) << 8; + chan->hctsiz_reg.val = hctsiz.val; } static inline void usb_dwc_ll_hctsiz_init(volatile usb_dwc_host_chan_regs_t *chan) { - chan->hctsiz_reg.dopng = 0; //Don't do ping - HAL_FORCE_MODIFY_U32_REG_FIELD(chan->hctsiz_reg, sched_info, 0xFF); //Schedinfo is always 0xFF for fullspeed. Not used in Bulk/Ctrl channels + usb_dwc_hctsiz_reg_t hctsiz; + hctsiz.val = chan->hctsiz_reg.val; + hctsiz.dopng = 0; //Don't do ping + /* + Set SCHED_INFO which occupies xfersize[7:0] + It is always set to 0xFF for full speed and not used in Bulk/Ctrl channels + */ + hctsiz.xfersize |= 0xFF; + chan->hctsiz_reg.val = hctsiz.val; } // ---------------------------- HCDMAi Register -------------------------------- static inline void usb_dwc_ll_hcdma_set_qtd_list_addr(volatile usb_dwc_host_chan_regs_t *chan, void *dmaaddr, uint32_t qtd_idx) { - //Set HCDMAi - chan->hcdma_reg.val = 0; - chan->hcdma_reg.non_iso.dmaaddr = (((uint32_t)dmaaddr) >> 9) & 0x7FFFFF; //MSB of 512 byte aligned address - chan->hcdma_reg.non_iso.ctd = qtd_idx; + usb_dwc_hcdma_reg_t hcdma; + /* + Set the base address portion of the field which is dmaaddr[31:9]. This is + the based address of the QTD list and must be 512 bytes aligned + */ + hcdma.dmaaddr = ((uint32_t)dmaaddr) & 0xFFFFFE00; + //Set the current QTD index in the QTD list which is dmaaddr[8:3] + hcdma.dmaaddr |= (qtd_idx & 0x3F) << 3; + //dmaaddr[2:0] is reserved thus doesn't not need to be set + + chan->hcdma_reg.val = hcdma.val; } static inline int usb_dwc_ll_hcdam_get_cur_qtd_idx(usb_dwc_host_chan_regs_t *chan) { - return chan->hcdma_reg.non_iso.ctd; + //The current QTD index is dmaaddr[8:3] + return (chan->hcdma_reg.dmaaddr >> 3) & 0x3F; } // ---------------------------- HCDMABi Register ------------------------------- @@ -998,7 +1023,7 @@ static inline void usb_dwc_ll_qtd_get_status(usb_dwc_ll_dma_qtd_t *qtd, int *rem qtd->buffer_status_val = 0; } -#endif +#endif // SOC_USB_OTG_SUPPORTED #ifdef __cplusplus } diff --git a/components/hal/usb_dwc_hal.c b/components/hal/usb_dwc_hal.c index b9c9baf6db..6dfc1a5fba 100644 --- a/components/hal/usb_dwc_hal.c +++ b/components/hal/usb_dwc_hal.c @@ -9,9 +9,9 @@ #include #include "sdkconfig.h" #include "soc/chip_revision.h" -#include "hal/efuse_hal.h" #include "hal/usb_dwc_hal.h" #include "hal/usb_dwc_ll.h" +#include "hal/efuse_hal.h" #include "hal/assert.h" // ------------------------------------------------ Macros and Types --------------------------------------------------- diff --git a/components/soc/esp32s2/include/soc/usb_dwc_cfg.h b/components/soc/esp32s2/include/soc/usb_dwc_cfg.h new file mode 100644 index 0000000000..37cdcdf4bf --- /dev/null +++ b/components/soc/esp32s2/include/soc/usb_dwc_cfg.h @@ -0,0 +1,89 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +/* +Configuration Set ID: 1 +*/ + +/* 3.1 Basic Config Parameters */ +#define OTG_MODE 0 +#define OTG_ARCHITECTURE 2 +#define OTG_SINGLE_POINT 1 +#define OTG_ENABLE_LPM 0 +#define OTG_EN_DED_TX_FIFO 1 +#define OTG_EN_DESC_DMA 1 +#define OTG_MULTI_PROC_INTRPT 0 + +/* 3.2 USB Physical Layer Interface Parameters */ +#define OTG_HSPHY_INTERFACE 0 +#define OTG_FSPHY_INTERFACE 1 +#define OTG_ENABLE_IC_USB 0 +#define OTG_I2C_INTERFACE 0 +#define OTG_ADP_SUPPORT 0 +#define OTG_BC_SUPPORT 0 + +/* 3.3 Device Endpoint Configuration Parameters */ +#define OTG_NUM_EPS 6 +#define OTG_NUM_IN_EPS 5 +#define OTG_NUM_CRL_EPS 0 + +/* 3.4 Host Endpoint Configuration Parameters */ +#define OTG_NUM_HOST_CHAN 8 +#define OTG_EN_PERIO_HOST 1 + +/* 3.5 Endpoint Channel FIFO Configuration Parameters */ +#define OTG_DFIFO_DEPTH 256 +#define OTG_DFIFO_DYNAMIC 1 +#define OTG_RX_DFIFO_DEPTH 256 +#define OTG_TX_HNPERIO_DFIFO_DEPTH 256 +#define OTG_TX_NPERIO_DFIFO_DEPTH 256 +#define OTG_TX_HPERIO_DFIFO_DEPTH 256 +#define OTG_NPERIO_TX_QUEUE_DEPTH 4 +#define OTG_PERIO_TX_QUEUE_DEPTH 8 + +/* 3.6 Additional Configuration Options Parameters */ +#define OTG_TRANS_COUNT_WIDTH 16 +#define OTG_PACKET_COUNT_WIDTH 7 +#define OTG_RM_OPT_FEATURES 1 +#define OTG_EN_PWROPT 1 +#define OTG_SYNC_RESET_TYPE 0 +#define OTG_EN_IDDIG_FILTER 1 +#define OTG_EN_VBUSVALID_FILTER 1 +#define OTG_EN_A_VALID_FILTER 1 +#define OTG_EN_B_VALID_FILTER 1 +#define OTG_EN_SESSIONEND_FILTER 1 +#define OTG_EXCP_CNTL_XFER_FLOW 1 +#define OTG_PWR_CLAMP 0 +#define OTG_PWR_SWITCH_POLARITY 0 + +/* 3.7 Endpoint Direction Parameters */ +#define OTG_EP_DIR_1 0 +#define OTG_EP_DIR_2 0 +#define OTG_EP_DIR_3 0 +#define OTG_EP_DIR_4 0 +#define OTG_EP_DIR_5 0 +#define OTG_EP_DIR_6 0 + +/* 3.8 Device Periodic FIFO Depth Parameters */ + +/* 3.9 Device IN Endpoint FIFO Depth Parameters */ +#define OTG_TX_DINEP_DFIFO_DEPTH_1 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_2 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_3 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_4 256 + +/* 3.10 UTMI-To-UTMI Bridge Component Parameters */ +#define U2UB_EN 0 + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32s2/include/soc/usb_dwc_struct.h b/components/soc/esp32s2/include/soc/usb_dwc_struct.h index 0402c4a83e..7c9ca381c3 100644 --- a/components/soc/esp32s2/include/soc/usb_dwc_struct.h +++ b/components/soc/esp32s2/include/soc/usb_dwc_struct.h @@ -1,16 +1,21 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once +#include + #ifdef __cplusplus extern "C" { #endif -#include +/* +Registers and fields were generated based on a set of configuration options. +See the ESP32-S2 "usb_dwc_cfg.h" for more details. +*/ /* ---------------------------- Register Types ------------------------------ */ @@ -29,7 +34,7 @@ typedef union { uint32_t hstsethnpen: 1; uint32_t devhnpen: 1; uint32_t ehen: 1; - uint32_t reserved2: 2; + uint32_t reserved_13: 2; uint32_t dbncefltrbypass: 1; uint32_t conidsts: 1; uint32_t dbnctime: 1; @@ -37,23 +42,26 @@ typedef union { uint32_t bsesvld: 1; uint32_t otgver: 1; uint32_t curmod: 1; - uint32_t reserved10: 10; + uint32_t reserved_22: 5; + uint32_t reserved_27: 1; + uint32_t reserved_28: 4; }; uint32_t val; } usb_dwc_gotgctl_reg_t; typedef union { struct { - uint32_t reserved2: 2; + uint32_t reserved_0: 2; uint32_t sesenddet: 1; - uint32_t reserved5: 5; + uint32_t reserved_3: 5; uint32_t sesreqsucstschng: 1; uint32_t hstnegsucstschng: 1; - uint32_t reserved7: 7; + uint32_t reserved_10: 7; uint32_t hstnegdet: 1; uint32_t adevtoutchg: 1; uint32_t dbncedone: 1; - uint32_t reserved12: 12; + uint32_t reserved_20: 1; + uint32_t reserved_21: 11; }; uint32_t val; } usb_dwc_gotgint_reg_t; @@ -63,34 +71,44 @@ typedef union { uint32_t glbllntrmsk: 1; uint32_t hbstlen: 4; uint32_t dmaen: 1; - uint32_t reserved1: 1; + uint32_t reserved_6: 1; uint32_t nptxfemplvl: 1; uint32_t ptxfemplvl: 1; - uint32_t reserved12: 12; + uint32_t reserved_9: 12; uint32_t remmemsupp: 1; uint32_t notialldmawrit: 1; uint32_t ahbsingle: 1; uint32_t invdescendianess: 1; - uint32_t reserved7: 7; + uint32_t reserved_25: 7; }; uint32_t val; - //Checked } usb_dwc_gahbcfg_reg_t; typedef union { struct { uint32_t toutcal: 3; uint32_t phyif: 1; - uint32_t reserved1a: 1; + uint32_t reserved_4: 1; uint32_t fsintf: 1; uint32_t physel: 1; - uint32_t reserved1b: 1; + uint32_t reserved_7: 1; uint32_t srpcap: 1; uint32_t hnpcap: 1; uint32_t usbtrdtim: 4; - uint32_t reserved8: 8; + uint32_t reserved_14: 1; + uint32_t phylpwrclksel: 1; + uint32_t reserved_16: 1; + uint32_t reserved_17: 1; + uint32_t reserved_18: 1; + uint32_t reserved_19: 1; + uint32_t reserved_20: 1; + uint32_t reserved_21: 1; uint32_t termseldlpulse: 1; - uint32_t reserved5: 5; + uint32_t reserved_23: 1; + uint32_t reserved_24: 1; + uint32_t reserved_25: 1; + uint32_t icusbcap: 1; + uint32_t reserved_27: 1; uint32_t txenddelay: 1; uint32_t forcehstmode: 1; uint32_t forcedevmode: 1; @@ -104,11 +122,11 @@ typedef union { uint32_t csftrst: 1; uint32_t piufssftrst: 1; uint32_t frmcntrrst: 1; - uint32_t reserved1: 1; + uint32_t reserved_3: 1; uint32_t rxfflsh: 1; uint32_t txfflsh: 1; uint32_t txfnum: 5; - uint32_t reserved19: 19; + uint32_t reserved_11: 19; uint32_t dmareq: 1; uint32_t ahbidle: 1; }; @@ -117,22 +135,23 @@ typedef union { typedef union { struct { - uint32_t curmod_int: 1; + uint32_t curmod: 1; uint32_t modemis: 1; uint32_t otgint: 1; uint32_t sof: 1; - uint32_t rxflvi: 1; + uint32_t rxflvl: 1; uint32_t nptxfemp: 1; uint32_t ginnakeff: 1; uint32_t goutnakeff: 1; - uint32_t reserved2: 2; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; uint32_t erlysusp: 1; uint32_t usbsusp: 1; uint32_t usbrst: 1; uint32_t enumdone: 1; uint32_t isooutdrop: 1; uint32_t eopf: 1; - uint32_t reserved1a: 1; + uint32_t reserved_16: 1; uint32_t epmis: 1; uint32_t iepint: 1; uint32_t oepint: 1; @@ -140,10 +159,10 @@ typedef union { uint32_t incompip: 1; uint32_t fetsusp: 1; uint32_t resetdet: 1; - uint32_t prtlnt: 1; - uint32_t hchlnt: 1; + uint32_t prtint: 1; + uint32_t hchint: 1; uint32_t ptxfemp: 1; - uint32_t reserved1b: 1; + uint32_t reserved_27: 1; uint32_t conidstschng: 1; uint32_t disconnint: 1; uint32_t sessreqint: 1; @@ -154,22 +173,23 @@ typedef union { typedef union { struct { - uint32_t reserved1a: 1; + uint32_t reserved_0: 1; uint32_t modemismsk: 1; uint32_t otgintmsk: 1; uint32_t sofmsk: 1; - uint32_t rxflvimsk: 1; + uint32_t rxflvlmsk: 1; uint32_t nptxfempmsk: 1; uint32_t ginnakeffmsk: 1; uint32_t goutnackeffmsk: 1; - uint32_t reserved2: 2; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; uint32_t erlysuspmsk: 1; uint32_t usbsuspmsk: 1; uint32_t usbrstmsk: 1; uint32_t enumdonemsk: 1; uint32_t isooutdropmsk: 1; uint32_t eopfmsk: 1; - uint32_t reserved1b: 1; + uint32_t reserved_16: 1; uint32_t epmismsk: 1; uint32_t iepintmsk: 1; uint32_t oepintmsk: 1; @@ -177,10 +197,10 @@ typedef union { uint32_t incompipmsk: 1; uint32_t fetsuspmsk: 1; uint32_t resetdetmsk: 1; - uint32_t prtlntmsk: 1; + uint32_t prtintmsk: 1; uint32_t hchintmsk: 1; uint32_t ptxfempmsk: 1; - uint32_t reserved1c: 1; + uint32_t reserved_27: 1; uint32_t conidstschngmsk: 1; uint32_t disconnintmsk: 1; uint32_t sessreqintmsk: 1; @@ -191,12 +211,13 @@ typedef union { typedef union { struct { - uint32_t g_chnum: 4; - uint32_t g_bcnt: 11; - uint32_t g_dpid: 2; - uint32_t g_pktsts: 4; - uint32_t g_fn: 4; - uint32_t reserved7: 7; + uint32_t chnum: 4; + uint32_t bcnt: 11; + uint32_t dpid: 2; + uint32_t pktsts: 4; + uint32_t fn: 4; + uint32_t reserved_25: 6; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_grxstsr_reg_t; @@ -208,7 +229,8 @@ typedef union { uint32_t dpid: 2; uint32_t pktsts: 4; uint32_t fn: 4; - uint32_t reserved7: 7; + uint32_t reserved_25: 6; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_grxstsp_reg_t; @@ -216,7 +238,7 @@ typedef union { typedef union { struct { uint32_t rxfdep: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_grxfsiz_reg_t; @@ -232,10 +254,9 @@ typedef union { typedef union { struct { uint32_t nptxfspcavail: 16; - uint32_t nptxqspcavail: 4; - uint32_t reserved4: 4; + uint32_t nptxqspcavail: 8; uint32_t nptxqtop: 7; - uint32_t reserved1: 1; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_gnptxsts_reg_t; @@ -266,11 +287,11 @@ typedef union { uint32_t periosupport: 1; uint32_t dynfifosizing: 1; uint32_t multiprocintrpt: 1; - uint32_t reserved1a: 1; + uint32_t reserved_21: 1; uint32_t nptxqdepth: 2; uint32_t ptxqdepth: 2; uint32_t tknqdepth: 5; - uint32_t reserved1b: 1; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_ghwcfg2_reg_t; @@ -295,25 +316,25 @@ typedef union { typedef union { struct { - uint32_t g_numdevperioeps: 4; - uint32_t g_partialpwrdn: 1; - uint32_t g_ahbfreq: 1; - uint32_t g_hibernation: 1; - uint32_t g_extendedhibernation: 1; - uint32_t reserved4: 4; - uint32_t g_acgsupt: 1; - uint32_t g_enhancedlpmsupt: 1; - uint32_t g_phydatawidth: 2; - uint32_t g_numctleps: 4; - uint32_t g_iddqfltr: 1; - uint32_t g_vbusvalidfltr: 1; - uint32_t g_avalidfltr: 1; - uint32_t g_bvalidfltr: 1; - uint32_t g_sessendfltr: 1; - uint32_t g_dedfifomode: 1; - uint32_t g_ineps: 4; - uint32_t g_descdmaenabled: 1; - uint32_t g_descdma: 1; + uint32_t numdevperioeps: 4; + uint32_t partialpwrdn: 1; + uint32_t ahbfreq: 1; + uint32_t hibernation: 1; + uint32_t extendedhibernation: 1; + uint32_t reserved_8: 4; + uint32_t acgsupt: 1; + uint32_t enhancedlpmsupt: 1; + uint32_t phydatawidth: 2; + uint32_t numctleps: 4; + uint32_t iddqfltr: 1; + uint32_t vbusvalidfltr: 1; + uint32_t avalidfltr: 1; + uint32_t bvalidfltr: 1; + uint32_t sessendfltr: 1; + uint32_t dedfifomode: 1; + uint32_t ineps: 4; + uint32_t descdmaenabled: 1; + uint32_t descdma: 1; }; uint32_t val; } usb_dwc_ghwcfg4_reg_t; @@ -337,8 +358,8 @@ typedef union { typedef union { struct { - uint32_t inepitxfstaddr: 16; - uint32_t inep1txfdep: 16; + uint32_t inepntxfstaddr: 16; + uint32_t inepntxfdep: 16; }; uint32_t val; } usb_dwc_dieptxfi_reg_t; @@ -347,15 +368,15 @@ typedef union { struct { uint32_t fslspclksel: 2; uint32_t fslssupp: 1; - uint32_t reserved4a: 4; + uint32_t reserved_3: 4; uint32_t ena32khzs: 1; uint32_t resvalid: 8; - uint32_t reserved1: 1; - uint32_t reserved6: 6; + uint32_t reserved_16: 1; + uint32_t reserved_17: 6; uint32_t descdma: 1; uint32_t frlisten: 2; uint32_t perschedena: 1; - uint32_t reserved4b: 4; + uint32_t reserved_27: 4; uint32_t modechtimen: 1; }; uint32_t val; @@ -365,15 +386,14 @@ typedef union { struct { uint32_t frint: 16; uint32_t hfirrldctrl: 1; - uint32_t reserved15: 15; + uint32_t reserved_17: 15; }; uint32_t val; } usb_dwc_hfir_reg_t; typedef union { struct { - uint32_t frnum: 14; - uint32_t reserved: 2; + uint32_t frnum: 16; uint32_t frrem: 16; }; uint32_t val; @@ -382,8 +402,7 @@ typedef union { typedef union { struct { uint32_t ptxfspcavail: 16; - uint32_t ptxqspcavail: 5; - uint32_t reserved: 3; + uint32_t ptxqspcavail: 8; uint32_t ptxqtop: 8; }; uint32_t val; @@ -392,7 +411,7 @@ typedef union { typedef union { struct { uint32_t haint: 8; - uint32_t reserved24: 24; + uint32_t reserved_8: 24; }; uint32_t val; } usb_dwc_haint_reg_t; @@ -400,7 +419,7 @@ typedef union { typedef union { struct { uint32_t haintmsk: 8; - uint32_t reserved24: 24; + uint32_t reserved_8: 24; }; uint32_t val; } usb_dwc_haintmsk_reg_t; @@ -423,12 +442,12 @@ typedef union { uint32_t prtres: 1; uint32_t prtsusp: 1; uint32_t prtrst: 1; - uint32_t reserved1: 1; + uint32_t reserved_9: 1; uint32_t prtlnsts: 2; uint32_t prtpwr: 1; uint32_t prttstctl: 4; uint32_t prtspd: 2; - uint32_t reserved13: 13; + uint32_t reserved_19: 13; }; uint32_t val; } usb_dwc_hprt_reg_t; @@ -438,7 +457,7 @@ typedef union { uint32_t mps: 11; uint32_t epnum: 4; uint32_t epdir: 1; - uint32_t reserved: 1; + uint32_t reserved_16: 1; uint32_t lspddev: 1; uint32_t eptype: 2; uint32_t ec: 2; @@ -466,7 +485,7 @@ typedef union { uint32_t bnaintr: 1; uint32_t xcs_xact_err: 1; uint32_t desc_lst_rollintr: 1; - uint32_t reserved18: 18; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_hcint_reg_t; @@ -476,28 +495,26 @@ typedef union { uint32_t xfercomplmsk: 1; uint32_t chhltdmsk: 1; uint32_t ahberrmsk: 1; - uint32_t stallmsk: 1; - uint32_t nakmsk: 1; - uint32_t ackmsk: 1; - uint32_t nyetmsk: 1; - uint32_t xacterrmsk: 1; - uint32_t bblerrmsk: 1; - uint32_t frmovrunmsk: 1; - uint32_t datatglerrmsk: 1; + uint32_t reserved_3: 1; + uint32_t reserved_4: 1; + uint32_t reserved_5: 1; + uint32_t reserved_6: 1; + uint32_t reserved_7: 1; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; + uint32_t reserved_10: 1; uint32_t bnaintrmsk: 1; - uint32_t reserved1: 1; + uint32_t reserved_12: 1; uint32_t desc_lst_rollintrmsk: 1; - uint32_t reserved18: 18; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_hcintmsk_reg_t; typedef union { struct { - uint32_t sched_info: 8; - uint32_t ntd: 8; - uint32_t reserved3: 3; - uint32_t reserved10: 10; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). uint32_t pid: 2; uint32_t dopng: 1; }; @@ -506,14 +523,8 @@ typedef union { typedef union { struct { - uint32_t reserved3: 3; - uint32_t ctd: 6; - uint32_t dmaaddr: 23; - } non_iso; - struct { - uint32_t reserved3: 3; - uint32_t dmaaddr_ctd: 29; - } iso; + uint32_t dmaaddr; + }; uint32_t val; } usb_dwc_hcdma_reg_t; @@ -526,16 +537,16 @@ typedef union { typedef union { struct { - uint32_t reserved2a: 2; + uint32_t devspd: 2; uint32_t nzstsouthshk: 1; - uint32_t reserved1: 1; + uint32_t ena32khzsusp: 1; uint32_t devaddr: 7; - uint32_t perfrlint: 2; + uint32_t perfrint: 2; uint32_t endevoutnak: 1; uint32_t xcvrdly: 1; uint32_t erraticintmsk: 1; - uint32_t reserved2b: 2; - uint32_t epmiscnt: 5; + uint32_t reserved_16: 2; + uint32_t reserved_18: 5; uint32_t descdma: 1; uint32_t perschintvl: 2; uint32_t resvalid: 6; @@ -555,13 +566,13 @@ typedef union { uint32_t sgoutnak: 1; uint32_t cgoutnak: 1; uint32_t pwronprgdone: 1; - uint32_t reserved1: 1; + uint32_t reserved_12: 1; uint32_t gmc: 2; uint32_t ignrfrmnum: 1; uint32_t nakonbble: 1; - uint32_t encountonbna: 1; - uint32_t deepsleepbeslreject: 1; - uint32_t reserved3: 13; + uint32_t encontonbna: 1; + uint32_t reserved_18: 1; + uint32_t reserved_19: 13; }; uint32_t val; } usb_dwc_dctl_reg_t; @@ -571,29 +582,29 @@ typedef union { uint32_t suspsts: 1; uint32_t enumspd: 2; uint32_t errticerr: 1; - uint32_t reserved4: 4; + uint32_t reserved_4: 4; uint32_t soffn: 14; uint32_t devlnsts: 2; - uint32_t reserved8: 8; + uint32_t reserved_24: 8; }; uint32_t val; } usb_dwc_dsts_reg_t; typedef union { struct { - uint32_t di_xfercomplmsk: 1; - uint32_t di_epdisbldmsk: 1; - uint32_t di_ahbermsk: 1; + uint32_t xfercomplmsk: 1; + uint32_t epdisbldmsk: 1; + uint32_t ahberrmsk: 1; uint32_t timeoutmsk: 1; uint32_t intkntxfempmsk: 1; uint32_t intknepmismsk: 1; uint32_t inepnakeffmsk: 1; - uint32_t reserved1: 1; + uint32_t reserved_7: 1; uint32_t txfifoundrnmsk: 1; uint32_t bnainintrmsk: 1; - uint32_t reserved3: 3; - uint32_t di_nakmsk: 1; - uint32_t reserved18: 18; + uint32_t reserved_10: 3; + uint32_t nakmsk: 1; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_diepmsk_reg_t; @@ -602,19 +613,19 @@ typedef union { struct { uint32_t xfercomplmsk: 1; uint32_t epdisbldmsk: 1; - uint32_t ahbermsk: 1; + uint32_t ahberrmsk: 1; uint32_t setupmsk: 1; uint32_t outtknepdismsk: 1; uint32_t stsphsercvdmsk: 1; uint32_t back2backsetup: 1; - uint32_t reserved1: 1; + uint32_t reserved_7: 1; uint32_t outpkterrmsk: 1; uint32_t bnaoutintrmsk: 1; - uint32_t reserved2: 2; + uint32_t reserved_10: 2; uint32_t bbleerrmsk: 1; uint32_t nakmsk: 1; uint32_t nyetmsk: 1; - uint32_t reserved17: 17; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_doepmsk_reg_t; @@ -628,7 +639,7 @@ typedef union { uint32_t inepint4: 1; uint32_t inepint5: 1; uint32_t inepint6: 1; - uint32_t reserved9a: 9; + uint32_t reserved_7: 9; uint32_t outepint0: 1; uint32_t outepint1: 1; uint32_t outepint2: 1; @@ -636,7 +647,7 @@ typedef union { uint32_t outepint4: 1; uint32_t outepint5: 1; uint32_t outepint6: 1; - uint32_t reserved9b: 9; + uint32_t reserved_24: 9; }; uint32_t val; } usb_dwc_daint_reg_t; @@ -650,7 +661,7 @@ typedef union { uint32_t inepmsk4: 1; uint32_t inepmsk5: 1; uint32_t inepmsk6: 1; - uint32_t reserved9a: 9; + uint32_t reserved_7: 9; uint32_t outepmsk0: 1; uint32_t outepmsk1: 1; uint32_t outepmsk2: 1; @@ -658,7 +669,7 @@ typedef union { uint32_t outepmsk4: 1; uint32_t outepmsk5: 1; uint32_t outepmsk6: 1; - uint32_t reserved9b: 9; + uint32_t reserved_24: 9; }; uint32_t val; } usb_dwc_daintmsk_reg_t; @@ -666,7 +677,7 @@ typedef union { typedef union { struct { uint32_t dvbusdis: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dvbusdis_reg_t; @@ -674,7 +685,7 @@ typedef union { typedef union { struct { uint32_t dvbuspulse: 12; - uint32_t reserved20: 20; + uint32_t reserved_12: 20; }; uint32_t val; } usb_dwc_dvbuspulse_reg_t; @@ -685,109 +696,108 @@ typedef union { uint32_t isothren: 1; uint32_t txthrlen: 9; uint32_t ahbthrratio: 2; - uint32_t reserved3: 3; + uint32_t reserved_13: 3; uint32_t rxthren: 1; uint32_t rxthrlen: 9; - uint32_t reserved1: 1; + uint32_t reserved_26: 1; uint32_t arbprken: 1; - uint32_t reserved4: 4; + uint32_t reserved_28: 4; }; uint32_t val; } usb_dwc_dthrctl_reg_t; typedef union { struct { - uint32_t ineptxfernpmsk: 16; - uint32_t reserved16: 16; + uint32_t ineptxfempmsk: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_diepempmsk_reg_t; typedef union { struct { - uint32_t mps0: 2; - uint32_t reserved9: 9; - uint32_t reserved4: 4; - uint32_t usbactep0: 1; - uint32_t reserved1a: 1; - uint32_t naksts0: 1; - uint32_t eptype0: 2; - uint32_t reserved1b: 1; - uint32_t stall0: 1; - uint32_t txfnum0: 4; - uint32_t cnak0: 1; - uint32_t snak0: 1; - uint32_t reserved2: 2; - uint32_t epdis0: 1; - uint32_t epena0: 1; + uint32_t mps: 2; + uint32_t reserved_2: 9; + uint32_t reserved_11: 4; + uint32_t usbactep: 1; + uint32_t reserved_16: 1; + uint32_t naksts: 1; + uint32_t eptype: 2; + uint32_t reserved_20: 1; + uint32_t stall: 1; + uint32_t txfnum: 4; + uint32_t cnak: 1; + uint32_t snak: 1; + uint32_t reserved_28: 2; + uint32_t epdis: 1; + uint32_t epena: 1; }; uint32_t val; } usb_dwc_diepctl0_reg_t; typedef union { struct { - uint32_t xfercompl0: 1; - uint32_t epdisbld0: 1; - uint32_t ahberr0: 1; - uint32_t timeout0: 1; - uint32_t intkntxfemp0: 1; - uint32_t intknepmis0: 1; - uint32_t inepnakeff0: 1; - uint32_t txfemp0: 1; - uint32_t txfifoundrn0: 1; - uint32_t bnaintr0: 1; - uint32_t reserved1: 1; - uint32_t pktdrpsts0: 1; - uint32_t bbleerr0: 1; - uint32_t nakintrpt0: 1; - uint32_t nyetintrpt0: 1; - uint32_t reserved17: 17; + uint32_t xfercompl: 1; + uint32_t epdisbld: 1; + uint32_t ahberr: 1; + uint32_t timeout: 1; + uint32_t intkntxfemp: 1; + uint32_t intknepmis: 1; + uint32_t inepnakeff: 1; + uint32_t txfemp: 1; + uint32_t txfifoundrn: 1; + uint32_t bnaintr: 1; + uint32_t reserved_10: 1; + uint32_t pktdrpsts: 1; + uint32_t bbleerr: 1; + uint32_t nakintrpt: 1; + uint32_t nyetintrpt: 1; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_diepint0_reg_t; typedef union { struct { - uint32_t xfersize0: 7; - uint32_t reserved12: 12; - uint32_t pktcnt0: 2; - uint32_t reserved11: 11; + uint32_t xfersize: 7; + uint32_t reserved_7: 12; + uint32_t pktcnt: 2; + uint32_t reserved_21: 11; }; uint32_t val; } usb_dwc_dieptsiz0_reg_t; typedef union { struct { - uint32_t dmaaddr0; + uint32_t dmaaddr; }; uint32_t val; } usb_dwc_diepdma0_reg_t; typedef union { struct { - uint32_t ineptxfspcavail0: 16; - uint32_t reserved16: 16; + uint32_t ineptxfspcavail: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dtxfsts0_reg_t; typedef union { struct { - uint32_t dmabufferaddr0; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_diepdmab0_reg_t; typedef union { struct { - uint32_t mps: 2; - uint32_t reserved9: 9; - uint32_t reserved4: 4; + uint32_t mps: 11; + uint32_t reserved_11: 4; uint32_t usbactep: 1; - uint32_t reserved1a: 1; + uint32_t dpid: 1; uint32_t naksts: 1; uint32_t eptype: 2; - uint32_t reserved1b: 1; + uint32_t reserved_20: 1; uint32_t stall: 1; uint32_t txfnum: 4; uint32_t cnak: 1; @@ -812,29 +822,29 @@ typedef union { uint32_t txfemp: 1; uint32_t txfifoundrn: 1; uint32_t bnaintr: 1; - uint32_t reserved1: 1; + uint32_t reserved_10: 1; uint32_t pktdrpsts: 1; uint32_t bbleerr: 1; uint32_t nakintrpt: 1; uint32_t nyetintrpt: 1; - uint32_t reserved15: 17; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_diepint_reg_t; typedef union { struct { - uint32_t xfersize: 7; - uint32_t reserved12: 12; - uint32_t pktcnt: 2; - uint32_t reserved11: 11; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). + uint32_t mc: 2; + uint32_t reserved: 1; }; uint32_t val; } usb_dwc_dieptsiz_reg_t; typedef union { struct { - uint32_t dmaddr1; + uint32_t dmaddr; }; uint32_t val; } usb_dwc_diepdma_reg_t; @@ -842,83 +852,83 @@ typedef union { typedef union { struct { uint32_t ineptxfspcavail: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dtxfsts_reg_t; typedef union { struct { - uint32_t dmabufferaddr1; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_diepdmab_reg_t; typedef union { struct { - uint32_t mps0: 2; - uint32_t reserved13: 13; - uint32_t usbactep0: 1; - uint32_t reserved1: 1; - uint32_t naksts0: 1; - uint32_t eptype0: 2; - uint32_t snp0: 1; - uint32_t stall0: 1; - uint32_t reserved4: 4; - uint32_t cnak0: 1; - uint32_t snak0: 1; - uint32_t reserved2: 2; - uint32_t epdis0: 1; - uint32_t epena0: 1; + uint32_t mps: 2; + uint32_t reserved_2: 13; + uint32_t usbactep: 1; + uint32_t reserved_16: 1; + uint32_t naksts: 1; + uint32_t eptype: 2; + uint32_t snp: 1; + uint32_t stall: 1; + uint32_t reserved_22: 4; + uint32_t cnak: 1; + uint32_t snak: 1; + uint32_t reserved_28: 2; + uint32_t epdis: 1; + uint32_t epena: 1; }; uint32_t val; } usb_dwc_doepctl0_reg_t; typedef union { struct { - uint32_t xfercompl0: 1; - uint32_t epdisbld0: 1; - uint32_t ahberr0: 1; - uint32_t setup0: 1; - uint32_t outtknepdis0: 1; - uint32_t stsphsercvd0: 1; - uint32_t back2backsetup0: 1; - uint32_t reserved1a: 1; - uint32_t outpkterr0: 1; - uint32_t bnaintr0: 1; - uint32_t reserved1b: 1; - uint32_t pktdrpsts0: 1; - uint32_t bbleerr0: 1; - uint32_t nakintrpt0: 1; - uint32_t nyepintrpt0: 1; - uint32_t stuppktrcvd0: 1; - uint32_t reserved16: 16; + uint32_t xfercompl: 1; + uint32_t epdisbld: 1; + uint32_t ahberr: 1; + uint32_t setup: 1; + uint32_t outtknepdis: 1; + uint32_t stsphsercvd: 1; + uint32_t back2backsetup: 1; + uint32_t reserved_7: 1; + uint32_t outpkterr: 1; + uint32_t bnaintr: 1; + uint32_t reserved_10: 1; + uint32_t pktdrpsts: 1; + uint32_t bbleerr: 1; + uint32_t nakintrpt: 1; + uint32_t nyepintrpt: 1; + uint32_t stuppktrcvd: 1; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_doepint0_reg_t; typedef union { struct { - uint32_t xfersize0: 7; - uint32_t reserved12: 12; - uint32_t pktcnt0: 1; - uint32_t reserved9: 9; - uint32_t supcnt0: 2; - uint32_t reserved1: 1; + uint32_t xfersize: 7; + uint32_t reserved_7: 12; + uint32_t pktcnt: 1; + uint32_t reserved_20: 9; + uint32_t supcnt: 2; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_doeptsiz0_reg_t; typedef union { struct { - uint32_t dmaaddr0; + uint32_t dmaaddr; }; uint32_t val; } usb_dwc_doepdma0_reg_t; typedef union { struct { - uint32_t dmabufferaddr0; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_doepdmab0_reg_t; @@ -926,14 +936,14 @@ typedef union { typedef union { struct { uint32_t mps: 11; - uint32_t reserved4a: 4; + uint32_t reserved_11: 4; uint32_t usbactep: 1; - uint32_t reserved1: 1; + uint32_t dpid: 1; uint32_t naksts: 1; uint32_t eptype: 2; uint32_t snp: 1; uint32_t stall: 1; - uint32_t reserved4b: 4; + uint32_t reserved_22: 4; uint32_t cnak: 1; uint32_t snak: 1; uint32_t setd0pid: 1; @@ -953,28 +963,26 @@ typedef union { uint32_t outtknepdis: 1; uint32_t stsphsercvd: 1; uint32_t back2backsetup: 1; - uint32_t reserved1a: 1; + uint32_t reserved_7: 1; uint32_t outpkterr: 1; uint32_t bnaintr: 1; - uint32_t reserved1b: 1; + uint32_t reserved_10: 1; uint32_t pktdrpsts: 1; uint32_t bbleerr: 1; uint32_t nakintrpt: 1; - uint32_t nyepintrpt: 1; + uint32_t nyetintrpt: 1; uint32_t stuppktrcvd: 1; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_doepint_reg_t; typedef union { struct { - uint32_t xfersize: 7; - uint32_t reserved12: 12; - uint32_t pktcnt: 1; - uint32_t reserved9: 9; - uint32_t supcnt: 2; - uint32_t reserved1: 1; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). + uint32_t rxdpid: 2; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_doeptsiz_reg_t; @@ -999,11 +1007,17 @@ typedef union { uint32_t gatehclk: 1; uint32_t pwrclmp: 1; uint32_t rstpdwnmodule: 1; - uint32_t reserved2: 2; + uint32_t reserved_4: 1; + uint32_t reserved_5: 1; uint32_t physleep: 1; uint32_t l1suspended: 1; uint32_t resetaftersusp: 1; - uint32_t reserved23: 23; + uint32_t reserved_9: 1; + uint32_t reserved_10: 1; + uint32_t reserved_11: 1; + uint32_t reserved_12: 1; + uint32_t reserved_13: 1; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_pcgcctl_reg_t; @@ -1012,21 +1026,21 @@ typedef union { typedef struct { volatile usb_dwc_hcchar_reg_t hcchar_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_hcint_reg_t hcint_reg; // 0x08 volatile usb_dwc_hcintmsk_reg_t hcintmsk_reg; // 0x0c volatile usb_dwc_hctsiz_reg_t hctsiz_reg; // 0x10 volatile usb_dwc_hcdma_reg_t hcdma_reg; // 0x14 - uint32_t reserved_0x14_0x14[1]; // 0x18 + uint32_t reserved_0x18[1]; // 0x18 volatile usb_dwc_hcdmab_reg_t hcdmab_reg; // 0x1c } usb_dwc_host_chan_regs_t; typedef struct { volatile usb_dwc_diepctl_reg_t diepctl_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_diepint_reg_t diepint_reg; // 0x08 - uint32_t reserved_0x0c_0x10[1]; // 0x0c - volatile usb_dwc_dieptsiz_reg_t dieptsiz_reg; // 0x010 + uint32_t reserved_0x0c[1]; // 0x0c + volatile usb_dwc_dieptsiz_reg_t dieptsiz_reg; // 0x10 volatile usb_dwc_diepdma_reg_t diepdma_reg; // 0x14 volatile usb_dwc_dtxfsts_reg_t dtxfsts_reg; // 0x18 volatile usb_dwc_diepdmab_reg_t diepdmab_reg; // 0x1c @@ -1034,19 +1048,19 @@ typedef struct { typedef struct { volatile usb_dwc_doepctl_reg_t doepctl_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_doepint_reg_t doepint_reg; // 0x08 - uint32_t reserved_0x0c_0x10[1]; // 0x0c + uint32_t reserved_0x0c[1]; // 0x0c volatile usb_dwc_doeptsiz_reg_t doeptsiz_reg; // 0x10 volatile usb_dwc_doepdma_reg_t doepdma_reg; // 0x14 - uint32_t reserved_0x18_0x1c[1]; // 0x18 + uint32_t reserved_0x18[1]; // 0x18 volatile usb_dwc_doepdmab_reg_t doepdmab_reg; // 0x1c } usb_dwc_out_ep_regs_t; /* --------------------------- Register Layout ------------------------------ */ typedef struct { - //Global Registers + // Global Registers volatile usb_dwc_gotgctl_reg_t gotgctl_reg; // 0x0000 volatile usb_dwc_gotgint_reg_t gotgint_reg; // 0x0004 volatile usb_dwc_gahbcfg_reg_t gahbcfg_reg; // 0x0008 @@ -1059,86 +1073,99 @@ typedef struct { volatile usb_dwc_grxfsiz_reg_t grxfsiz_reg; // 0x0024 volatile usb_dwc_gnptxfsiz_reg_t gnptxfsiz_reg; // 0x0028 volatile usb_dwc_gnptxsts_reg_t gnptxsts_reg; // 0x002c - uint32_t reserved_0x0030_0x0040[4]; // 0x0030 to 0x0040 + uint32_t reserved_0x0030; // 0x0030 + uint32_t reserved_0x0034; // 0x0034 + uint32_t reserved_0x0038; // 0x0038 + uint32_t reserved_0x003c; // 0x003c volatile usb_dwc_gsnpsid_reg_t gsnpsid_reg; // 0x0040 volatile usb_dwc_ghwcfg1_reg_t ghwcfg1_reg; // 0x0044 volatile usb_dwc_ghwcfg2_reg_t ghwcfg2_reg; // 0x0048 volatile usb_dwc_ghwcfg3_reg_t ghwcfg3_reg; // 0x004c volatile usb_dwc_ghwcfg4_reg_t ghwcfg4_reg; // 0x0050 - uint32_t reserved_0x0054_0x005c[2]; // 0x0054 to 0x005c - - //FIFO Configurations + uint32_t reserved_0x0054; // 0x0054 + uint32_t reserved_0x0058; // 0x0058 volatile usb_dwc_gdfifocfg_reg_t gdfifocfg_reg; // 0x005c - uint32_t reserved_0x0060_0x0100[40]; // 0x0060 to 0x0100 + uint32_t reserved_0x0060; // 0x0060 + uint32_t reserved_0x0064_0x0100[39]; // 0x0064 to 0x0100 volatile usb_dwc_hptxfsiz_reg_t hptxfsiz_reg; // 0x0100 - volatile usb_dwc_dieptxfi_reg_t dieptxfi_regs[4]; // 0x0104 to 0x0114 - usb_dwc_dieptxfi_reg_t reserved_0x0114_0x0140[11]; // 0x0114 to 0x0140 - uint32_t reserved_0x140_0x400[176]; // 0x0140 to 0x0400 + volatile usb_dwc_dieptxfi_reg_t dieptxf_regs[4]; // 0x0104 to 0x0110 (depends on OTG_NUM_IN_EPS) + usb_dwc_dieptxfi_reg_t reserved_0x0114_0x013c[11]; // 0x0114 to 0x013c (depends on OTG_NUM_IN_EPS) + uint32_t reserved_0x140_0x3fc[176]; // 0x0140 to 0x03fc - //Host Mode Registers + // Host Mode Registers volatile usb_dwc_hcfg_reg_t hcfg_reg; // 0x0400 volatile usb_dwc_hfir_reg_t hfir_reg; // 0x0404 volatile usb_dwc_hfnum_reg_t hfnum_reg; // 0x0408 - uint32_t reserved_0x40c_0x410[1]; // 0x040c to 0x0410 + uint32_t reserved_0x40c[1]; // 0x040c volatile usb_dwc_hptxsts_reg_t hptxsts_reg; // 0x0410 volatile usb_dwc_haint_reg_t haint_reg; // 0x0414 volatile usb_dwc_haintmsk_reg_t haintmsk_reg; // 0x0418 volatile usb_dwc_hflbaddr_reg_t hflbaddr_reg; // 0x041c - uint32_t reserved_0x420_0x440[8]; // 0x0420 to 0x0440 + uint32_t reserved_0x420_0x43c[8]; // 0x0420 to 0x043c volatile usb_dwc_hprt_reg_t hprt_reg; // 0x0440 - uint32_t reserved_0x0444_0x0500[47]; // 0x0444 to 0x0500 - usb_dwc_host_chan_regs_t host_chans[8]; // 0x0500 to 0x0600 - usb_dwc_host_chan_regs_t reserved_0x0600_0x0700[8]; // 0x0600 to 0x0700 - uint32_t reserved_0x0700_0x0800[64]; // 0x0700 to 0x0800 + uint32_t reserved_0x0444_0x04fc[47]; // 0x0444 to 0x04fc + + // Host Channel Registers + usb_dwc_host_chan_regs_t host_chans[8]; // 0x0500 to 0x05fc (depends on OTG_NUM_HOST_CHAN) + usb_dwc_host_chan_regs_t reserved_0x0600_0x06fc[8]; // 0x0600 to 0x06fc (depends on OTG_NUM_HOST_CHAN) + uint32_t reserved_0x0700_0x07fc[64]; // 0x0700 to 0x07fc + + // Device Mode Registers volatile usb_dwc_dcfg_reg_t dcfg_reg; // 0x0800 volatile usb_dwc_dctl_reg_t dctl_reg; // 0x0804 volatile usb_dwc_dsts_reg_t dsts_reg; // 0x0808 - uint32_t reserved_0x080c_0x0810[1]; // 0x080c to 0x0810 - - //Device Mode Registers - volatile usb_dwc_diepmsk_reg_t diepmsk_reg; // 0x810 + uint32_t reserved_0x080c[1]; // 0x080c + volatile usb_dwc_diepmsk_reg_t diepmsk_reg; // 0x0810 volatile usb_dwc_doepmsk_reg_t doepmsk_reg; // 0x0814 volatile usb_dwc_daint_reg_t daint_reg; // 0x0818 volatile usb_dwc_daintmsk_reg_t daintmsk_reg; // 0x081c - uint32_t reserved_0x0820_0x0828[2]; // 0x0820 to 0x0828 + uint32_t reserved_0x0820; // 0x0820 + uint32_t reserved_0x0824; // 0x0824 volatile usb_dwc_dvbusdis_reg_t dvbusdis_reg; // 0x0828 volatile usb_dwc_dvbuspulse_reg_t dvbuspulse_reg; // 0x082c volatile usb_dwc_dthrctl_reg_t dthrctl_reg; // 0x0830 volatile usb_dwc_diepempmsk_reg_t diepempmsk_reg; // 0x0834 - uint32_t reserved_0x0838_0x0900[50]; // 0x0838 to 0x0900 + uint32_t reserved_0x0838; // 0x0838 + uint32_t reserved_0x083c; // 0x083c + uint32_t reserved_0x0840; // 0x0840 + uint32_t reserved_0x0844_0x087c[15]; // 0x0844 to 0x087c (depends on OTG_NUM_EPS) + uint32_t reserved_0x0880; // 0x0880 + uint32_t reserved_0x0884_0x08c0[15]; // 0x0884 to 0x08c0 (depends on OTG_NUM_EPS) + uint32_t reserved_0x08c4_0x08fc[16]; // 0x08c4 to 0x08fc - //Deivce: IN EP0 reigsters + // Device: IN EP0 registers volatile usb_dwc_diepctl0_reg_t diepctl0_reg; // 0x0900 - uint32_t reserved_0x0904_0x0908[1]; // 0x0904 to 0x0908 + uint32_t reserved_0x0904[1]; // 0x0904 volatile usb_dwc_diepint0_reg_t diepint0_reg; // 0x0908 - uint32_t reserved_0x090c_0x0910[1]; // 0x090c to 0x0910 + uint32_t reserved_0x090c[1]; // 0x090c volatile usb_dwc_dieptsiz0_reg_t dieptsiz0_reg; // 0x0910 volatile usb_dwc_diepdma0_reg_t diepdma0_reg; // 0x0914 volatile usb_dwc_dtxfsts0_reg_t dtxfsts0_reg; // 0x0918 volatile usb_dwc_diepdmab0_reg_t diepdmab0_reg; // 0x091c - //Deivce: IN EP registers - usb_dwc_in_ep_regs_t in_eps[6]; // 0x0920 to 0x09e0 - usb_dwc_in_ep_regs_t reserved_0x09e0_0x0b00[9]; // 0x09e0 to 0x0b00 + // Device: IN EP registers + usb_dwc_in_ep_regs_t in_eps[6]; // 0x0920 to 0x09dc (depends on OTG_NUM_EPS) + usb_dwc_in_ep_regs_t reserved_0x09e0_0x0afc[9]; // 0x09e0 to 0x0afc (depends on OTG_NUM_EPS) - //Device: OUT EP0 reigsters + // Device: OUT EP0 registers volatile usb_dwc_doepctl0_reg_t doepctl0_reg; // 0x0b00 - uint32_t reserved_0x0b04_0x0b08[1]; // 0x0b04 to 0x0b08 + uint32_t reserved_0x0b04[1]; // 0x0b04 volatile usb_dwc_doepint0_reg_t doepint0_reg; // 0b0b08 - uint32_t reserved_0x0b0c_0x0b10[1]; // 0x0b0c to 0x0b10 + uint32_t reserved_0x0b0c[1]; // 0x0b0c volatile usb_dwc_doeptsiz0_reg_t doeptsiz0_reg; // 0x0b10 volatile usb_dwc_doepdma0_reg_t doepdma0_reg; // 0x0b14 - uint32_t reserved_0x0b18_0x0b1c[1]; // 0x0b18 to 0x0b1c + uint32_t reserved_0x0b18[1]; // 0x0b18 volatile usb_dwc_doepdmab0_reg_t doepdmab0_reg; // 0x0b1c - //Deivce: OUT EP registers - usb_dwc_out_ep_regs_t out_eps[6]; // 0xb1c - usb_dwc_out_ep_regs_t reserved_0x0be0_0x0d00[9]; // 0x0be0 to 0x0d00 - uint32_t reserved_0x0d00_0x0e00[64]; // 0x0d00 to 0x0e00 - volatile usb_dwc_pcgcctl_reg_t pcgcctl_reg; // 0x0e00 - uint32_t reserved_0x0e04_0x0e08[1]; // 0x0d00 to 0x0e00 -} usb_dwc_dev_t; + // Device: OUT EP registers + usb_dwc_out_ep_regs_t out_eps[6]; // 0x0b20 to 0x0bdc (depends on OTG_NUM_EPS) + usb_dwc_out_ep_regs_t reserved_0x0be0_0x0d00[9]; // 0x0be0 to 0x0cfc (depends on OTG_NUM_EPS) + uint32_t reserved_0x0d00_0x0dfc[64]; // 0x0d00 to 0x0dfc + // Power and Clock Gating + volatile usb_dwc_pcgcctl_reg_t pcgcctl_reg; // 0x0e00 + uint32_t reserved_0x0e04[1]; // 0x0e04 +} usb_dwc_dev_t; #ifndef __cplusplus _Static_assert(sizeof(usb_dwc_dev_t) == 0xe08, "Invalid size of usb_dwc_dev_t structure"); @@ -1146,7 +1173,6 @@ _Static_assert(sizeof(usb_dwc_dev_t) == 0xe08, "Invalid size of usb_dwc_dev_t st extern usb_dwc_dev_t USB_DWC; - #ifdef __cplusplus } #endif diff --git a/components/soc/esp32s3/include/soc/usb_dwc_cfg.h b/components/soc/esp32s3/include/soc/usb_dwc_cfg.h new file mode 100644 index 0000000000..37cdcdf4bf --- /dev/null +++ b/components/soc/esp32s3/include/soc/usb_dwc_cfg.h @@ -0,0 +1,89 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +/* +Configuration Set ID: 1 +*/ + +/* 3.1 Basic Config Parameters */ +#define OTG_MODE 0 +#define OTG_ARCHITECTURE 2 +#define OTG_SINGLE_POINT 1 +#define OTG_ENABLE_LPM 0 +#define OTG_EN_DED_TX_FIFO 1 +#define OTG_EN_DESC_DMA 1 +#define OTG_MULTI_PROC_INTRPT 0 + +/* 3.2 USB Physical Layer Interface Parameters */ +#define OTG_HSPHY_INTERFACE 0 +#define OTG_FSPHY_INTERFACE 1 +#define OTG_ENABLE_IC_USB 0 +#define OTG_I2C_INTERFACE 0 +#define OTG_ADP_SUPPORT 0 +#define OTG_BC_SUPPORT 0 + +/* 3.3 Device Endpoint Configuration Parameters */ +#define OTG_NUM_EPS 6 +#define OTG_NUM_IN_EPS 5 +#define OTG_NUM_CRL_EPS 0 + +/* 3.4 Host Endpoint Configuration Parameters */ +#define OTG_NUM_HOST_CHAN 8 +#define OTG_EN_PERIO_HOST 1 + +/* 3.5 Endpoint Channel FIFO Configuration Parameters */ +#define OTG_DFIFO_DEPTH 256 +#define OTG_DFIFO_DYNAMIC 1 +#define OTG_RX_DFIFO_DEPTH 256 +#define OTG_TX_HNPERIO_DFIFO_DEPTH 256 +#define OTG_TX_NPERIO_DFIFO_DEPTH 256 +#define OTG_TX_HPERIO_DFIFO_DEPTH 256 +#define OTG_NPERIO_TX_QUEUE_DEPTH 4 +#define OTG_PERIO_TX_QUEUE_DEPTH 8 + +/* 3.6 Additional Configuration Options Parameters */ +#define OTG_TRANS_COUNT_WIDTH 16 +#define OTG_PACKET_COUNT_WIDTH 7 +#define OTG_RM_OPT_FEATURES 1 +#define OTG_EN_PWROPT 1 +#define OTG_SYNC_RESET_TYPE 0 +#define OTG_EN_IDDIG_FILTER 1 +#define OTG_EN_VBUSVALID_FILTER 1 +#define OTG_EN_A_VALID_FILTER 1 +#define OTG_EN_B_VALID_FILTER 1 +#define OTG_EN_SESSIONEND_FILTER 1 +#define OTG_EXCP_CNTL_XFER_FLOW 1 +#define OTG_PWR_CLAMP 0 +#define OTG_PWR_SWITCH_POLARITY 0 + +/* 3.7 Endpoint Direction Parameters */ +#define OTG_EP_DIR_1 0 +#define OTG_EP_DIR_2 0 +#define OTG_EP_DIR_3 0 +#define OTG_EP_DIR_4 0 +#define OTG_EP_DIR_5 0 +#define OTG_EP_DIR_6 0 + +/* 3.8 Device Periodic FIFO Depth Parameters */ + +/* 3.9 Device IN Endpoint FIFO Depth Parameters */ +#define OTG_TX_DINEP_DFIFO_DEPTH_1 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_2 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_3 256 +#define OTG_TX_DINEP_DFIFO_DEPTH_4 256 + +/* 3.10 UTMI-To-UTMI Bridge Component Parameters */ +#define U2UB_EN 0 + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32s3/include/soc/usb_dwc_struct.h b/components/soc/esp32s3/include/soc/usb_dwc_struct.h index 0402c4a83e..5fd5800715 100644 --- a/components/soc/esp32s3/include/soc/usb_dwc_struct.h +++ b/components/soc/esp32s3/include/soc/usb_dwc_struct.h @@ -1,16 +1,21 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once +#include + #ifdef __cplusplus extern "C" { #endif -#include +/* +Registers and fields were generated based on a set of configuration options. +See the ESP32-S3 "usb_dwc_cfg.h" for more details. +*/ /* ---------------------------- Register Types ------------------------------ */ @@ -29,7 +34,7 @@ typedef union { uint32_t hstsethnpen: 1; uint32_t devhnpen: 1; uint32_t ehen: 1; - uint32_t reserved2: 2; + uint32_t reserved_13: 2; uint32_t dbncefltrbypass: 1; uint32_t conidsts: 1; uint32_t dbnctime: 1; @@ -37,23 +42,26 @@ typedef union { uint32_t bsesvld: 1; uint32_t otgver: 1; uint32_t curmod: 1; - uint32_t reserved10: 10; + uint32_t reserved_22: 5; + uint32_t reserved_27: 1; + uint32_t reserved_28: 4; }; uint32_t val; } usb_dwc_gotgctl_reg_t; typedef union { struct { - uint32_t reserved2: 2; + uint32_t reserved_0: 2; uint32_t sesenddet: 1; - uint32_t reserved5: 5; + uint32_t reserved_3: 5; uint32_t sesreqsucstschng: 1; uint32_t hstnegsucstschng: 1; - uint32_t reserved7: 7; + uint32_t reserved_10: 7; uint32_t hstnegdet: 1; uint32_t adevtoutchg: 1; uint32_t dbncedone: 1; - uint32_t reserved12: 12; + uint32_t reserved_20: 1; + uint32_t reserved_21: 11; }; uint32_t val; } usb_dwc_gotgint_reg_t; @@ -63,34 +71,44 @@ typedef union { uint32_t glbllntrmsk: 1; uint32_t hbstlen: 4; uint32_t dmaen: 1; - uint32_t reserved1: 1; + uint32_t reserved_6: 1; uint32_t nptxfemplvl: 1; uint32_t ptxfemplvl: 1; - uint32_t reserved12: 12; + uint32_t reserved_9: 12; uint32_t remmemsupp: 1; uint32_t notialldmawrit: 1; uint32_t ahbsingle: 1; uint32_t invdescendianess: 1; - uint32_t reserved7: 7; + uint32_t reserved_25: 7; }; uint32_t val; - //Checked } usb_dwc_gahbcfg_reg_t; typedef union { struct { uint32_t toutcal: 3; uint32_t phyif: 1; - uint32_t reserved1a: 1; + uint32_t reserved_4: 1; uint32_t fsintf: 1; uint32_t physel: 1; - uint32_t reserved1b: 1; + uint32_t reserved_7: 1; uint32_t srpcap: 1; uint32_t hnpcap: 1; uint32_t usbtrdtim: 4; - uint32_t reserved8: 8; + uint32_t reserved_14: 1; + uint32_t phylpwrclksel: 1; + uint32_t reserved_16: 1; + uint32_t reserved_17: 1; + uint32_t reserved_18: 1; + uint32_t reserved_19: 1; + uint32_t reserved_20: 1; + uint32_t reserved_21: 1; uint32_t termseldlpulse: 1; - uint32_t reserved5: 5; + uint32_t reserved_23: 1; + uint32_t reserved_24: 1; + uint32_t reserved_25: 1; + uint32_t icusbcap: 1; + uint32_t reserved_27: 1; uint32_t txenddelay: 1; uint32_t forcehstmode: 1; uint32_t forcedevmode: 1; @@ -104,11 +122,11 @@ typedef union { uint32_t csftrst: 1; uint32_t piufssftrst: 1; uint32_t frmcntrrst: 1; - uint32_t reserved1: 1; + uint32_t reserved_3: 1; uint32_t rxfflsh: 1; uint32_t txfflsh: 1; uint32_t txfnum: 5; - uint32_t reserved19: 19; + uint32_t reserved_11: 19; uint32_t dmareq: 1; uint32_t ahbidle: 1; }; @@ -117,22 +135,23 @@ typedef union { typedef union { struct { - uint32_t curmod_int: 1; + uint32_t curmod: 1; uint32_t modemis: 1; uint32_t otgint: 1; uint32_t sof: 1; - uint32_t rxflvi: 1; + uint32_t rxflvl: 1; uint32_t nptxfemp: 1; uint32_t ginnakeff: 1; uint32_t goutnakeff: 1; - uint32_t reserved2: 2; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; uint32_t erlysusp: 1; uint32_t usbsusp: 1; uint32_t usbrst: 1; uint32_t enumdone: 1; uint32_t isooutdrop: 1; uint32_t eopf: 1; - uint32_t reserved1a: 1; + uint32_t reserved_16: 1; uint32_t epmis: 1; uint32_t iepint: 1; uint32_t oepint: 1; @@ -140,10 +159,10 @@ typedef union { uint32_t incompip: 1; uint32_t fetsusp: 1; uint32_t resetdet: 1; - uint32_t prtlnt: 1; - uint32_t hchlnt: 1; + uint32_t prtint: 1; + uint32_t hchint: 1; uint32_t ptxfemp: 1; - uint32_t reserved1b: 1; + uint32_t reserved_27: 1; uint32_t conidstschng: 1; uint32_t disconnint: 1; uint32_t sessreqint: 1; @@ -154,22 +173,23 @@ typedef union { typedef union { struct { - uint32_t reserved1a: 1; + uint32_t reserved_0: 1; uint32_t modemismsk: 1; uint32_t otgintmsk: 1; uint32_t sofmsk: 1; - uint32_t rxflvimsk: 1; + uint32_t rxflvlmsk: 1; uint32_t nptxfempmsk: 1; uint32_t ginnakeffmsk: 1; uint32_t goutnackeffmsk: 1; - uint32_t reserved2: 2; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; uint32_t erlysuspmsk: 1; uint32_t usbsuspmsk: 1; uint32_t usbrstmsk: 1; uint32_t enumdonemsk: 1; uint32_t isooutdropmsk: 1; uint32_t eopfmsk: 1; - uint32_t reserved1b: 1; + uint32_t reserved_16: 1; uint32_t epmismsk: 1; uint32_t iepintmsk: 1; uint32_t oepintmsk: 1; @@ -177,10 +197,10 @@ typedef union { uint32_t incompipmsk: 1; uint32_t fetsuspmsk: 1; uint32_t resetdetmsk: 1; - uint32_t prtlntmsk: 1; + uint32_t prtintmsk: 1; uint32_t hchintmsk: 1; uint32_t ptxfempmsk: 1; - uint32_t reserved1c: 1; + uint32_t reserved_27: 1; uint32_t conidstschngmsk: 1; uint32_t disconnintmsk: 1; uint32_t sessreqintmsk: 1; @@ -191,12 +211,13 @@ typedef union { typedef union { struct { - uint32_t g_chnum: 4; - uint32_t g_bcnt: 11; - uint32_t g_dpid: 2; - uint32_t g_pktsts: 4; - uint32_t g_fn: 4; - uint32_t reserved7: 7; + uint32_t chnum: 4; + uint32_t bcnt: 11; + uint32_t dpid: 2; + uint32_t pktsts: 4; + uint32_t fn: 4; + uint32_t reserved_25: 6; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_grxstsr_reg_t; @@ -208,7 +229,8 @@ typedef union { uint32_t dpid: 2; uint32_t pktsts: 4; uint32_t fn: 4; - uint32_t reserved7: 7; + uint32_t reserved_25: 6; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_grxstsp_reg_t; @@ -216,7 +238,7 @@ typedef union { typedef union { struct { uint32_t rxfdep: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_grxfsiz_reg_t; @@ -232,10 +254,9 @@ typedef union { typedef union { struct { uint32_t nptxfspcavail: 16; - uint32_t nptxqspcavail: 4; - uint32_t reserved4: 4; + uint32_t nptxqspcavail: 8; uint32_t nptxqtop: 7; - uint32_t reserved1: 1; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_gnptxsts_reg_t; @@ -266,11 +287,11 @@ typedef union { uint32_t periosupport: 1; uint32_t dynfifosizing: 1; uint32_t multiprocintrpt: 1; - uint32_t reserved1a: 1; + uint32_t reserved_21: 1; uint32_t nptxqdepth: 2; uint32_t ptxqdepth: 2; uint32_t tknqdepth: 5; - uint32_t reserved1b: 1; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_ghwcfg2_reg_t; @@ -295,25 +316,25 @@ typedef union { typedef union { struct { - uint32_t g_numdevperioeps: 4; - uint32_t g_partialpwrdn: 1; - uint32_t g_ahbfreq: 1; - uint32_t g_hibernation: 1; - uint32_t g_extendedhibernation: 1; - uint32_t reserved4: 4; - uint32_t g_acgsupt: 1; - uint32_t g_enhancedlpmsupt: 1; - uint32_t g_phydatawidth: 2; - uint32_t g_numctleps: 4; - uint32_t g_iddqfltr: 1; - uint32_t g_vbusvalidfltr: 1; - uint32_t g_avalidfltr: 1; - uint32_t g_bvalidfltr: 1; - uint32_t g_sessendfltr: 1; - uint32_t g_dedfifomode: 1; - uint32_t g_ineps: 4; - uint32_t g_descdmaenabled: 1; - uint32_t g_descdma: 1; + uint32_t numdevperioeps: 4; + uint32_t partialpwrdn: 1; + uint32_t ahbfreq: 1; + uint32_t hibernation: 1; + uint32_t extendedhibernation: 1; + uint32_t reserved_8: 4; + uint32_t acgsupt: 1; + uint32_t enhancedlpmsupt: 1; + uint32_t phydatawidth: 2; + uint32_t numctleps: 4; + uint32_t iddqfltr: 1; + uint32_t vbusvalidfltr: 1; + uint32_t avalidfltr: 1; + uint32_t bvalidfltr: 1; + uint32_t sessendfltr: 1; + uint32_t dedfifomode: 1; + uint32_t ineps: 4; + uint32_t descdmaenabled: 1; + uint32_t descdma: 1; }; uint32_t val; } usb_dwc_ghwcfg4_reg_t; @@ -337,8 +358,8 @@ typedef union { typedef union { struct { - uint32_t inepitxfstaddr: 16; - uint32_t inep1txfdep: 16; + uint32_t inepntxfstaddr: 16; + uint32_t inepntxfdep: 16; }; uint32_t val; } usb_dwc_dieptxfi_reg_t; @@ -347,15 +368,15 @@ typedef union { struct { uint32_t fslspclksel: 2; uint32_t fslssupp: 1; - uint32_t reserved4a: 4; + uint32_t reserved_3: 4; uint32_t ena32khzs: 1; uint32_t resvalid: 8; - uint32_t reserved1: 1; - uint32_t reserved6: 6; + uint32_t reserved_16: 1; + uint32_t reserved_17: 6; uint32_t descdma: 1; uint32_t frlisten: 2; uint32_t perschedena: 1; - uint32_t reserved4b: 4; + uint32_t reserved_27: 4; uint32_t modechtimen: 1; }; uint32_t val; @@ -365,15 +386,14 @@ typedef union { struct { uint32_t frint: 16; uint32_t hfirrldctrl: 1; - uint32_t reserved15: 15; + uint32_t reserved_17: 15; }; uint32_t val; } usb_dwc_hfir_reg_t; typedef union { struct { - uint32_t frnum: 14; - uint32_t reserved: 2; + uint32_t frnum: 16; uint32_t frrem: 16; }; uint32_t val; @@ -382,8 +402,7 @@ typedef union { typedef union { struct { uint32_t ptxfspcavail: 16; - uint32_t ptxqspcavail: 5; - uint32_t reserved: 3; + uint32_t ptxqspcavail: 8; uint32_t ptxqtop: 8; }; uint32_t val; @@ -392,7 +411,7 @@ typedef union { typedef union { struct { uint32_t haint: 8; - uint32_t reserved24: 24; + uint32_t reserved_8: 24; }; uint32_t val; } usb_dwc_haint_reg_t; @@ -400,7 +419,7 @@ typedef union { typedef union { struct { uint32_t haintmsk: 8; - uint32_t reserved24: 24; + uint32_t reserved_8: 24; }; uint32_t val; } usb_dwc_haintmsk_reg_t; @@ -423,12 +442,12 @@ typedef union { uint32_t prtres: 1; uint32_t prtsusp: 1; uint32_t prtrst: 1; - uint32_t reserved1: 1; + uint32_t reserved_9: 1; uint32_t prtlnsts: 2; uint32_t prtpwr: 1; uint32_t prttstctl: 4; uint32_t prtspd: 2; - uint32_t reserved13: 13; + uint32_t reserved_19: 13; }; uint32_t val; } usb_dwc_hprt_reg_t; @@ -438,7 +457,7 @@ typedef union { uint32_t mps: 11; uint32_t epnum: 4; uint32_t epdir: 1; - uint32_t reserved: 1; + uint32_t reserved_16: 1; uint32_t lspddev: 1; uint32_t eptype: 2; uint32_t ec: 2; @@ -466,7 +485,7 @@ typedef union { uint32_t bnaintr: 1; uint32_t xcs_xact_err: 1; uint32_t desc_lst_rollintr: 1; - uint32_t reserved18: 18; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_hcint_reg_t; @@ -476,28 +495,26 @@ typedef union { uint32_t xfercomplmsk: 1; uint32_t chhltdmsk: 1; uint32_t ahberrmsk: 1; - uint32_t stallmsk: 1; - uint32_t nakmsk: 1; - uint32_t ackmsk: 1; - uint32_t nyetmsk: 1; - uint32_t xacterrmsk: 1; - uint32_t bblerrmsk: 1; - uint32_t frmovrunmsk: 1; - uint32_t datatglerrmsk: 1; + uint32_t reserved_3: 1; + uint32_t reserved_4: 1; + uint32_t reserved_5: 1; + uint32_t reserved_6: 1; + uint32_t reserved_7: 1; + uint32_t reserved_8: 1; + uint32_t reserved_9: 1; + uint32_t reserved_10: 1; uint32_t bnaintrmsk: 1; - uint32_t reserved1: 1; + uint32_t reserved_12: 1; uint32_t desc_lst_rollintrmsk: 1; - uint32_t reserved18: 18; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_hcintmsk_reg_t; typedef union { struct { - uint32_t sched_info: 8; - uint32_t ntd: 8; - uint32_t reserved3: 3; - uint32_t reserved10: 10; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). uint32_t pid: 2; uint32_t dopng: 1; }; @@ -506,14 +523,8 @@ typedef union { typedef union { struct { - uint32_t reserved3: 3; - uint32_t ctd: 6; - uint32_t dmaaddr: 23; - } non_iso; - struct { - uint32_t reserved3: 3; - uint32_t dmaaddr_ctd: 29; - } iso; + uint32_t dmaaddr; + }; uint32_t val; } usb_dwc_hcdma_reg_t; @@ -526,16 +537,16 @@ typedef union { typedef union { struct { - uint32_t reserved2a: 2; + uint32_t devspd: 2; uint32_t nzstsouthshk: 1; - uint32_t reserved1: 1; + uint32_t ena32khzsusp: 1; uint32_t devaddr: 7; - uint32_t perfrlint: 2; + uint32_t perfrint: 2; uint32_t endevoutnak: 1; uint32_t xcvrdly: 1; uint32_t erraticintmsk: 1; - uint32_t reserved2b: 2; - uint32_t epmiscnt: 5; + uint32_t reserved_16: 2; + uint32_t reserved_18: 5; uint32_t descdma: 1; uint32_t perschintvl: 2; uint32_t resvalid: 6; @@ -555,13 +566,13 @@ typedef union { uint32_t sgoutnak: 1; uint32_t cgoutnak: 1; uint32_t pwronprgdone: 1; - uint32_t reserved1: 1; + uint32_t reserved_12: 1; uint32_t gmc: 2; uint32_t ignrfrmnum: 1; uint32_t nakonbble: 1; - uint32_t encountonbna: 1; - uint32_t deepsleepbeslreject: 1; - uint32_t reserved3: 13; + uint32_t encontonbna: 1; + uint32_t reserved_18: 1; + uint32_t reserved_19: 13; }; uint32_t val; } usb_dwc_dctl_reg_t; @@ -571,29 +582,29 @@ typedef union { uint32_t suspsts: 1; uint32_t enumspd: 2; uint32_t errticerr: 1; - uint32_t reserved4: 4; + uint32_t reserved_4: 4; uint32_t soffn: 14; uint32_t devlnsts: 2; - uint32_t reserved8: 8; + uint32_t reserved_24: 8; }; uint32_t val; } usb_dwc_dsts_reg_t; typedef union { struct { - uint32_t di_xfercomplmsk: 1; - uint32_t di_epdisbldmsk: 1; - uint32_t di_ahbermsk: 1; + uint32_t xfercomplmsk: 1; + uint32_t epdisbldmsk: 1; + uint32_t ahberrmsk: 1; uint32_t timeoutmsk: 1; uint32_t intkntxfempmsk: 1; uint32_t intknepmismsk: 1; uint32_t inepnakeffmsk: 1; - uint32_t reserved1: 1; + uint32_t reserved_7: 1; uint32_t txfifoundrnmsk: 1; uint32_t bnainintrmsk: 1; - uint32_t reserved3: 3; - uint32_t di_nakmsk: 1; - uint32_t reserved18: 18; + uint32_t reserved_10: 3; + uint32_t nakmsk: 1; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_diepmsk_reg_t; @@ -602,19 +613,19 @@ typedef union { struct { uint32_t xfercomplmsk: 1; uint32_t epdisbldmsk: 1; - uint32_t ahbermsk: 1; + uint32_t ahberrmsk: 1; uint32_t setupmsk: 1; uint32_t outtknepdismsk: 1; uint32_t stsphsercvdmsk: 1; uint32_t back2backsetup: 1; - uint32_t reserved1: 1; + uint32_t reserved_7: 1; uint32_t outpkterrmsk: 1; uint32_t bnaoutintrmsk: 1; - uint32_t reserved2: 2; + uint32_t reserved_10: 2; uint32_t bbleerrmsk: 1; uint32_t nakmsk: 1; uint32_t nyetmsk: 1; - uint32_t reserved17: 17; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_doepmsk_reg_t; @@ -628,7 +639,7 @@ typedef union { uint32_t inepint4: 1; uint32_t inepint5: 1; uint32_t inepint6: 1; - uint32_t reserved9a: 9; + uint32_t reserved_7: 9; uint32_t outepint0: 1; uint32_t outepint1: 1; uint32_t outepint2: 1; @@ -636,7 +647,7 @@ typedef union { uint32_t outepint4: 1; uint32_t outepint5: 1; uint32_t outepint6: 1; - uint32_t reserved9b: 9; + uint32_t reserved_24: 9; }; uint32_t val; } usb_dwc_daint_reg_t; @@ -650,7 +661,7 @@ typedef union { uint32_t inepmsk4: 1; uint32_t inepmsk5: 1; uint32_t inepmsk6: 1; - uint32_t reserved9a: 9; + uint32_t reserved_7: 9; uint32_t outepmsk0: 1; uint32_t outepmsk1: 1; uint32_t outepmsk2: 1; @@ -658,7 +669,7 @@ typedef union { uint32_t outepmsk4: 1; uint32_t outepmsk5: 1; uint32_t outepmsk6: 1; - uint32_t reserved9b: 9; + uint32_t reserved_24: 9; }; uint32_t val; } usb_dwc_daintmsk_reg_t; @@ -666,7 +677,7 @@ typedef union { typedef union { struct { uint32_t dvbusdis: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dvbusdis_reg_t; @@ -674,7 +685,7 @@ typedef union { typedef union { struct { uint32_t dvbuspulse: 12; - uint32_t reserved20: 20; + uint32_t reserved_12: 20; }; uint32_t val; } usb_dwc_dvbuspulse_reg_t; @@ -685,109 +696,108 @@ typedef union { uint32_t isothren: 1; uint32_t txthrlen: 9; uint32_t ahbthrratio: 2; - uint32_t reserved3: 3; + uint32_t reserved_13: 3; uint32_t rxthren: 1; uint32_t rxthrlen: 9; - uint32_t reserved1: 1; + uint32_t reserved_26: 1; uint32_t arbprken: 1; - uint32_t reserved4: 4; + uint32_t reserved_28: 4; }; uint32_t val; } usb_dwc_dthrctl_reg_t; typedef union { struct { - uint32_t ineptxfernpmsk: 16; - uint32_t reserved16: 16; + uint32_t ineptxfempmsk: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_diepempmsk_reg_t; typedef union { struct { - uint32_t mps0: 2; - uint32_t reserved9: 9; - uint32_t reserved4: 4; - uint32_t usbactep0: 1; - uint32_t reserved1a: 1; - uint32_t naksts0: 1; - uint32_t eptype0: 2; - uint32_t reserved1b: 1; - uint32_t stall0: 1; - uint32_t txfnum0: 4; - uint32_t cnak0: 1; - uint32_t snak0: 1; - uint32_t reserved2: 2; - uint32_t epdis0: 1; - uint32_t epena0: 1; + uint32_t mps: 2; + uint32_t reserved_2: 9; + uint32_t reserved_11: 4; + uint32_t usbactep: 1; + uint32_t reserved_16: 1; + uint32_t naksts: 1; + uint32_t eptype: 2; + uint32_t reserved_20: 1; + uint32_t stall: 1; + uint32_t txfnum: 4; + uint32_t cnak: 1; + uint32_t snak: 1; + uint32_t reserved_28: 2; + uint32_t epdis: 1; + uint32_t epena: 1; }; uint32_t val; } usb_dwc_diepctl0_reg_t; typedef union { struct { - uint32_t xfercompl0: 1; - uint32_t epdisbld0: 1; - uint32_t ahberr0: 1; - uint32_t timeout0: 1; - uint32_t intkntxfemp0: 1; - uint32_t intknepmis0: 1; - uint32_t inepnakeff0: 1; - uint32_t txfemp0: 1; - uint32_t txfifoundrn0: 1; - uint32_t bnaintr0: 1; - uint32_t reserved1: 1; - uint32_t pktdrpsts0: 1; - uint32_t bbleerr0: 1; - uint32_t nakintrpt0: 1; - uint32_t nyetintrpt0: 1; - uint32_t reserved17: 17; + uint32_t xfercompl: 1; + uint32_t epdisbld: 1; + uint32_t ahberr: 1; + uint32_t timeout: 1; + uint32_t intkntxfemp: 1; + uint32_t intknepmis: 1; + uint32_t inepnakeff: 1; + uint32_t txfemp: 1; + uint32_t txfifoundrn: 1; + uint32_t bnaintr: 1; + uint32_t reserved_10: 1; + uint32_t pktdrpsts: 1; + uint32_t bbleerr: 1; + uint32_t nakintrpt: 1; + uint32_t nyetintrpt: 1; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_diepint0_reg_t; typedef union { struct { - uint32_t xfersize0: 7; - uint32_t reserved12: 12; - uint32_t pktcnt0: 2; - uint32_t reserved11: 11; + uint32_t xfersize: 7; + uint32_t reserved_7: 12; + uint32_t pktcnt: 2; + uint32_t reserved_21: 11; }; uint32_t val; } usb_dwc_dieptsiz0_reg_t; typedef union { struct { - uint32_t dmaaddr0; + uint32_t dmaaddr; }; uint32_t val; } usb_dwc_diepdma0_reg_t; typedef union { struct { - uint32_t ineptxfspcavail0: 16; - uint32_t reserved16: 16; + uint32_t ineptxfspcavail: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dtxfsts0_reg_t; typedef union { struct { - uint32_t dmabufferaddr0; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_diepdmab0_reg_t; typedef union { struct { - uint32_t mps: 2; - uint32_t reserved9: 9; - uint32_t reserved4: 4; + uint32_t mps: 11; + uint32_t reserved_11: 4; uint32_t usbactep: 1; - uint32_t reserved1a: 1; + uint32_t dpid: 1; uint32_t naksts: 1; uint32_t eptype: 2; - uint32_t reserved1b: 1; + uint32_t reserved_20: 1; uint32_t stall: 1; uint32_t txfnum: 4; uint32_t cnak: 1; @@ -812,29 +822,29 @@ typedef union { uint32_t txfemp: 1; uint32_t txfifoundrn: 1; uint32_t bnaintr: 1; - uint32_t reserved1: 1; + uint32_t reserved_10: 1; uint32_t pktdrpsts: 1; uint32_t bbleerr: 1; uint32_t nakintrpt: 1; uint32_t nyetintrpt: 1; - uint32_t reserved15: 17; + uint32_t reserved_15: 17; }; uint32_t val; } usb_dwc_diepint_reg_t; typedef union { struct { - uint32_t xfersize: 7; - uint32_t reserved12: 12; - uint32_t pktcnt: 2; - uint32_t reserved11: 11; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). + uint32_t mc: 2; + uint32_t reserved: 1; }; uint32_t val; } usb_dwc_dieptsiz_reg_t; typedef union { struct { - uint32_t dmaddr1; + uint32_t dmaddr; }; uint32_t val; } usb_dwc_diepdma_reg_t; @@ -842,83 +852,83 @@ typedef union { typedef union { struct { uint32_t ineptxfspcavail: 16; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_dtxfsts_reg_t; typedef union { struct { - uint32_t dmabufferaddr1; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_diepdmab_reg_t; typedef union { struct { - uint32_t mps0: 2; - uint32_t reserved13: 13; - uint32_t usbactep0: 1; - uint32_t reserved1: 1; - uint32_t naksts0: 1; - uint32_t eptype0: 2; - uint32_t snp0: 1; - uint32_t stall0: 1; - uint32_t reserved4: 4; - uint32_t cnak0: 1; - uint32_t snak0: 1; - uint32_t reserved2: 2; - uint32_t epdis0: 1; - uint32_t epena0: 1; + uint32_t mps: 2; + uint32_t reserved_2: 13; + uint32_t usbactep: 1; + uint32_t reserved_16: 1; + uint32_t naksts: 1; + uint32_t eptype: 2; + uint32_t snp: 1; + uint32_t stall: 1; + uint32_t reserved_22: 4; + uint32_t cnak: 1; + uint32_t snak: 1; + uint32_t reserved_28: 2; + uint32_t epdis: 1; + uint32_t epena: 1; }; uint32_t val; } usb_dwc_doepctl0_reg_t; typedef union { struct { - uint32_t xfercompl0: 1; - uint32_t epdisbld0: 1; - uint32_t ahberr0: 1; - uint32_t setup0: 1; - uint32_t outtknepdis0: 1; - uint32_t stsphsercvd0: 1; - uint32_t back2backsetup0: 1; - uint32_t reserved1a: 1; - uint32_t outpkterr0: 1; - uint32_t bnaintr0: 1; - uint32_t reserved1b: 1; - uint32_t pktdrpsts0: 1; - uint32_t bbleerr0: 1; - uint32_t nakintrpt0: 1; - uint32_t nyepintrpt0: 1; - uint32_t stuppktrcvd0: 1; - uint32_t reserved16: 16; + uint32_t xfercompl: 1; + uint32_t epdisbld: 1; + uint32_t ahberr: 1; + uint32_t setup: 1; + uint32_t outtknepdis: 1; + uint32_t stsphsercvd: 1; + uint32_t back2backsetup: 1; + uint32_t reserved_7: 1; + uint32_t outpkterr: 1; + uint32_t bnaintr: 1; + uint32_t reserved_10: 1; + uint32_t pktdrpsts: 1; + uint32_t bbleerr: 1; + uint32_t nakintrpt: 1; + uint32_t nyepintrpt: 1; + uint32_t stuppktrcvd: 1; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_doepint0_reg_t; typedef union { struct { - uint32_t xfersize0: 7; - uint32_t reserved12: 12; - uint32_t pktcnt0: 1; - uint32_t reserved9: 9; - uint32_t supcnt0: 2; - uint32_t reserved1: 1; + uint32_t xfersize: 7; + uint32_t reserved_7: 12; + uint32_t pktcnt: 1; + uint32_t reserved_20: 9; + uint32_t supcnt: 2; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_doeptsiz0_reg_t; typedef union { struct { - uint32_t dmaaddr0; + uint32_t dmaaddr; }; uint32_t val; } usb_dwc_doepdma0_reg_t; typedef union { struct { - uint32_t dmabufferaddr0; + uint32_t dmabufferaddr; }; uint32_t val; } usb_dwc_doepdmab0_reg_t; @@ -926,14 +936,14 @@ typedef union { typedef union { struct { uint32_t mps: 11; - uint32_t reserved4a: 4; + uint32_t reserved_11: 4; uint32_t usbactep: 1; - uint32_t reserved1: 1; + uint32_t dpid: 1; uint32_t naksts: 1; uint32_t eptype: 2; uint32_t snp: 1; uint32_t stall: 1; - uint32_t reserved4b: 4; + uint32_t reserved_22: 4; uint32_t cnak: 1; uint32_t snak: 1; uint32_t setd0pid: 1; @@ -953,28 +963,26 @@ typedef union { uint32_t outtknepdis: 1; uint32_t stsphsercvd: 1; uint32_t back2backsetup: 1; - uint32_t reserved1a: 1; + uint32_t reserved_7: 1; uint32_t outpkterr: 1; uint32_t bnaintr: 1; - uint32_t reserved1b: 1; + uint32_t reserved_10: 1; uint32_t pktdrpsts: 1; uint32_t bbleerr: 1; uint32_t nakintrpt: 1; - uint32_t nyepintrpt: 1; + uint32_t nyetintrpt: 1; uint32_t stuppktrcvd: 1; - uint32_t reserved16: 16; + uint32_t reserved_16: 16; }; uint32_t val; } usb_dwc_doepint_reg_t; typedef union { struct { - uint32_t xfersize: 7; - uint32_t reserved12: 12; - uint32_t pktcnt: 1; - uint32_t reserved9: 9; - uint32_t supcnt: 2; - uint32_t reserved1: 1; + uint32_t xfersize: 19; // Note: Width depends on OTG_TRANS_COUNT_WIDTH (see databook). + uint32_t pktcnt: 10; // Note: Width depends on OTG_PACKET_COUNT_WIDTH (see databook). + uint32_t rxdpid: 2; + uint32_t reserved_31: 1; }; uint32_t val; } usb_dwc_doeptsiz_reg_t; @@ -999,11 +1007,17 @@ typedef union { uint32_t gatehclk: 1; uint32_t pwrclmp: 1; uint32_t rstpdwnmodule: 1; - uint32_t reserved2: 2; + uint32_t reserved_4: 1; + uint32_t reserved_5: 1; uint32_t physleep: 1; uint32_t l1suspended: 1; uint32_t resetaftersusp: 1; - uint32_t reserved23: 23; + uint32_t reserved_9: 1; + uint32_t reserved_10: 1; + uint32_t reserved_11: 1; + uint32_t reserved_12: 1; + uint32_t reserved_13: 1; + uint32_t reserved_14: 18; }; uint32_t val; } usb_dwc_pcgcctl_reg_t; @@ -1012,21 +1026,21 @@ typedef union { typedef struct { volatile usb_dwc_hcchar_reg_t hcchar_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_hcint_reg_t hcint_reg; // 0x08 volatile usb_dwc_hcintmsk_reg_t hcintmsk_reg; // 0x0c volatile usb_dwc_hctsiz_reg_t hctsiz_reg; // 0x10 volatile usb_dwc_hcdma_reg_t hcdma_reg; // 0x14 - uint32_t reserved_0x14_0x14[1]; // 0x18 + uint32_t reserved_0x18[1]; // 0x18 volatile usb_dwc_hcdmab_reg_t hcdmab_reg; // 0x1c } usb_dwc_host_chan_regs_t; typedef struct { volatile usb_dwc_diepctl_reg_t diepctl_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_diepint_reg_t diepint_reg; // 0x08 - uint32_t reserved_0x0c_0x10[1]; // 0x0c - volatile usb_dwc_dieptsiz_reg_t dieptsiz_reg; // 0x010 + uint32_t reserved_0x0c[1]; // 0x0c + volatile usb_dwc_dieptsiz_reg_t dieptsiz_reg; // 0x10 volatile usb_dwc_diepdma_reg_t diepdma_reg; // 0x14 volatile usb_dwc_dtxfsts_reg_t dtxfsts_reg; // 0x18 volatile usb_dwc_diepdmab_reg_t diepdmab_reg; // 0x1c @@ -1034,19 +1048,19 @@ typedef struct { typedef struct { volatile usb_dwc_doepctl_reg_t doepctl_reg; // 0x00 - uint32_t reserved_0x04_0x08[1]; // 0x04 + uint32_t reserved_0x04[1]; // 0x04 volatile usb_dwc_doepint_reg_t doepint_reg; // 0x08 - uint32_t reserved_0x0c_0x10[1]; // 0x0c + uint32_t reserved_0x0c[1]; // 0x0c volatile usb_dwc_doeptsiz_reg_t doeptsiz_reg; // 0x10 volatile usb_dwc_doepdma_reg_t doepdma_reg; // 0x14 - uint32_t reserved_0x18_0x1c[1]; // 0x18 + uint32_t reserved_0x18[1]; // 0x18 volatile usb_dwc_doepdmab_reg_t doepdmab_reg; // 0x1c } usb_dwc_out_ep_regs_t; /* --------------------------- Register Layout ------------------------------ */ typedef struct { - //Global Registers + // Global Registers volatile usb_dwc_gotgctl_reg_t gotgctl_reg; // 0x0000 volatile usb_dwc_gotgint_reg_t gotgint_reg; // 0x0004 volatile usb_dwc_gahbcfg_reg_t gahbcfg_reg; // 0x0008 @@ -1059,86 +1073,99 @@ typedef struct { volatile usb_dwc_grxfsiz_reg_t grxfsiz_reg; // 0x0024 volatile usb_dwc_gnptxfsiz_reg_t gnptxfsiz_reg; // 0x0028 volatile usb_dwc_gnptxsts_reg_t gnptxsts_reg; // 0x002c - uint32_t reserved_0x0030_0x0040[4]; // 0x0030 to 0x0040 + uint32_t reserved_0x0030; // 0x0030 + uint32_t reserved_0x0034; // 0x0034 + uint32_t reserved_0x0038; // 0x0038 + uint32_t reserved_0x003c; // 0x003c volatile usb_dwc_gsnpsid_reg_t gsnpsid_reg; // 0x0040 volatile usb_dwc_ghwcfg1_reg_t ghwcfg1_reg; // 0x0044 volatile usb_dwc_ghwcfg2_reg_t ghwcfg2_reg; // 0x0048 volatile usb_dwc_ghwcfg3_reg_t ghwcfg3_reg; // 0x004c volatile usb_dwc_ghwcfg4_reg_t ghwcfg4_reg; // 0x0050 - uint32_t reserved_0x0054_0x005c[2]; // 0x0054 to 0x005c - - //FIFO Configurations + uint32_t reserved_0x0054; // 0x0054 + uint32_t reserved_0x0058; // 0x0058 volatile usb_dwc_gdfifocfg_reg_t gdfifocfg_reg; // 0x005c - uint32_t reserved_0x0060_0x0100[40]; // 0x0060 to 0x0100 + uint32_t reserved_0x0060; // 0x0060 + uint32_t reserved_0x0064_0x0100[39]; // 0x0064 to 0x0100 volatile usb_dwc_hptxfsiz_reg_t hptxfsiz_reg; // 0x0100 - volatile usb_dwc_dieptxfi_reg_t dieptxfi_regs[4]; // 0x0104 to 0x0114 - usb_dwc_dieptxfi_reg_t reserved_0x0114_0x0140[11]; // 0x0114 to 0x0140 - uint32_t reserved_0x140_0x400[176]; // 0x0140 to 0x0400 + volatile usb_dwc_dieptxfi_reg_t dieptxf_regs[4]; // 0x0104 to 0x0110 (depends on OTG_NUM_IN_EPS) + usb_dwc_dieptxfi_reg_t reserved_0x0114_0x013c[11]; // 0x0114 to 0x013c (depends on OTG_NUM_IN_EPS) + uint32_t reserved_0x140_0x3fc[176]; // 0x0140 to 0x03fc - //Host Mode Registers + // Host Mode Registers volatile usb_dwc_hcfg_reg_t hcfg_reg; // 0x0400 volatile usb_dwc_hfir_reg_t hfir_reg; // 0x0404 volatile usb_dwc_hfnum_reg_t hfnum_reg; // 0x0408 - uint32_t reserved_0x40c_0x410[1]; // 0x040c to 0x0410 + uint32_t reserved_0x40c[1]; // 0x040c volatile usb_dwc_hptxsts_reg_t hptxsts_reg; // 0x0410 volatile usb_dwc_haint_reg_t haint_reg; // 0x0414 volatile usb_dwc_haintmsk_reg_t haintmsk_reg; // 0x0418 volatile usb_dwc_hflbaddr_reg_t hflbaddr_reg; // 0x041c - uint32_t reserved_0x420_0x440[8]; // 0x0420 to 0x0440 + uint32_t reserved_0x420_0x43c[8]; // 0x0420 to 0x043c volatile usb_dwc_hprt_reg_t hprt_reg; // 0x0440 - uint32_t reserved_0x0444_0x0500[47]; // 0x0444 to 0x0500 - usb_dwc_host_chan_regs_t host_chans[8]; // 0x0500 to 0x0600 - usb_dwc_host_chan_regs_t reserved_0x0600_0x0700[8]; // 0x0600 to 0x0700 - uint32_t reserved_0x0700_0x0800[64]; // 0x0700 to 0x0800 + uint32_t reserved_0x0444_0x04fc[47]; // 0x0444 to 0x04fc + + // Host Channel Registers + usb_dwc_host_chan_regs_t host_chans[8]; // 0x0500 to 0x05fc (depends on OTG_NUM_HOST_CHAN) + usb_dwc_host_chan_regs_t reserved_0x0600_0x06fc[8]; // 0x0600 to 0x06fc (depends on OTG_NUM_HOST_CHAN) + uint32_t reserved_0x0700_0x07fc[64]; // 0x0700 to 0x07fc + + // Device Mode Registers volatile usb_dwc_dcfg_reg_t dcfg_reg; // 0x0800 volatile usb_dwc_dctl_reg_t dctl_reg; // 0x0804 volatile usb_dwc_dsts_reg_t dsts_reg; // 0x0808 - uint32_t reserved_0x080c_0x0810[1]; // 0x080c to 0x0810 - - //Device Mode Registers - volatile usb_dwc_diepmsk_reg_t diepmsk_reg; // 0x810 + uint32_t reserved_0x080c[1]; // 0x080c + volatile usb_dwc_diepmsk_reg_t diepmsk_reg; // 0x0810 volatile usb_dwc_doepmsk_reg_t doepmsk_reg; // 0x0814 volatile usb_dwc_daint_reg_t daint_reg; // 0x0818 volatile usb_dwc_daintmsk_reg_t daintmsk_reg; // 0x081c - uint32_t reserved_0x0820_0x0828[2]; // 0x0820 to 0x0828 + uint32_t reserved_0x0820; // 0x0820 + uint32_t reserved_0x0824; // 0x0824 volatile usb_dwc_dvbusdis_reg_t dvbusdis_reg; // 0x0828 volatile usb_dwc_dvbuspulse_reg_t dvbuspulse_reg; // 0x082c volatile usb_dwc_dthrctl_reg_t dthrctl_reg; // 0x0830 volatile usb_dwc_diepempmsk_reg_t diepempmsk_reg; // 0x0834 - uint32_t reserved_0x0838_0x0900[50]; // 0x0838 to 0x0900 + uint32_t reserved_0x0838; // 0x0838 + uint32_t reserved_0x083c; // 0x083c + uint32_t reserved_0x0840; // 0x0840 + uint32_t reserved_0x0844_0x087c[15]; // 0x0844 to 0x087c (depends on OTG_NUM_EPS) + uint32_t reserved_0x0880; // 0x0880 + uint32_t reserved_0x0884_0x08c0[15]; // 0x0884 to 0x08c0 (depends on OTG_NUM_EPS) + uint32_t reserved_0x08c4_0x08fc[16]; // 0x08c4 to 0x08fc - //Deivce: IN EP0 reigsters + // Device: IN EP0 registers volatile usb_dwc_diepctl0_reg_t diepctl0_reg; // 0x0900 - uint32_t reserved_0x0904_0x0908[1]; // 0x0904 to 0x0908 + uint32_t reserved_0x0904[1]; // 0x0904 volatile usb_dwc_diepint0_reg_t diepint0_reg; // 0x0908 - uint32_t reserved_0x090c_0x0910[1]; // 0x090c to 0x0910 + uint32_t reserved_0x090c[1]; // 0x090c volatile usb_dwc_dieptsiz0_reg_t dieptsiz0_reg; // 0x0910 volatile usb_dwc_diepdma0_reg_t diepdma0_reg; // 0x0914 volatile usb_dwc_dtxfsts0_reg_t dtxfsts0_reg; // 0x0918 volatile usb_dwc_diepdmab0_reg_t diepdmab0_reg; // 0x091c - //Deivce: IN EP registers - usb_dwc_in_ep_regs_t in_eps[6]; // 0x0920 to 0x09e0 - usb_dwc_in_ep_regs_t reserved_0x09e0_0x0b00[9]; // 0x09e0 to 0x0b00 + // Device: IN EP registers + usb_dwc_in_ep_regs_t in_eps[6]; // 0x0920 to 0x09dc (depends on OTG_NUM_EPS) + usb_dwc_in_ep_regs_t reserved_0x09e0_0x0afc[9]; // 0x09e0 to 0x0afc (depends on OTG_NUM_EPS) - //Device: OUT EP0 reigsters + // Device: OUT EP0 registers volatile usb_dwc_doepctl0_reg_t doepctl0_reg; // 0x0b00 - uint32_t reserved_0x0b04_0x0b08[1]; // 0x0b04 to 0x0b08 + uint32_t reserved_0x0b04[1]; // 0x0b04 volatile usb_dwc_doepint0_reg_t doepint0_reg; // 0b0b08 - uint32_t reserved_0x0b0c_0x0b10[1]; // 0x0b0c to 0x0b10 + uint32_t reserved_0x0b0c[1]; // 0x0b0c volatile usb_dwc_doeptsiz0_reg_t doeptsiz0_reg; // 0x0b10 volatile usb_dwc_doepdma0_reg_t doepdma0_reg; // 0x0b14 - uint32_t reserved_0x0b18_0x0b1c[1]; // 0x0b18 to 0x0b1c + uint32_t reserved_0x0b18[1]; // 0x0b18 volatile usb_dwc_doepdmab0_reg_t doepdmab0_reg; // 0x0b1c - //Deivce: OUT EP registers - usb_dwc_out_ep_regs_t out_eps[6]; // 0xb1c - usb_dwc_out_ep_regs_t reserved_0x0be0_0x0d00[9]; // 0x0be0 to 0x0d00 - uint32_t reserved_0x0d00_0x0e00[64]; // 0x0d00 to 0x0e00 - volatile usb_dwc_pcgcctl_reg_t pcgcctl_reg; // 0x0e00 - uint32_t reserved_0x0e04_0x0e08[1]; // 0x0d00 to 0x0e00 -} usb_dwc_dev_t; + // Device: OUT EP registers + usb_dwc_out_ep_regs_t out_eps[6]; // 0x0b20 to 0x0bdc (depends on OTG_NUM_EPS) + usb_dwc_out_ep_regs_t reserved_0x0be0_0x0d00[9]; // 0x0be0 to 0x0cfc (depends on OTG_NUM_EPS) + uint32_t reserved_0x0d00_0x0dfc[64]; // 0x0d00 to 0x0dfc + // Power and Clock Gating + volatile usb_dwc_pcgcctl_reg_t pcgcctl_reg; // 0x0e00 + uint32_t reserved_0x0e04[1]; // 0x0e04 +} usb_dwc_dev_t; #ifndef __cplusplus _Static_assert(sizeof(usb_dwc_dev_t) == 0xe08, "Invalid size of usb_dwc_dev_t structure"); @@ -1146,7 +1173,6 @@ _Static_assert(sizeof(usb_dwc_dev_t) == 0xe08, "Invalid size of usb_dwc_dev_t st extern usb_dwc_dev_t USB_DWC; - #ifdef __cplusplus } #endif