diff --git a/Kconfig b/Kconfig index 0e5d247d7d..9b230774b6 100644 --- a/Kconfig +++ b/Kconfig @@ -13,6 +13,14 @@ mainmenu "Espressif IoT Development Framework Configuration" bool option env="IDF_ENV_FPGA" + config IDF_TARGET_ARCH_RISCV + bool + default "n" + + config IDF_TARGET_ARCH_XTENSA + bool + default "n" + config IDF_TARGET # This option records the IDF target when sdkconfig is generated the first time. # It is not updated if environment variable $IDF_TARGET changes later, and @@ -24,15 +32,18 @@ mainmenu "Espressif IoT Development Framework Configuration" config IDF_TARGET_ESP32 bool default "y" if IDF_TARGET="esp32" + select IDF_TARGET_ARCH_XTENSA config IDF_TARGET_ESP32S2 bool default "y" if IDF_TARGET="esp32s2" select FREERTOS_UNICORE + select IDF_TARGET_ARCH_XTENSA config IDF_TARGET_ESP32S3 bool default "y" if IDF_TARGET="esp32s3" + select IDF_TARGET_ARCH_XTENSA choice IDF_TARGET_ESP32S3_BETA_VERSION prompt "ESP32-S3 beta version" diff --git a/components/app_trace/app_trace.c b/components/app_trace/app_trace.c index 6e67ea53a6..2895972b79 100644 --- a/components/app_trace/app_trace.c +++ b/components/app_trace/app_trace.c @@ -161,8 +161,10 @@ #if CONFIG_IDF_TARGET_ESP32S2 #include "soc/sensitive_reg.h" #endif +#if __XTENSA__ #include "eri.h" #include "trax.h" +#endif #include "soc/timer_periph.h" #include "freertos/FreeRTOS.h" #include "esp_app_trace.h" diff --git a/components/bootloader/subproject/CMakeLists.txt b/components/bootloader/subproject/CMakeLists.txt index f2151cb62d..383f3e80b7 100644 --- a/components/bootloader/subproject/CMakeLists.txt +++ b/components/bootloader/subproject/CMakeLists.txt @@ -30,7 +30,7 @@ set(COMPONENTS efuse) set(BOOTLOADER_BUILD 1) include("${IDF_PATH}/tools/cmake/project.cmake") -set(common_req log esp_rom esp_common esp_hw_support hal xtensa) +set(common_req log esp_rom esp_common esp_hw_support hal) if(LEGACY_INCLUDE_COMMON_HEADERS) list(APPEND common_req soc hal) endif() diff --git a/components/bootloader_support/src/bootloader_mem.c b/components/bootloader_support/src/bootloader_mem.c index 26840e6640..98990b74cd 100644 --- a/components/bootloader_support/src/bootloader_mem.c +++ b/components/bootloader_support/src/bootloader_mem.c @@ -14,35 +14,17 @@ #include -#include "xtensa/config/core.h" #include "hal/cpu_hal.h" #include "hal/mpu_hal.h" #include "hal/mpu_types.h" #include "soc/soc_caps.h" #include "bootloader_mem.h" -#include "xt_instr_macros.h" -#include "xtensa/config/specreg.h" - -static inline void cpu_configure_region_protection(void) -{ - /* Currently, the only supported chips esp32 and esp32s2 - * have the same configuration. Move this to the port layer once - * more chips with different configurations are supported. - * - * Both chips have the address space divided into 8 regions, 512MB each. - */ - const int illegal_regions[] = {0, 4, 5, 6, 7}; // 0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000 - for (int i = 0; i < sizeof(illegal_regions) / sizeof(illegal_regions[0]); ++i) { - mpu_hal_set_region_access(illegal_regions[i], MPU_REGION_ILLEGAL); - } - - mpu_hal_set_region_access(1, MPU_REGION_RW); // 0x20000000 -} +#include "soc/cpu.h" void bootloader_init_mem(void) { cpu_hal_init_hwloop(); // protect memory region - cpu_configure_region_protection(); + esp_cpu_configure_region_protection(); } diff --git a/components/bootloader_support/src/bootloader_panic.c b/components/bootloader_support/src/bootloader_panic.c index 637f2c968c..5136d7a02b 100644 --- a/components/bootloader_support/src/bootloader_panic.c +++ b/components/bootloader_support/src/bootloader_panic.c @@ -14,7 +14,7 @@ #include "esp_log.h" #include "bootloader_common.h" -#include "soc/cpu.h" +#include "hal/cpu_hal.h" #include "esp_rom_sys.h" @@ -30,8 +30,8 @@ void abort(void) #if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT esp_rom_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3); #endif - if (esp_cpu_in_ocd_debug_mode()) { - __asm__("break 0,0"); + if (cpu_hal_is_debugger_attached()) { + cpu_hal_break(); } while (1) { } diff --git a/components/bootloader_support/src/bootloader_random.c b/components/bootloader_support/src/bootloader_random.c index b7376bf15c..0d6873ef3d 100644 --- a/components/bootloader_support/src/bootloader_random.c +++ b/components/bootloader_support/src/bootloader_random.c @@ -13,7 +13,7 @@ // limitations under the License. #include "sdkconfig.h" #include "bootloader_random.h" -#include "soc/cpu.h" +#include "hal/cpu_hal.h" #include "soc/wdev_reg.h" #ifndef BOOTLOADER_BUILD @@ -44,13 +44,14 @@ values. */ random = REG_READ(WDEV_RND_REG); - RSR(CCOUNT, start); + start = cpu_hal_get_cycle_count(); do { random ^= REG_READ(WDEV_RND_REG); - RSR(CCOUNT, now); + now = cpu_hal_get_cycle_count(); } while (now - start < 80 * 32 * 2); /* extra factor of 2 is precautionary */ } buffer_bytes[i] = random >> ((i % 4) * 8); } } + #endif // BOOTLOADER_BUILD diff --git a/components/esp-tls/esp_tls.c b/components/esp-tls/esp_tls.c index d28a06c872..c8e94114a9 100644 --- a/components/esp-tls/esp_tls.c +++ b/components/esp-tls/esp_tls.c @@ -280,7 +280,7 @@ static int esp_tls_low_level_conn(const char *hostname, int hostlen, int port, c } if (FD_ISSET(tls->sockfd, &tls->rset) || FD_ISSET(tls->sockfd, &tls->wset)) { int error; - unsigned int len = sizeof(error); + socklen_t len = sizeof(error); /* pending error check */ if (getsockopt(tls->sockfd, SOL_SOCKET, SO_ERROR, &error, &len) < 0) { ESP_LOGD(TAG, "Non blocking connect failed"); diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index d73d8a2cf2..fb8dad87df 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -7,7 +7,7 @@ idf_build_get_property(sdkconfig_header SDKCONFIG_HEADER) if(BOOTLOADER_BUILD) # For bootloader, all we need from esp32 is headers - idf_component_register(INCLUDE_DIRS include) + idf_component_register(INCLUDE_DIRS include REQUIRES xtensa) target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32.peripherals.ld") else() # Regular app build @@ -25,7 +25,7 @@ else() set(include_dirs "include") - set(requires driver efuse soc) #unfortunately rom/uart uses SOC registers directly + set(requires driver efuse soc xtensa) #unfortunately rom/uart uses SOC registers directly # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function. # esp_timer is added here because cpu_start.c uses esp_timer diff --git a/components/esp32s2/CMakeLists.txt b/components/esp32s2/CMakeLists.txt index ddbeb6bdce..7faf0e2d23 100644 --- a/components/esp32s2/CMakeLists.txt +++ b/components/esp32s2/CMakeLists.txt @@ -6,7 +6,7 @@ endif() if(BOOTLOADER_BUILD) # For bootloader, all we need from esp32s2 is headers - idf_component_register(INCLUDE_DIRS include) + idf_component_register(INCLUDE_DIRS include REQUIRES xtensa) target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s2.peripherals.ld") else() # Regular app build @@ -26,7 +26,7 @@ else() set(include_dirs "include") - set(requires driver efuse) + set(requires driver efuse xtensa) # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function. # esp_timer is added here because cpu_start.c uses esp_timer diff --git a/components/esp32s3/CMakeLists.txt b/components/esp32s3/CMakeLists.txt index e1e0d31de0..ce87b35ed0 100644 --- a/components/esp32s3/CMakeLists.txt +++ b/components/esp32s3/CMakeLists.txt @@ -7,7 +7,7 @@ endif() if(BOOTLOADER_BUILD) # For bootloader, all we need from esp32s3 is headers - idf_component_register(INCLUDE_DIRS include) + idf_component_register(INCLUDE_DIRS include REQUIRES xtensa) target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32s3.peripherals.ld") else() # Regular app build @@ -25,7 +25,7 @@ else() "system_api_esp32s3.c") set(include_dirs "include") - set(requires driver efuse soc) #unfortunately rom/uart uses SOC registers directly + set(requires driver efuse soc xtensa) #unfortunately rom/uart uses SOC registers directly # driver is a public requirement because esp_sleep.h uses gpio_num_t & touch_pad_t # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function. diff --git a/components/esp_common/CMakeLists.txt b/components/esp_common/CMakeLists.txt index 991dc10579..27b1e9b01a 100644 --- a/components/esp_common/CMakeLists.txt +++ b/components/esp_common/CMakeLists.txt @@ -14,7 +14,6 @@ else() # Regular app build list(APPEND srcs "src/brownout.c" "src/esp_err.c" - "src/dbg_stubs.c" "src/esp_err_to_name.c" "src/freertos_hooks.c" "src/mac_addr.c" @@ -22,6 +21,10 @@ else() "src/task_wdt.c" "src/int_wdt.c") + if(NOT CONFIG_IDF_TARGET_ESP32C3) + list(APPEND srcs "src/dbg_stubs.c") + endif() + # Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here. idf_component_register(SRCS "${srcs}" INCLUDE_DIRS include diff --git a/components/esp_common/include/esp_err.h b/components/esp_common/include/esp_err.h index 105723976d..49c3beb47a 100644 --- a/components/esp_common/include/esp_err.h +++ b/components/esp_common/include/esp_err.h @@ -21,7 +21,7 @@ extern "C" { #endif -typedef int32_t esp_err_t; +typedef int esp_err_t; /* Definitions for error constants. */ #define ESP_OK 0 /*!< esp_err_t value indicating success (no error) */ diff --git a/components/esp_common/include/esp_private/gdbstub.h b/components/esp_common/include/esp_private/gdbstub.h index 9e7243aad0..61c6cc8623 100644 --- a/components/esp_common/include/esp_private/gdbstub.h +++ b/components/esp_common/include/esp_private/gdbstub.h @@ -11,12 +11,10 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. -#ifndef GDBSTUB_H -#define GDBSTUB_H +#pragma once -#include -#include "freertos/xtensa_api.h" +/* This header exists to avoid making esp_common depend on gdbstub component for panic handler support */ -void esp_gdbstub_panic_handler(XtExcFrame *frame) __attribute__((noreturn)); +typedef void esp_gdbstub_frame_t; -#endif +void esp_gdbstub_panic_handler(esp_gdbstub_frame_t *frame) __attribute__((noreturn)); diff --git a/components/esp_common/test/test_atomic.c b/components/esp_common/test/test_atomic.c index 890c42dee0..743ad34e3b 100644 --- a/components/esp_common/test/test_atomic.c +++ b/components/esp_common/test/test_atomic.c @@ -2,13 +2,12 @@ #include #include "esp_log.h" #include "esp_attr.h" -#include "freertos/xtensa_api.h" - +#include "hal/cpu_hal.h" #include "../cache_utils.h" #define RECORD_TIME_PREPARE() uint32_t __t1, __t2 -#define RECORD_TIME_START() do {__t1 = xthal_get_ccount();}while(0) -#define RECORD_TIME_END(p_time) do{__t2 = xthal_get_ccount(); *p_time = (__t2-__t1);}while(0) +#define RECORD_TIME_START() do {__t1 = cpu_hal_get_cycle_count();}while(0) +#define RECORD_TIME_END(p_time) do{__t2 = cpu_hal_get_cycle_count(); *p_time = (__t2-__t1);}while(0) #define TEST_TIMES 11 diff --git a/components/esp_eth/include/esp_eth.h b/components/esp_eth/include/esp_eth.h index deb6a4126a..76eff00b56 100644 --- a/components/esp_eth/include/esp_eth.h +++ b/components/esp_eth/include/esp_eth.h @@ -192,7 +192,7 @@ esp_err_t esp_eth_update_input_path( * - ESP_ERR_INVALID_ARG: transmit frame buffer failed because of some invalid argument * - ESP_FAIL: transmit frame buffer failed because some other error occurred */ -esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, uint32_t length); +esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, size_t length); /** * @brief General Receive diff --git a/components/esp_eth/src/esp_eth.c b/components/esp_eth/src/esp_eth.c index 4af0827299..d7b0a1671e 100644 --- a/components/esp_eth/src/esp_eth.c +++ b/components/esp_eth/src/esp_eth.c @@ -19,6 +19,7 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/timers.h" +#include "esp_heap_caps.h" static const char *TAG = "esp_eth"; #define ETH_CHECK(a, str, goto_tag, ret_value, ...) \ @@ -317,7 +318,7 @@ err: return ret; } -esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, uint32_t length) +esp_err_t esp_eth_transmit(esp_eth_handle_t hdl, void *buf, size_t length) { esp_err_t ret = ESP_OK; esp_eth_driver_t *eth_driver = (esp_eth_driver_t *)hdl; diff --git a/components/esp_gdbstub/CMakeLists.txt b/components/esp_gdbstub/CMakeLists.txt index 14528a4b52..74213d20a0 100644 --- a/components/esp_gdbstub/CMakeLists.txt +++ b/components/esp_gdbstub/CMakeLists.txt @@ -6,8 +6,8 @@ set(esp_gdbstub_srcs "src/gdbstub.c" "xtensa/gdbstub_xtensa.c") idf_component_register(SRCS "${esp_gdbstub_srcs}" - INCLUDE_DIRS "include" - PRIV_INCLUDE_DIRS "private_include" "${target}" "xtensa" + INCLUDE_DIRS "include" "xtensa" "${target}" + PRIV_INCLUDE_DIRS "private_include" LDFRAGMENTS "linker.lf" REQUIRES "freertos" PRIV_REQUIRES "soc" "xtensa" "esp_rom") diff --git a/components/esp_gdbstub/esp32/gdbstub_esp32.c b/components/esp_gdbstub/esp32/gdbstub_esp32.c index a3f87ca7bb..8981550e95 100644 --- a/components/esp_gdbstub/esp32/gdbstub_esp32.c +++ b/components/esp_gdbstub/esp32/gdbstub_esp32.c @@ -42,7 +42,7 @@ void esp_gdbstub_putchar(int c) int esp_gdbstub_readmem(intptr_t addr) { if (addr < 0x20000000 || addr >= 0x80000000) { - /* see cpu_configure_region_protection */ + /* see esp_cpu_configure_region_protection */ return -1; } uint32_t val_aligned = *(uint32_t *)(addr & (~3)); diff --git a/components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c b/components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c index 7bf60cf702..6c0ac46ffc 100644 --- a/components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c +++ b/components/esp_gdbstub/esp32s2/gdbstub_esp32s2.c @@ -42,7 +42,7 @@ void esp_gdbstub_putchar(int c) int esp_gdbstub_readmem(intptr_t addr) { if (addr < 0x20000000 || addr >= 0x80000000) { - /* see cpu_configure_region_protection */ + /* see esp_cpu_configure_region_protection */ return -1; } uint32_t val_aligned = *(uint32_t *)(addr & (~3)); diff --git a/components/esp_hw_support/compare_set.c b/components/esp_hw_support/compare_set.c index 03871ca4ea..09487eb63f 100644 --- a/components/esp_hw_support/compare_set.c +++ b/components/esp_hw_support/compare_set.c @@ -13,6 +13,9 @@ // limitations under the License. #include "soc/compare_set.h" #include "soc/spinlock.h" +#include "soc/soc_caps.h" + +#if __XTENSA__ && SOC_SPIRAM_SUPPORTED static spinlock_t global_extram_lock = SPINLOCK_INITIALIZER; @@ -37,3 +40,10 @@ void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set = old_value; } +#else // __XTENSA__ && SOC_SPIRAM_SUPPORTED + +void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set) +{ + compare_and_set_native(addr, compare, set); +} +#endif // endif diff --git a/components/esp_hw_support/cpu_util.c b/components/esp_hw_support/cpu_util.c index a251c25b29..09b7c2a0c0 100644 --- a/components/esp_hw_support/cpu_util.c +++ b/components/esp_hw_support/cpu_util.c @@ -21,6 +21,7 @@ #include "hal/cpu_hal.h" #include "esp_debug_helpers.h" #include "hal/cpu_types.h" +#include "hal/mpu_hal.h" #include "hal/soc_hal.h" #include "soc/soc_caps.h" @@ -90,3 +91,21 @@ void IRAM_ATTR esp_set_breakpoint_if_jtag(void *fn) cpu_hal_set_breakpoint(0, fn); } } + +#if __XTENSA__ + +void esp_cpu_configure_region_protection(void) +{ + /* Note: currently this is configured the same on all Xtensa targets + * + * Both chips have the address space divided into 8 regions, 512MB each. + */ + const int illegal_regions[] = {0, 4, 5, 6, 7}; // 0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000 + for (int i = 0; i < sizeof(illegal_regions) / sizeof(illegal_regions[0]); ++i) { + mpu_hal_set_region_access(illegal_regions[i], MPU_REGION_ILLEGAL); + } + + mpu_hal_set_region_access(1, MPU_REGION_RW); // 0x20000000 +} + +#endif diff --git a/components/esp_hw_support/include/soc/compare_set.h b/components/esp_hw_support/include/soc/compare_set.h index ddda35cc22..5a11ab166f 100644 --- a/components/esp_hw_support/include/soc/compare_set.h +++ b/components/esp_hw_support/include/soc/compare_set.h @@ -12,14 +12,16 @@ // See the License for the specific language governing permissions and // limitations under the License. -#ifndef __COMPARE_SET_H -#define __COMPARE_SET_H +#pragma once #include #include #include "soc/cpu.h" #include "soc/soc_memory_layout.h" + +#if __XTENSA__ #include "xtensa/xtruntime.h" +#endif #ifdef __cplusplus extern "C" { @@ -35,20 +37,31 @@ static inline void __attribute__((always_inline)) compare_and_set_native(volatil :"r"(addr), "r"(compare), "0"(*set) ); #else + uint32_t old_value; + +#ifdef __XTENSA__ // No S32C1I, so do this by disabling and re-enabling interrupts (slower) - uint32_t intlevel, old_value; + uint32_t intlevel; __asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n" : "=r"(intlevel)); +#else + unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE); +#endif old_value = *addr; if (old_value == compare) { *addr = *set; } +#ifdef __XTENSA__ __asm__ __volatile__ ("memw \n" "wsr %0, ps\n" :: "r"(intlevel)); +#else + RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE); +#endif + *set = old_value; #endif } @@ -59,5 +72,3 @@ void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t #ifdef __cplusplus } #endif - -#endif diff --git a/components/esp_hw_support/include/soc/cpu.h b/components/esp_hw_support/include/soc/cpu.h index 77b4fcedda..441ced6b7f 100644 --- a/components/esp_hw_support/include/soc/cpu.h +++ b/components/esp_hw_support/include/soc/cpu.h @@ -18,11 +18,16 @@ #include #include #include + +#if __XTENSA__ +#include "xt_instr_macros.h" +// [refactor-todo] not actually needed in this header now, +// but kept for compatibility #include "xtensa/corebits.h" #include "xtensa/config/core.h" #include "xtensa/config/specreg.h" -#include "xt_instr_macros.h" +#endif #include "hal/cpu_hal.h" @@ -91,11 +96,15 @@ typedef uint32_t esp_cpu_ccount_t; static inline esp_cpu_ccount_t esp_cpu_get_ccount(void) { - uint32_t result; - RSR(CCOUNT, result); - return result; + return cpu_hal_get_cycle_count(); } +/** + * @brief Configure CPU to disable access to invalid memory regions + * + */ +void esp_cpu_configure_region_protection(void); + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/include/soc/spinlock.h b/components/esp_hw_support/include/soc/spinlock.h index 0135a2a6de..5370642a0b 100644 --- a/components/esp_hw_support/include/soc/spinlock.h +++ b/components/esp_hw_support/include/soc/spinlock.h @@ -11,15 +11,19 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. -#ifndef __SOC_SPINLOCK_H -#define __SOC_SPINLOCK_H +#pragma once #include #include +#include "sdkconfig.h" #include "soc/cpu.h" +#include "hal/cpu_hal.h" #include "soc/soc_memory_layout.h" #include "soc/compare_set.h" + +#if __XTENSA__ #include "xtensa/xtruntime.h" +#endif #ifdef __cplusplus extern "C" { @@ -62,7 +66,7 @@ static inline void __attribute__((always_inline)) spinlock_initialize(spinlock_t */ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *lock, int32_t timeout) { -#if !CONFIG_FREERTOS_UNICORE +#if !CONFIG_FREERTOS_UNICORE && !BOOTLOADER_BUILD uint32_t result; uint32_t irq_status; uint32_t ccount_start; @@ -106,7 +110,7 @@ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *l if (timeout != SPINLOCK_WAIT_FOREVER) { uint32_t ccount_now; - RSR(CCOUNT, ccount_now); + ccount_now = cpu_hal_get_cycle_count(); if (ccount_now - ccount_start > (unsigned)timeout) { XTOS_RESTORE_INTLEVEL(irq_status); return false; @@ -123,10 +127,9 @@ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *l XTOS_RESTORE_INTLEVEL(irq_status); return true; -#else +#else // !CONFIG_FREERTOS_UNICORE return true; #endif - } /** @@ -135,8 +138,7 @@ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *l */ static inline void __attribute__((always_inline)) spinlock_release(spinlock_t *lock) { - -#if !CONFIG_FREERTOS_UNICORE +#if !CONFIG_FREERTOS_UNICORE && !BOOTLOADER_BUILD uint32_t irq_status; uint32_t core_id; @@ -160,5 +162,3 @@ static inline void __attribute__((always_inline)) spinlock_release(spinlock_t *l #ifdef __cplusplus } #endif - -#endif diff --git a/components/esp_pm/pm_impl_riscv_temp.c b/components/esp_pm/pm_impl_riscv_temp.c new file mode 100644 index 0000000000..59c94b50d8 --- /dev/null +++ b/components/esp_pm/pm_impl_riscv_temp.c @@ -0,0 +1,19 @@ +// Copyright 2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +/* TODO ESP32-C3 Placeholder until IDF-2107 when this file can be dropped */ +void esp_pm_impl_waiti(void) +{ + +} diff --git a/components/esp_ringbuf/ringbuf.c b/components/esp_ringbuf/ringbuf.c index 92e15e562c..f8c62d03c7 100644 --- a/components/esp_ringbuf/ringbuf.c +++ b/components/esp_ringbuf/ringbuf.c @@ -20,8 +20,9 @@ #include "freertos/ringbuf.h" //32-bit alignment macros -#define rbALIGN_SIZE( xSize ) ( ( xSize + portBYTE_ALIGNMENT_MASK ) & ~portBYTE_ALIGNMENT_MASK ) -#define rbCHECK_ALIGNED( pvPtr ) ( ( ( UBaseType_t ) ( pvPtr ) & portBYTE_ALIGNMENT_MASK ) == 0 ) +#define rbALIGN_MASK (0x03) +#define rbALIGN_SIZE( xSize ) ( ( xSize + rbALIGN_MASK ) & ~rbALIGN_MASK ) +#define rbCHECK_ALIGNED( pvPtr ) ( ( ( UBaseType_t ) ( pvPtr ) & rbALIGN_MASK ) == 0 ) //Ring buffer flags #define rbALLOW_SPLIT_FLAG ( ( UBaseType_t ) 1 ) //The ring buffer allows items to be split diff --git a/components/esp_system/intr_alloc.c b/components/esp_system/intr_alloc.c index 232a1f1100..603138b23b 100644 --- a/components/esp_system/intr_alloc.c +++ b/components/esp_system/intr_alloc.c @@ -531,7 +531,7 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre vd->shared_vec_info=sh_vec; vd->flags|=VECDESC_FL_SHARED; //(Re-)set shared isr handler to new value. - xt_set_interrupt_handler(intr, shared_intr_isr, vd); + interrupt_controller_hal_set_int_handler(intr, shared_intr_isr, vd); } else { //Mark as unusable for other interrupt sources. This is ours now! vd->flags=VECDESC_FL_NONSHARED; @@ -801,11 +801,11 @@ void IRAM_ATTR esp_intr_noniram_enable(void) //equivalents here. -void IRAM_ATTR ets_isr_unmask(unsigned int mask) { +void IRAM_ATTR ets_isr_unmask(uint32_t mask) { interrupt_controller_hal_enable_interrupts(mask); } -void IRAM_ATTR ets_isr_mask(unsigned int mask) { +void IRAM_ATTR ets_isr_mask(uint32_t mask) { interrupt_controller_hal_disable_interrupts(mask); } diff --git a/components/esp_system/panic.c b/components/esp_system/panic.c index 2c3781d66f..4085be6bcb 100644 --- a/components/esp_system/panic.c +++ b/components/esp_system/panic.c @@ -17,7 +17,6 @@ #include "esp_attr.h" #include "esp_private/system_internal.h" -#include "esp_private/gdbstub.h" #include "esp_private/usb_console.h" #include "esp_ota_ops.h" @@ -53,6 +52,10 @@ #define APPTRACE_ONPANIC_HOST_FLUSH_TMO (1000*CONFIG_APPTRACE_ONPANIC_HOST_FLUSH_TMO) #endif +#if CONFIG_ESP_SYSTEM_PANIC_GDBSTUB +#include "esp_private/gdbstub.h" +#endif + bool g_panic_abort = false; static char *s_panic_abort_details = NULL; @@ -291,7 +294,7 @@ void esp_panic_handler(panic_info_t *info) wdt_hal_disable(&rtc_wdt_ctx); wdt_hal_write_protect_enable(&rtc_wdt_ctx); panic_print_str("Entering gdb stub now.\r\n"); - esp_gdbstub_panic_handler((XtExcFrame*) info->frame); + esp_gdbstub_panic_handler((esp_gdbstub_frame_t*)info->frame); #else #if CONFIG_ESP_COREDUMP_ENABLE static bool s_dumping_core; diff --git a/components/esp_system/port/CMakeLists.txt b/components/esp_system/port/CMakeLists.txt index 976b568b2f..c53c2aeaa8 100644 --- a/components/esp_system/port/CMakeLists.txt +++ b/components/esp_system/port/CMakeLists.txt @@ -1,6 +1,7 @@ target_include_directories(${COMPONENT_LIB} PRIVATE include) -set(srcs "panic_handler.c" "panic_handler_asm.S" "cpu_start.c") +set(srcs "cpu_start.c") + add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_system/port/panic_handler.c b/components/esp_system/port/arch/xtensa/panic_handler.c similarity index 99% rename from components/esp_system/port/panic_handler.c rename to components/esp_system/port/arch/xtensa/panic_handler.c index 314ab2d206..76975d8c55 100644 --- a/components/esp_system/port/panic_handler.c +++ b/components/esp_system/port/arch/xtensa/panic_handler.c @@ -35,18 +35,21 @@ #include "sdkconfig.h" -#include "esp_rom_sys.h" + #if CONFIG_IDF_TARGET_ESP32 #include "esp32/cache_err_int.h" #include "esp32/dport_access.h" +#include "esp32/rom/uart.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/cache_err_int.h" +#include "esp32s2/rom/uart.h" #include "esp32s2/memprot.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #include "soc/rtc_cntl_reg.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/cache_err_int.h" +#include "esp32s3/rom/uart.h" #include "esp32s3/memprot.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" @@ -187,7 +190,6 @@ static void print_registers(const void *f, int core) { XtExcFrame *frame = (XtExcFrame *) f; int *regs = (int *)frame; - int x, y; const char *sdesc[] = { "PC ", "PS ", "A0 ", "A1 ", "A2 ", "A3 ", "A4 ", "A5 ", "A6 ", "A7 ", "A8 ", "A9 ", "A10 ", "A11 ", "A12 ", "A13 ", @@ -201,9 +203,9 @@ static void print_registers(const void *f, int core) panic_print_dec(core); panic_print_str(" register dump:"); - for (x = 0; x < 24; x += 4) { + for (int x = 0; x < 24; x += 4) { panic_print_str("\r\n"); - for (y = 0; y < 4; y++) { + for (int y = 0; y < 4; y++) { if (sdesc[x + y][0] != 0) { panic_print_str(sdesc[x + y]); panic_print_str(": 0x"); diff --git a/components/esp_system/port/panic_handler_asm.S b/components/esp_system/port/arch/xtensa/panic_handler_asm.S similarity index 100% rename from components/esp_system/port/panic_handler_asm.S rename to components/esp_system/port/arch/xtensa/panic_handler_asm.S diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index f3c9091012..43209c267b 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -71,7 +71,9 @@ #include "soc/rtc.h" #include "soc/spinlock.h" +#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX #include "trax.h" +#endif #include "bootloader_mem.h" @@ -219,7 +221,7 @@ static void start_other_core(void) static void intr_matrix_clear(void) { - for (int i = ETS_WIFI_MAC_INTR_SOURCE; i < ETS_MAX_INTR_SOURCE; i++) { + for (int i = 0; i < ETS_MAX_INTR_SOURCE; i++) { intr_matrix_set(0, i, ETS_INVALID_INUM); #if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE intr_matrix_set(1, i, ETS_INVALID_INUM); @@ -239,6 +241,18 @@ void IRAM_ATTR call_start_cpu0(void) RESET_REASON rst_reas[1]; #endif +#ifdef __riscv + // Configure the global pointer register + // (This should be the first thing IDF app does, as any other piece of code could be + // relaxed by the linker to access something relative to __global_pointer$) + __asm__ __volatile__ ( + ".option push\n" + ".option norelax\n" + "la gp, __global_pointer$\n" + ".option pop" + ); +#endif + // Move exception vectors to IRAM cpu_hal_set_vecbase(&_init_start); @@ -361,7 +375,6 @@ void IRAM_ATTR call_start_cpu0(void) } #endif -#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS extern void instruction_flash_page_info_init(void); instruction_flash_page_info_init(); @@ -391,7 +404,6 @@ void IRAM_ATTR call_start_cpu0(void) extern void esp_enable_cache_wrap(uint32_t icache_wrap_enable, uint32_t dcache_wrap_enable); esp_enable_cache_wrap(icache_wrap_enable, dcache_wrap_enable); #endif -#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY memset(&_ext_ram_bss_start, 0, (&_ext_ram_bss_end - &_ext_ram_bss_start) * sizeof(_ext_ram_bss_start)); diff --git a/components/esp_system/port/esp32/CMakeLists.txt b/components/esp_system/port/esp32/CMakeLists.txt index 76d7ca5130..f1ddfe3d05 100644 --- a/components/esp_system/port/esp32/CMakeLists.txt +++ b/components/esp_system/port/esp32/CMakeLists.txt @@ -1,4 +1,9 @@ -set(srcs "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c") +set(srcs "dport_panic_highint_hdl.S" + "clk.c" + "reset_reason.c" + "../arch/xtensa/panic_handler.c" + "../arch/xtensa/panic_handler_asm.S" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_system/port/esp32/component.mk b/components/esp_system/port/esp32/component.mk index 3508f48a9e..88dd942940 100644 --- a/components/esp_system/port/esp32/component.mk +++ b/components/esp_system/port/esp32/component.mk @@ -1,2 +1,2 @@ -COMPONENT_SRCDIRS += port port/esp32 +COMPONENT_SRCDIRS += port port/esp32 port/arch/xtensa COMPONENT_OBJEXCLUDE += port/async_memcpy_impl_gdma.o diff --git a/components/esp_system/port/esp32s2/CMakeLists.txt b/components/esp_system/port/esp32s2/CMakeLists.txt index 0d93b7b0a3..ee8643a087 100644 --- a/components/esp_system/port/esp32s2/CMakeLists.txt +++ b/components/esp_system/port/esp32s2/CMakeLists.txt @@ -1,4 +1,10 @@ -set(srcs "async_memcpy_impl_cp_dma.c" "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c") +set(srcs "async_memcpy_impl_cp_dma.c" + "dport_panic_highint_hdl.S" + "clk.c" + "reset_reason.c" + "../arch/xtensa/panic_handler.c" + "../arch/xtensa/panic_handler_asm.S" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_system/port/esp32s3/CMakeLists.txt b/components/esp_system/port/esp32s3/CMakeLists.txt index 3726d76e29..6bfc1d5a86 100644 --- a/components/esp_system/port/esp32s3/CMakeLists.txt +++ b/components/esp_system/port/esp32s3/CMakeLists.txt @@ -1,4 +1,10 @@ -set(srcs "../async_memcpy_impl_gdma.c" "dport_panic_highint_hdl.S" "clk.c" "reset_reason.c") +set(srcs "dport_panic_highint_hdl.S" + "clk.c" + "reset_reason.c" + "../async_memcpy_impl_gdma.c" + "../arch/xtensa/panic_handler.c" + "../arch/xtensa/panic_handler_asm.S" + ) add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_timer/src/esp_timer.c b/components/esp_timer/src/esp_timer.c index 18802197ea..d3ccb4f59a 100644 --- a/components/esp_timer/src/esp_timer.c +++ b/components/esp_timer/src/esp_timer.c @@ -22,7 +22,7 @@ #include "esp_log.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" -#include "freertos/xtensa_api.h" +#include "freertos/semphr.h" #include "soc/spinlock.h" #include "esp_timer.h" #include "esp_timer_impl.h" diff --git a/components/esp_timer/src/ets_timer_legacy.c b/components/esp_timer/src/ets_timer_legacy.c index 15e6617f81..fc7f624280 100644 --- a/components/esp_timer/src/ets_timer_legacy.c +++ b/components/esp_timer/src/ets_timer_legacy.c @@ -27,7 +27,6 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" -#include "freertos/xtensa_api.h" #include "sdkconfig.h" #include "esp_timer.h" #if CONFIG_IDF_TARGET_ESP32 diff --git a/components/espcoredump/include/esp_core_dump.h b/components/espcoredump/include/esp_core_dump.h index 2a6c109324..24a13e5d86 100644 --- a/components/espcoredump/include/esp_core_dump.h +++ b/components/espcoredump/include/esp_core_dump.h @@ -16,7 +16,6 @@ #include #include "esp_err.h" -#include "freertos/xtensa_context.h" #include "esp_private/panic_internal.h" /**************************************************************************************/ diff --git a/components/espcoredump/src/core_dump_port.c b/components/espcoredump/src/core_dump_port.c index 5033ba8d5e..7be3f5beec 100644 --- a/components/espcoredump/src/core_dump_port.c +++ b/components/espcoredump/src/core_dump_port.c @@ -16,8 +16,14 @@ #include "soc/soc_memory_layout.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" -#include "freertos/xtensa_context.h" // for exception register stack structure #include "esp_core_dump_priv.h" + +#if __XTENSA__ +#include "freertos/xtensa_context.h" +#else // __XTENSA__ +#define XCHAL_NUM_AREGS 64 // TODO-ESP32C3 coredump support IDF-1758 +#endif // __XTENSA__ + #include "esp_rom_sys.h" const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_port"; diff --git a/components/heap/multi_heap_platform.h b/components/heap/multi_heap_platform.h index 2d3ed00314..24a1719af7 100644 --- a/components/heap/multi_heap_platform.h +++ b/components/heap/multi_heap_platform.h @@ -15,7 +15,8 @@ #ifdef MULTI_HEAP_FREERTOS -#include +#include "freertos/FreeRTOS.h" + #include "sdkconfig.h" #include "esp_rom_sys.h" #if CONFIG_IDF_TARGET_ESP32 diff --git a/components/log/log_freertos.c b/components/log/log_freertos.c index e619944df2..2a14dcb4f5 100644 --- a/components/log/log_freertos.c +++ b/components/log/log_freertos.c @@ -103,9 +103,14 @@ uint32_t esp_log_timestamp(void) return base + tick_count * (1000 / configTICK_RATE_HZ); } -/* FIXME: define an API for getting the timestamp in soc/hal */ +/* FIXME: define an API for getting the timestamp in soc/hal IDF-2351 */ uint32_t esp_log_early_timestamp(void) { +#if CONFIG_IDF_TARGET_ESP32 + /* ESP32 ROM stores separate clock rate values for each CPU, but we want the PRO CPU value always */ extern uint32_t g_ticks_per_us_pro; return esp_cpu_get_ccount() / (g_ticks_per_us_pro * 1000); +#else + return esp_cpu_get_ccount() / (ets_get_cpu_frequency() * 1000); +#endif } diff --git a/components/log/log_noos.c b/components/log/log_noos.c index cf755839bf..f1fbdb8f3a 100644 --- a/components/log/log_noos.c +++ b/components/log/log_noos.c @@ -36,11 +36,11 @@ void esp_log_impl_unlock(void) s_lock = 0; } -/* FIXME: define an API for getting the timestamp in soc/hal */ +/* FIXME: define an API for getting the timestamp in soc/hal IDF-2351 */ uint32_t esp_log_early_timestamp(void) { - extern uint32_t g_ticks_per_us_pro; - return esp_cpu_get_ccount() / (g_ticks_per_us_pro * 1000); + extern uint32_t ets_get_cpu_frequency(void); + return esp_cpu_get_ccount() / (ets_get_cpu_frequency() * 1000); } uint32_t esp_log_timestamp(void) __attribute__((alias("esp_log_early_timestamp"))); diff --git a/components/newlib/locks.c b/components/newlib/locks.c index f50c650526..e3e9915fe3 100644 --- a/components/newlib/locks.c +++ b/components/newlib/locks.c @@ -21,6 +21,7 @@ #include "freertos/semphr.h" #include "freertos/task.h" #include "freertos/portable.h" +#include "esp_heap_caps.h" /* Notes on our newlib lock implementation: * @@ -48,12 +49,6 @@ static portMUX_TYPE lock_init_spinlock = portMUX_INITIALIZER_UNLOCKED; */ static void IRAM_ATTR lock_init_generic(_lock_t *lock, uint8_t mutex_type) { portENTER_CRITICAL(&lock_init_spinlock); - if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) { - /* nothing to do until the scheduler is running */ - portEXIT_CRITICAL(&lock_init_spinlock); - return; - } - if (*lock) { /* Lock already initialised (either we didn't check earlier, or it got initialised while we were waiting for the @@ -124,17 +119,20 @@ void _lock_close_recursive(_lock_t *lock) __attribute__((alias("_lock_close"))); */ static int IRAM_ATTR lock_acquire_generic(_lock_t *lock, uint32_t delay, uint8_t mutex_type) { xSemaphoreHandle h = (xSemaphoreHandle)(*lock); + if (!h) { if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) { return 0; /* locking is a no-op before scheduler is up, so this "succeeds" */ } - /* lazy initialise lock - might have had a static initializer in newlib (that we don't use), - or _lock_init might have been called before the scheduler was running... */ + /* lazy initialise lock - might have had a static initializer (that we don't use) */ lock_init_generic(lock, mutex_type); h = (xSemaphoreHandle)(*lock); configASSERT(h != NULL); } + if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) { + return 0; /* locking is a no-op before scheduler is up, so this "succeeds" */ + } BaseType_t success; if (!xPortCanYield()) { /* In ISR Context */ @@ -182,13 +180,11 @@ int IRAM_ATTR _lock_try_acquire_recursive(_lock_t *lock) { mutex_type is queueQUEUE_TYPE_RECURSIVE_MUTEX or queueQUEUE_TYPE_MUTEX */ static void IRAM_ATTR lock_release_generic(_lock_t *lock, uint8_t mutex_type) { - xSemaphoreHandle h = (xSemaphoreHandle)(*lock); - if (h == NULL) { - /* This is probably because the scheduler isn't running yet, - or the scheduler just started running and some code was - "holding" a not-yet-initialised lock... */ - return; + if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) { + return; /* locking is a no-op before scheduler is up */ } + xSemaphoreHandle h = (xSemaphoreHandle)(*lock); + assert(h); if (!xPortCanYield()) { if (mutex_type == queueQUEUE_TYPE_RECURSIVE_MUTEX) { diff --git a/components/newlib/platform_include/sys/reent.h b/components/newlib/platform_include/sys/reent.h new file mode 100644 index 0000000000..f58eb0ed6d --- /dev/null +++ b/components/newlib/platform_include/sys/reent.h @@ -0,0 +1,23 @@ +// Copyright 2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#include_next + +/* This function is not part of the newlib API, it is defined in libc/stdio/local.h + * There is no nice way to get __cleanup member populated while avoiding __sinit, + * so extern declaration is used here. + */ +extern void _cleanup_r(struct _reent* r); diff --git a/components/newlib/platform_include/time.h b/components/newlib/platform_include/time.h index e633bd4ec0..bbffaad8b9 100644 --- a/components/newlib/platform_include/time.h +++ b/components/newlib/platform_include/time.h @@ -22,8 +22,12 @@ extern "C" { #include_next #define _POSIX_TIMERS 1 +#ifndef CLOCK_MONOTONIC #define CLOCK_MONOTONIC (clockid_t)4 +#endif +#ifndef CLOCK_BOOTTIME #define CLOCK_BOOTTIME (clockid_t)4 +#endif int clock_settime(clockid_t clock_id, const struct timespec *tp); int clock_gettime(clockid_t clock_id, struct timespec *tp); diff --git a/components/newlib/reent_init.c b/components/newlib/reent_init.c index 11e4c58a7b..1e74e548f0 100644 --- a/components/newlib/reent_init.c +++ b/components/newlib/reent_init.c @@ -19,12 +19,6 @@ #include #include "esp_attr.h" -/* This function is not part on newlib API, it is defined in libc/stdio/local.h - * There is no nice way to get __cleanup member populated while avoiding __sinit, - * so extern declaration is used here. - */ -extern void _cleanup_r(struct _reent* r); - /** * This is the replacement for newlib's _REENT_INIT_PTR and __sinit. * The problem with __sinit is that it allocates three FILE structures diff --git a/components/newlib/syscalls.c b/components/newlib/syscalls.c index faa5828b6e..d6c3098592 100644 --- a/components/newlib/syscalls.c +++ b/components/newlib/syscalls.c @@ -100,6 +100,9 @@ int _unlink_r(struct _reent *r, const char *path) __attribute__((weak,alias("syscall_not_implemented"))); int _rename_r(struct _reent *r, const char *src, const char *dst) __attribute__((weak,alias("syscall_not_implemented"))); +int _isatty_r(struct _reent *r, int fd) + __attribute__((weak,alias("syscall_not_implemented"))); + /* These functions are not expected to be overridden */ int system(const char* str) diff --git a/components/newlib/test/test_time.c b/components/newlib/test/test_time.c index 5887337e66..361cba9b33 100644 --- a/components/newlib/test/test_time.c +++ b/components/newlib/test/test_time.c @@ -15,6 +15,7 @@ #include "esp_log.h" #include "esp_rom_sys.h" #include "esp_system.h" +#include "esp_timer.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" diff --git a/components/newlib/time.c b/components/newlib/time.c index 4073d02af0..a021d15eee 100644 --- a/components/newlib/time.c +++ b/components/newlib/time.c @@ -25,6 +25,7 @@ #include "esp_system.h" #include "esp_attr.h" +#include "esp_rom_sys.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/soc/esp32/include/soc/soc.h b/components/soc/esp32/include/soc/soc.h index a707c8afd8..17d06eb701 100644 --- a/components/soc/esp32/include/soc/soc.h +++ b/components/soc/esp32/include/soc/soc.h @@ -12,8 +12,7 @@ // See the License for the specific language governing permissions and // limitations under the License. -#ifndef _ESP32_SOC_H_ -#define _ESP32_SOC_H_ +#pragma once #ifndef __ASSEMBLER__ #include @@ -414,5 +413,3 @@ //Invalid interrupt for number interrupt matrix #define ETS_INVALID_INUM 6 - -#endif /* _ESP32_SOC_H_ */ diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index b882876526..59e36c5485 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -135,6 +135,9 @@ /*-------------------------- LEDC CAPS ---------------------------------------*/ #define SOC_LEDC_SUPPORT_HS_MODE (1) +#define SOC_LEDC_SUPPORT_HS_MODE (1) +#define SOC_LEDC_CHANNEL_NUM (8) +#define SOC_LEDC_TIMER_BIT_WIDE_NUM (20) /*-------------------------- MCPWM CAPS --------------------------------------*/ #define SOC_MCPWM_PERIPH_NUM 2 ///< MCPWM peripheral number @@ -170,7 +173,7 @@ #define SOC_RTCIO_PIN_COUNT 18 /*-------------------------- SIGMA DELTA CAPS --------------------------------*/ -#define SOC_SIGMADELTA_NUM (1) // 1 sigma-delta peripheral +#define SOC_SIGMADELTA_NUM 1 #define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels /*-------------------------- SPI CAPS ----------------------------------------*/ @@ -192,9 +195,10 @@ /*-------------------------- TIMER GROUP CAPS --------------------------------*/ #define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (64) #define SOC_TIMER_GROUP_PRESCALE_BIT_WIDTH (16) -#define SOC_TIMER_GROUPS (2) -#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2) +#define SOC_TIMER_GROUPS (2) +#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2) #define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP) +#define SOC_TIMER_GROUP_LAYOUT {2,2} /*-------------------------- TOUCH SENSOR CAPS -------------------------------*/ #define SOC_TOUCH_SENSOR_NUM (10) diff --git a/components/soc/esp32s2/include/soc/soc.h b/components/soc/esp32s2/include/soc/soc.h index a1ff1edade..6325f311d7 100644 --- a/components/soc/esp32s2/include/soc/soc.h +++ b/components/soc/esp32s2/include/soc/soc.h @@ -12,8 +12,7 @@ // See the License for the specific language governing permissions and // limitations under the License. -#ifndef _ESP32_SOC_H_ -#define _ESP32_SOC_H_ +#pragma once #ifndef __ASSEMBLER__ #include @@ -359,5 +358,3 @@ //Invalid interrupt for number interrupt matrix #define ETS_INVALID_INUM 6 - -#endif /* _ESP32_SOC_H_ */ diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index f8a9b5205b..6adc7587e0 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -127,6 +127,8 @@ /*-------------------------- LEDC CAPS ---------------------------------------*/ #define SOC_LEDC_SUPPORT_XTAL_CLOCK (1) +#define SOC_LEDC_CHANNEL_NUM (8) +#define SOC_LEDC_TIMER_BIT_WIDE_NUM (14) /*-------------------------- MPU CAPS ----------------------------------------*/ //TODO: correct the caller and remove unsupported lines @@ -158,7 +160,7 @@ #define SOC_RTCIO_PIN_COUNT 22 /*-------------------------- SIGMA DELTA CAPS --------------------------------*/ -#define SOC_SIGMADELTA_NUM (1) // 1 sigma-delta peripheral +#define SOC_SIGMADELTA_NUM 1 #define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels /*-------------------------- SPI CAPS ----------------------------------------*/ @@ -194,12 +196,14 @@ #define SOC_SYSTIMER_BIT_WIDTH_HI (32) // Bit width of systimer high part /*-------------------------- TIMER GROUP CAPS --------------------------------*/ -#define SOC_TIMER_GROUP_SUPPORT_XTAL (1) +#define SOC_TIMER_GROUP_SUPPORT_XTAL (1) +#define SOC_TIMER_GROUP_XTAL_MHZ (40) #define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (64) #define SOC_TIMER_GROUP_PRESCALE_BIT_WIDTH (16) -#define SOC_TIMER_GROUPS (2) -#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2) +#define SOC_TIMER_GROUPS (2) +#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2) #define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP) +#define SOC_TIMER_GROUP_LAYOUT {2,2} /*-------------------------- TOUCH SENSOR CAPS -------------------------------*/ #define SOC_TOUCH_SENSOR_NUM (15) /*! 15 Touch channels */ diff --git a/components/spiffs/esp_spiffs.c b/components/spiffs/esp_spiffs.c index c0205ba8ef..92ef3aa18d 100644 --- a/components/spiffs/esp_spiffs.c +++ b/components/spiffs/esp_spiffs.c @@ -275,7 +275,7 @@ esp_err_t esp_spiffs_info(const char* partition_label, size_t *total_bytes, size if (esp_spiffs_by_label(partition_label, &index) != ESP_OK) { return ESP_ERR_INVALID_STATE; } - SPIFFS_info(_efs[index]->fs, total_bytes, used_bytes); + SPIFFS_info(_efs[index]->fs, (uint32_t *)total_bytes, (uint32_t *)used_bytes); return ESP_OK; } diff --git a/components/spiffs/include/spiffs_config.h b/components/spiffs/include/spiffs_config.h index a382ba6f95..ca7f0cc6fb 100644 --- a/components/spiffs/include/spiffs_config.h +++ b/components/spiffs/include/spiffs_config.h @@ -51,12 +51,12 @@ #endif // needed types -typedef signed int s32_t; -typedef unsigned int u32_t; -typedef signed short s16_t; -typedef unsigned short u16_t; -typedef signed char s8_t; -typedef unsigned char u8_t; +typedef int32_t s32_t; +typedef uint32_t u32_t; +typedef int16_t s16_t; +typedef uint16_t u16_t; +typedef int8_t s8_t; +typedef uint8_t u8_t; struct spiffs_t; extern void spiffs_api_lock(struct spiffs_t *fs); diff --git a/components/tinyusb/additions/src/tinyusb.c b/components/tinyusb/additions/src/tinyusb.c index e2fd061fc7..967058d372 100644 --- a/components/tinyusb/additions/src/tinyusb.c +++ b/components/tinyusb/additions/src/tinyusb.c @@ -28,6 +28,7 @@ #include "tusb.h" #include "tusb_tasks.h" #include "sdkconfig.h" +#include "esp_rom_gpio.h" const static char *TAG = "TinyUSB"; diff --git a/components/unity/unity_port_esp32.c b/components/unity/unity_port_esp32.c index f85aa503ab..ce2112f1de 100644 --- a/components/unity/unity_port_esp32.c +++ b/components/unity/unity_port_esp32.c @@ -15,6 +15,7 @@ #include "unity.h" #include "sdkconfig.h" #include "soc/cpu.h" +#include "hal/cpu_hal.h" #include "esp_rom_uart.h" #if CONFIG_IDF_TARGET_ESP32 #include "esp32/clk.h" @@ -75,12 +76,12 @@ void unity_gets(char *dst, size_t len) void unity_exec_time_start(void) { - RSR(CCOUNT, s_test_start); + s_test_start = cpu_hal_get_cycle_count(); } void unity_exec_time_stop(void) { - RSR(CCOUNT, s_test_stop); + s_test_stop = cpu_hal_get_cycle_count(); } uint32_t unity_exec_time_get_ms(void) diff --git a/components/vfs/vfs.c b/components/vfs/vfs.c index fc8c70b939..fbf4d90566 100644 --- a/components/vfs/vfs.c +++ b/components/vfs/vfs.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include diff --git a/components/wear_levelling/CMakeLists.txt b/components/wear_levelling/CMakeLists.txt index e5d39463be..e7e2022b8b 100644 --- a/components/wear_levelling/CMakeLists.txt +++ b/components/wear_levelling/CMakeLists.txt @@ -1,3 +1,7 @@ +idf_build_get_property(target IDF_TARGET) +if(${target} STREQUAL "esp32c3") + return() # TODO ESP32-C3 IDF-2180 +endif() idf_component_register(SRCS "Partition.cpp" "SPI_Flash.cpp" "WL_Ext_Perf.cpp" diff --git a/components/wear_levelling/test/test_wl.c b/components/wear_levelling/test/test_wl.c index f46e28c404..77cf31f50c 100644 --- a/components/wear_levelling/test/test_wl.c +++ b/components/wear_levelling/test/test_wl.c @@ -236,7 +236,7 @@ TEST_CASE("multiple write is correct", "[wear_levelling]") check_mem_data(handle, init_val, buff); uint32_t start; - RSR(CCOUNT, start); + start = cpu_hal_get_cycle_count(); for (int m=0 ; m< 100000 ; m++) { @@ -249,7 +249,7 @@ TEST_CASE("multiple write is correct", "[wear_levelling]") check_mem_data(handle, init_val, buff); uint32_t end; - RSR(CCOUNT, end); + end = cpu_hal_get_cycle_count(); uint32_t ms = (end - start) / (esp_clk_cpu_freq() / 1000); printf("loop %4i pass, time= %ims\n", m, ms); if (ms > 10000) { diff --git a/components/wpa_supplicant/src/esp_supplicant/esp_wpa3.c b/components/wpa_supplicant/src/esp_supplicant/esp_wpa3.c index 3a106b5cad..3be8bef2f6 100644 --- a/components/wpa_supplicant/src/esp_supplicant/esp_wpa3.c +++ b/components/wpa_supplicant/src/esp_supplicant/esp_wpa3.c @@ -130,7 +130,7 @@ void esp_wpa3_free_sae_data(void) sae_clear_data(&g_sae_data); } -static u8 *wpa3_build_sae_msg(u8 *bssid, u32 sae_msg_type, u32 *sae_msg_len) +static u8 *wpa3_build_sae_msg(u8 *bssid, u32 sae_msg_type, size_t *sae_msg_len) { u8 *buf = NULL; @@ -138,13 +138,13 @@ static u8 *wpa3_build_sae_msg(u8 *bssid, u32 sae_msg_type, u32 *sae_msg_len) case SAE_MSG_COMMIT: if (ESP_OK != wpa3_build_sae_commit(bssid)) return NULL; - *sae_msg_len = (u32)wpabuf_len(g_sae_commit); + *sae_msg_len = wpabuf_len(g_sae_commit); buf = wpabuf_mhead_u8(g_sae_commit); break; case SAE_MSG_CONFIRM: if (ESP_OK != wpa3_build_sae_confirm()) return NULL; - *sae_msg_len = (u32)wpabuf_len(g_sae_confirm); + *sae_msg_len = wpabuf_len(g_sae_confirm); buf = wpabuf_mhead_u8(g_sae_confirm); break; default: @@ -205,7 +205,7 @@ static int wpa3_parse_sae_confirm(u8 *buf, u32 len) return ESP_OK; } -static int wpa3_parse_sae_msg(u8 *buf, u32 len, u32 sae_msg_type, u16 status) +static int wpa3_parse_sae_msg(u8 *buf, size_t len, u32 sae_msg_type, u16 status) { int ret = ESP_OK; diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.c b/components/wpa_supplicant/src/rsn_supp/wpa.c index a301b6073e..77c0f403c6 100644 --- a/components/wpa_supplicant/src/rsn_supp/wpa.c +++ b/components/wpa_supplicant/src/rsn_supp/wpa.c @@ -80,7 +80,7 @@ void eapol_sm_notify_eap_success(Boolean success) } -wifi_cipher_type_t cipher_type_map_supp_to_public(uint32_t wpa_cipher) +wifi_cipher_type_t cipher_type_map_supp_to_public(unsigned wpa_cipher) { switch (wpa_cipher) { case WPA_CIPHER_NONE: @@ -109,7 +109,7 @@ wifi_cipher_type_t cipher_type_map_supp_to_public(uint32_t wpa_cipher) } } -uint32_t cipher_type_map_public_to_supp(wifi_cipher_type_t cipher) +unsigned cipher_type_map_public_to_supp(wifi_cipher_type_t cipher) { switch (cipher) { case WIFI_CIPHER_TYPE_NONE: @@ -2298,7 +2298,7 @@ void wpa_supplicant_stop_countermeasures(u16 *pisunicast) int wpa_michael_mic_failure(u16 isunicast) { struct wpa_sm *sm = &gWpaSm; - int32_t *pmic_errors_seen=(isunicast)? &((sm->install_ptk).mic_errors_seen) : &((sm->install_gtk).mic_errors_seen); + int *pmic_errors_seen=(isunicast)? &((sm->install_ptk).mic_errors_seen) : &((sm->install_gtk).mic_errors_seen); wpa_printf(MSG_DEBUG, "\nTKIP MIC failure occur\n"); diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.h b/components/wpa_supplicant/src/rsn_supp/wpa.h index 491c12c813..bd64af2bc7 100644 --- a/components/wpa_supplicant/src/rsn_supp/wpa.h +++ b/components/wpa_supplicant/src/rsn_supp/wpa.h @@ -130,9 +130,9 @@ char * dup_binstr(const void *src, size_t len); int wpa_michael_mic_failure(u16 isunicast); -wifi_cipher_type_t cipher_type_map_supp_to_public(uint32_t wpa_cipher); +wifi_cipher_type_t cipher_type_map_supp_to_public(unsigned cipher); -uint32_t cipher_type_map_supp_to_public(wifi_cipher_type_t cipher); +unsigned cipher_type_map_public_to_supp(wifi_cipher_type_t cipher); void wpa_sta_clear_curr_pmksa(void); diff --git a/components/wpa_supplicant/src/utils/common.h b/components/wpa_supplicant/src/utils/common.h index fb4865652f..70119d0b56 100644 --- a/components/wpa_supplicant/src/utils/common.h +++ b/components/wpa_supplicant/src/utils/common.h @@ -27,16 +27,14 @@ typedef int16_t s16; typedef int8_t s8; #endif /*ESP_PLATFORM*/ -#if defined(__XTENSA__) +#if defined(__linux__) || defined(__GLIBC__) +#include +#include +#else #include #define __BYTE_ORDER BYTE_ORDER #define __LITTLE_ENDIAN LITTLE_ENDIAN #define __BIG_ENDIAN BIG_ENDIAN -#endif /*__XTENSA__*/ - -#if defined(__linux__) || defined(__GLIBC__) || defined(__ets__) -#include -#include #endif /* __linux__ */ /* Define platform specific byte swapping macros */ @@ -85,16 +83,16 @@ static inline unsigned int wpa_swap_32(unsigned int v) #if __BYTE_ORDER == __LITTLE_ENDIAN #define le_to_host16(n) ((__force u16) (le16) (n)) #define host_to_le16(n) ((__force le16) (u16) (n)) -#define be_to_host16(n) __bswap_16((__force u16) (be16) (n)) -#define host_to_be16(n) ((__force be16) __bswap_16((n))) +#define be_to_host16(n) __builtin_bswap16((__force u16) (be16) (n)) +#define host_to_be16(n) ((__force be16) __builtin_bswap16((n))) #define le_to_host32(n) ((__force u32) (le32) (n)) #define host_to_le32(n) ((__force le32) (u32) (n)) -#define be_to_host32(n) __bswap_32((__force u32) (be32) (n)) -#define host_to_be32(n) ((__force be32) __bswap_32((n))) +#define be_to_host32(n) __builtin_bswap32((__force u32) (be32) (n)) +#define host_to_be32(n) ((__force be32) __builtin_bswap32((n))) #define le_to_host64(n) ((__force u64) (le64) (n)) #define host_to_le64(n) ((__force le64) (u64) (n)) -#define be_to_host64(n) __bswap_64((__force u64) (be64) (n)) -#define host_to_be64(n) ((__force be64) bswap_64((n))) +#define be_to_host64(n) __builtin_bswap64((__force u64) (be64) (n)) +#define host_to_be64(n) ((__force be64) __builtin_bswap64((n))) #elif __BYTE_ORDER == __BIG_ENDIAN #define le_to_host16(n) __bswap_16(n) #define host_to_le16(n) __bswap_16(n) diff --git a/tools/cmake/build.cmake b/tools/cmake/build.cmake index 7560b0267b..d9fd06258d 100644 --- a/tools/cmake/build.cmake +++ b/tools/cmake/build.cmake @@ -155,7 +155,7 @@ function(__build_init idf_path) # # - lwip is here so that #include works without any special provisions # - esp_hw_support is here for backward compatibility - set(requires_common cxx newlib freertos esp_hw_support heap log lwip soc hal esp_rom esp_common esp_system xtensa) + set(requires_common cxx newlib freertos esp_hw_support heap log lwip soc hal esp_rom esp_common esp_system) idf_build_set_property(__COMPONENT_REQUIRES_COMMON "${requires_common}") __build_get_idf_git_revision() diff --git a/tools/find_build_apps/common.py b/tools/find_build_apps/common.py index 51368c5ce8..6f3feea0bd 100644 --- a/tools/find_build_apps/common.py +++ b/tools/find_build_apps/common.py @@ -264,6 +264,7 @@ class BuildItem(object): sys.executable, IDF_SIZE_PY, '--json', + '--target', self.target, '-o', size_json_fp, map_file ] diff --git a/tools/unit-test-app/components/test_utils/CMakeLists.txt b/tools/unit-test-app/components/test_utils/CMakeLists.txt index b327cd4915..a950bfa82d 100644 --- a/tools/unit-test-app/components/test_utils/CMakeLists.txt +++ b/tools/unit-test-app/components/test_utils/CMakeLists.txt @@ -1,8 +1,22 @@ -idf_component_register(SRCS "ccomp_timer.c" - "ref_clock.c" - "test_runner.c" - "test_utils.c" - "ccomp_timer_impl.c" +set(srcs "ccomp_timer.c" + "test_runner.c" + "test_utils.c") + +if(CONFIG_IDF_TARGET_ESP32) + list(APPEND srcs "ref_clock_impl_rmt_pcnt.c") +else() + list(APPEND srcs "ref_clock_impl_timergroup.c") +endif() + +if(CONFIG_IDF_TARGET_ARCH_RISCV) + list(APPEND srcs "ccomp_timer_impl_riscv.c") +endif() + +if(CONFIG_IDF_TARGET_ARCH_XTENSA) + list(APPEND srcs "ccomp_timer_impl_xtensa.c") +endif() + +idf_component_register(SRCS ${srcs} INCLUDE_DIRS include PRIV_INCLUDE_DIRS private_include REQUIRES spi_flash idf_test cmock diff --git a/tools/unit-test-app/components/test_utils/ccomp_timer.c b/tools/unit-test-app/components/test_utils/ccomp_timer.c index 104d8f8a50..01ee71e6e8 100644 --- a/tools/unit-test-app/components/test_utils/ccomp_timer.c +++ b/tools/unit-test-app/components/test_utils/ccomp_timer.c @@ -23,15 +23,6 @@ #include "esp_log.h" #include "esp_intr_alloc.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/clk.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/clk.h" -#endif - - static const char TAG[] = "ccomp_timer"; esp_err_t ccomp_timer_start(void) diff --git a/tools/unit-test-app/components/test_utils/ccomp_timer_impl_riscv.c b/tools/unit-test-app/components/test_utils/ccomp_timer_impl_riscv.c new file mode 100644 index 0000000000..477170f4da --- /dev/null +++ b/tools/unit-test-app/components/test_utils/ccomp_timer_impl_riscv.c @@ -0,0 +1,121 @@ +// Copyright 2019 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include +#include "freertos/portmacro.h" +#include "esp_freertos_hooks.h" +#include "soc/soc_caps.h" +#include "hal/cpu_hal.h" +#include "esp_rom_sys.h" + +#if CONFIG_IDF_TARGET_ESP32C3 +#include "esp32c3/clk.h" +#endif + +typedef enum { + PERF_TIMER_UNINIT = 0, // timer has not been initialized yet + PERF_TIMER_IDLE, // timer has been initialized but is not tracking elapsed time + PERF_TIMER_ACTIVE // timer is tracking elapsed time +} ccomp_timer_state_t; + +typedef struct { + uint32_t last_ccount; // last CCOUNT value, updated every os tick + ccomp_timer_state_t state; // state of the timer + int64_t ccount; // accumulated processors cycles during the time when timer is active +} ccomp_timer_status_t; + +// Each core has its independent timer +ccomp_timer_status_t s_status[SOC_CPU_CORES_NUM]; + +static portMUX_TYPE s_lock = portMUX_INITIALIZER_UNLOCKED; + +static void IRAM_ATTR update_ccount(void) +{ + if (s_status[cpu_hal_get_core_id()].state == PERF_TIMER_ACTIVE) { + int64_t new_ccount = cpu_hal_get_cycle_count(); + if (new_ccount > s_status[cpu_hal_get_core_id()].last_ccount) { + s_status[cpu_hal_get_core_id()].ccount += new_ccount - s_status[cpu_hal_get_core_id()].last_ccount; + } else { + // CCOUNT has wrapped around + s_status[cpu_hal_get_core_id()].ccount += new_ccount + (UINT32_MAX - s_status[cpu_hal_get_core_id()].last_ccount); + } + s_status[cpu_hal_get_core_id()].last_ccount = new_ccount; + } +} + +esp_err_t ccomp_timer_impl_init(void) +{ + s_status[cpu_hal_get_core_id()].state = PERF_TIMER_IDLE; + return ESP_OK; +} + +esp_err_t ccomp_timer_impl_deinit(void) +{ + s_status[cpu_hal_get_core_id()].state = PERF_TIMER_UNINIT; + return ESP_OK; +} + +esp_err_t ccomp_timer_impl_start(void) +{ + s_status[cpu_hal_get_core_id()].state = PERF_TIMER_ACTIVE; + s_status[cpu_hal_get_core_id()].last_ccount = cpu_hal_get_cycle_count(); + // Update elapsed cycles every OS tick + esp_register_freertos_tick_hook_for_cpu(update_ccount, cpu_hal_get_core_id()); + return ESP_OK; +} + +esp_err_t IRAM_ATTR ccomp_timer_impl_stop(void) +{ + esp_deregister_freertos_tick_hook_for_cpu(update_ccount, cpu_hal_get_core_id()); + update_ccount(); + s_status[cpu_hal_get_core_id()].state = PERF_TIMER_IDLE; + return ESP_OK; +} + +int64_t IRAM_ATTR ccomp_timer_impl_get_time(void) +{ + update_ccount(); + int64_t cycles = s_status[cpu_hal_get_core_id()].ccount; + esp_rom_printf("cycles=%lld\n", cycles); + esp_rom_printf("cpu freq=%d\r\n", esp_clk_cpu_freq()); + esp_rom_printf("duration=%lld\n", cycles * 1000000 / esp_clk_cpu_freq()); + return (cycles * 1000000) / esp_clk_cpu_freq(); +} + +esp_err_t ccomp_timer_impl_reset(void) +{ + s_status[cpu_hal_get_core_id()].ccount = 0; + s_status[cpu_hal_get_core_id()].last_ccount = 0; + return ESP_OK; +} + +bool ccomp_timer_impl_is_init(void) +{ + return s_status[cpu_hal_get_core_id()].state != PERF_TIMER_UNINIT; +} + +bool IRAM_ATTR ccomp_timer_impl_is_active(void) +{ + return s_status[cpu_hal_get_core_id()].state == PERF_TIMER_ACTIVE; +} + +void IRAM_ATTR ccomp_timer_impl_lock(void) +{ + portENTER_CRITICAL(&s_lock); +} + +void IRAM_ATTR ccomp_timer_impl_unlock(void) +{ + portEXIT_CRITICAL(&s_lock); +} diff --git a/tools/unit-test-app/components/test_utils/ccomp_timer_impl.c b/tools/unit-test-app/components/test_utils/ccomp_timer_impl_xtensa.c similarity index 100% rename from tools/unit-test-app/components/test_utils/ccomp_timer_impl.c rename to tools/unit-test-app/components/test_utils/ccomp_timer_impl_xtensa.c diff --git a/tools/unit-test-app/components/test_utils/ref_clock.c b/tools/unit-test-app/components/test_utils/ref_clock_impl_rmt_pcnt.c similarity index 100% rename from tools/unit-test-app/components/test_utils/ref_clock.c rename to tools/unit-test-app/components/test_utils/ref_clock_impl_rmt_pcnt.c diff --git a/tools/unit-test-app/components/test_utils/ref_clock_impl_timergroup.c b/tools/unit-test-app/components/test_utils/ref_clock_impl_timergroup.c new file mode 100644 index 0000000000..bdacc2baa9 --- /dev/null +++ b/tools/unit-test-app/components/test_utils/ref_clock_impl_timergroup.c @@ -0,0 +1,50 @@ +// Copyright 2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#include "test_utils.h" +#include "driver/periph_ctrl.h" +#include "soc/periph_defs.h" +#include "hal/timer_hal.h" + +#define TIMER_GROUP_ID (1) +#define TIMER_ID (0) +static timer_hal_context_t timer_hal; + +void ref_clock_init(void) +{ + periph_module_enable(PERIPH_TIMG1_MODULE); + timer_hal_init(&timer_hal, TIMER_GROUP_ID, TIMER_ID); + timer_hal_set_use_xtal(&timer_hal, true); // Select XTAL, so ref_clock is independent of the APL clock + timer_hal_set_divider(&timer_hal, 40); // Resolution is configured to 1MHz + timer_hal_set_counter_increase(&timer_hal, true); // increase mode + timer_hal_set_counter_enable(&timer_hal, false); // stop timer from running + timer_hal_set_counter_value(&timer_hal, 0); // initial count value to zero + timer_hal_intr_disable(&timer_hal); // disable interrupt + timer_hal_set_alarm_enable(&timer_hal, false); // we don't need to generate any interrupt + timer_hal_set_auto_reload(&timer_hal, false); + timer_hal_set_counter_enable(&timer_hal, true); // start counter +} + +void ref_clock_deinit(void) +{ + timer_hal_set_counter_enable(&timer_hal, false); // stop timer from running + periph_module_disable(PERIPH_TIMG1_MODULE); +} + +uint64_t ref_clock_get(void) +{ + uint64_t count_value = 0; + timer_hal_get_counter_value(&timer_hal, &count_value); + return count_value; +} diff --git a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_api.c b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_api.c index a71dddea85..75b24d2588 100644 --- a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_api.c +++ b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_api.c @@ -5,7 +5,6 @@ #include "esp_log.h" #include "esp_attr.h" #include "ccomp_timer.h" -#include "eri.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c index 7039c82dba..6fc92090bd 100644 --- a/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c +++ b/tools/unit-test-app/components/test_utils/test/ccomp_timer_test_data.c @@ -5,7 +5,6 @@ #include "esp_log.h" #include "esp_attr.h" #include "ccomp_timer.h" -#include "eri.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h"