From 41bfac91d98eabdd591db7ea1fd5c57e2c336a5f Mon Sep 17 00:00:00 2001 From: Alexey Gerenkov Date: Thu, 11 Apr 2024 15:36:02 +0300 Subject: [PATCH] fix(build): Fix printf formating errors --- components/esp_driver_spi/src/gpspi/spi_slave_hd.c | 2 +- components/esp_hw_support/esp_key_mgr.c | 4 ++-- components/hal/mipi_dsi_hal.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c index 22a53255cf..220415c32d 100644 --- a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c +++ b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c @@ -591,7 +591,7 @@ static esp_err_t s_spi_slave_hd_setup_priv_trans(spi_host_device_t host, spi_sla if (((uint32_t)orig_trans->data) | (byte_len & (alignment - 1))) { ESP_RETURN_ON_FALSE(orig_trans->flags & SPI_SLAVE_HD_TRANS_DMA_BUFFER_ALIGN_AUTO, ESP_ERR_INVALID_ARG, TAG, "data buffer addr&len not align to %d, or not dma_capable", alignment); byte_len = (byte_len + alignment - 1) & (~(alignment - 1)); // up align to alignment - ESP_LOGD(TAG, "Re-allocate %s buffer of len %ld for DMA", (chan == SPI_SLAVE_CHAN_TX) ? "TX" : "RX", byte_len); + ESP_LOGD(TAG, "Re-allocate %s buffer of len %d for DMA", (chan == SPI_SLAVE_CHAN_TX) ? "TX" : "RX", byte_len); priv_trans->aligned_buffer = heap_caps_aligned_alloc(64, byte_len, MALLOC_CAP_DMA); if (priv_trans->aligned_buffer == NULL) { return ESP_ERR_NO_MEM; diff --git a/components/esp_hw_support/esp_key_mgr.c b/components/esp_hw_support/esp_key_mgr.c index 178f0b8038..523e2f847a 100644 --- a/components/esp_hw_support/esp_key_mgr.c +++ b/components/esp_hw_support/esp_key_mgr.c @@ -135,7 +135,7 @@ static bool check_huk_info_validity(const esp_key_mgr_huk_info_t *huk_info) { uint32_t calc_crc = esp_rom_crc32_le(0, huk_info->info, KEY_MGR_HUK_INFO_SIZE); if (calc_crc != huk_info->crc) { - ESP_LOGE(TAG, "Calculated CRC for HUK %lX does not match with %lX", calc_crc, huk_info->crc); + ESP_LOGE(TAG, "Calculated CRC for HUK %X does not match with %X", calc_crc, huk_info->crc); return false; } return true; @@ -145,7 +145,7 @@ static bool check_key_info_validity(const esp_key_mgr_key_info_t *key_info) { uint32_t calc_crc = esp_rom_crc32_le(0, key_info->info, KEY_MGR_KEY_RECOVERY_INFO_SIZE); if (calc_crc != key_info->crc) { - ESP_LOGE(TAG, "Calculated CRC for Key info %lX does not match with %lX", calc_crc, key_info->crc); + ESP_LOGE(TAG, "Calculated CRC for Key info %X does not match with %X", calc_crc, key_info->crc); return false; } return true; diff --git a/components/hal/mipi_dsi_hal.c b/components/hal/mipi_dsi_hal.c index 7ef078c2c6..862a7aeb31 100644 --- a/components/hal/mipi_dsi_hal.c +++ b/components/hal/mipi_dsi_hal.c @@ -76,7 +76,7 @@ void mipi_dsi_hal_configure_phy_pll(mipi_dsi_hal_context_t *hal, uint32_t phy_cl mipi_dsi_hal_phy_write_register(hal, 0x18, 0x80 | (((pll_M - 1) >> 5) & 0x0F)); // update the real lane bit rate hal->lane_bit_rate_mbps = ref_freq_mhz * pll_M / pll_N; - HAL_LOGD("dsi_hal", "phy pll: ref=%luHz, lane_bit_rate=%luMbps, M=%d, N=%d, hsfreqrange=%d", + HAL_LOGD("dsi_hal", "phy pll: ref=%uHz, lane_bit_rate=%uMbps, M=%d, N=%d, hsfreqrange=%d", phy_clk_src_freq_hz, hal->lane_bit_rate_mbps, pll_M, pll_N, hs_freq_sel); }