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Merge branch 'bugfix/fix_i2s_cache_sych_alignment_on_p4' into 'master'
fix(i2s): fix cache sync alignment on p4 See merge request espressif/esp-idf!28138
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@ -1073,7 +1073,7 @@ esp_err_t i2s_channel_preload_data(i2s_chan_handle_t tx_handle, const void *src,
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/* Load the data from the last loaded position */
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memcpy((uint8_t *)(tx_handle->dma.curr_ptr + tx_handle->dma.rw_pos), data_ptr, bytes_can_load);
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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esp_cache_msync(tx_handle->dma.curr_ptr + tx_handle->dma.rw_pos, bytes_can_load, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
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esp_cache_msync(tx_handle->dma.curr_ptr, tx_handle->dma.buf_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
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#endif
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data_ptr += bytes_can_load; // Move forward the data pointer
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total_loaded_bytes += bytes_can_load; // Add to the total loaded bytes
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@ -1132,7 +1132,7 @@ esp_err_t i2s_channel_write(i2s_chan_handle_t handle, const void *src, size_t si
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}
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memcpy(data_ptr, src_byte, bytes_can_write);
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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esp_cache_msync(data_ptr, bytes_can_write, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
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esp_cache_msync(handle->dma.curr_ptr, handle->dma.buf_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
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#endif
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size -= bytes_can_write;
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src_byte += bytes_can_write;
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