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component/bt: add DRAM_ATTR attribute to global variables(mostly in bss segment) in bt.c which can be accessed in ISR
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@ -334,28 +334,28 @@ SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END,
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SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
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SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
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static struct osi_funcs_t *osi_funcs_p;
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static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
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#if CONFIG_SPIRAM_USE_MALLOC
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static btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
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SemaphoreHandle_t btdm_queue_table_mux = NULL;
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static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
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static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
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#endif /* #if CONFIG_SPIRAM_USE_MALLOC */
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/* Static variable declare */
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// timestamp when PHY/RF was switched on
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static int64_t s_time_phy_rf_just_enabled = 0;
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static esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
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static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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static portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
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static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
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// measured average low power clock period in micro seconds
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static uint32_t btdm_lpcycle_us = 0;
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static uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
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static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
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static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
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#ifdef CONFIG_PM_ENABLE
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static esp_pm_lock_handle_t s_pm_lock;
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static esp_timer_handle_t s_btdm_slp_tmr;
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static QueueHandle_t s_pm_lock_sem = NULL;
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static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
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static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
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static DRAM_ATTR QueueHandle_t s_pm_lock_sem = NULL;
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#endif
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static inline void btdm_check_and_init_bb(void)
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