Merge branch 'docs/update_CN_trans_esp-wifi_JTAG-debugging' into 'master'

docs: update CN translation for esp_wifi and jtag-dubugging/index

Closes DOC-1597

See merge request espressif/esp-idf!16144
This commit is contained in:
Dai Zi Yan 2021-12-07 09:32:48 +00:00
commit 40191ec31e
9 changed files with 126 additions and 143 deletions

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@ -136,10 +136,11 @@ Configuring {IDF_TARGET_NAME} Target
Once OpenOCD is installed, you can proceed to configuring the {IDF_TARGET_NAME} target (i.e {IDF_TARGET_NAME} board with JTAG interface). Configuring the target is split into the following three steps:
* Configure and connect JTAG interface
* Run OpenOCD
* Upload application for debugging
* :ref:`jtag-debugging-configure-and-connect-JTAG-interface`
* :ref:`jtag-debugging-run-openocd`
* :ref:`jtag-upload-app-debug`
.. _jtag-debugging-configure-and-connect-JTAG-interface:
Configure and connect JTAG interface
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@ -311,7 +312,7 @@ Related Documents
.. toctree::
:hidden:
:maxdepth: 1
using-debugger
@ -323,4 +324,4 @@ Related Documents
- :doc:`debugging-examples`
- :doc:`tips-and-quirks`
- :doc:`../app_trace`
- `Introduction to ESP-Prog Board <https://docs.espressif.com/projects/espressif-esp-iot-solution/en/latest/hw-reference/ESP-Prog_guide.html>`__
- `Introduction to ESP-Prog Board <https://docs.espressif.com/projects/espressif-esp-iot-solution/en/latest/hw-reference/ESP-Prog_guide.html>`__

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@ -10,7 +10,7 @@ The Wi-Fi libraries provide support for configuring and monitoring the {IDF_TARG
- Station mode (aka STA mode or Wi-Fi client mode). {IDF_TARGET_NAME} connects to an access point.
- AP mode (aka Soft-AP mode or Access Point mode). Stations connect to the {IDF_TARGET_NAME}.
- Combined AP-STA mode ({IDF_TARGET_NAME} is concurrently an access point and a station connected to another access point).
- Station/AP-coexistence mode ({IDF_TARGET_NAME} is concurrently an access point and a station connected to another access point).
- Various security modes for the above (WPA, WPA2, WEP, etc.)
- Scanning for access points (active & passive scanning).
@ -22,9 +22,9 @@ Application Examples
The :example:`wifi` directory of ESP-IDF examples contains the following applications:
Code examples for Wi-Fi are provided in the :example:`wifi` directory of ESP-IDF examples.
* Code examples for Wi-Fi.
In addition, there is a simple `esp-idf-template <https://github.com/espressif/esp-idf-template>`_ application to demonstrate a minimal IDF project structure.
* A simple `esp-idf-template <https://github.com/espressif/esp-idf-template>`_ application to demonstrate a minimal IDF project structure.
API Reference
@ -32,5 +32,3 @@ API Reference
.. include-build-file:: inc/esp_wifi.inc
.. include-build-file:: inc/esp_wifi_types.inc

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@ -30,9 +30,7 @@ SPI Slave Capabilities of Espressif chips
Introduction
------------
In the half duplex mode, the master has to use the protocol defined by the slave to communicate
with the slave. Each transaction may consist of the following phases (list by the order they
should exist):
In the half duplex mode, the master has to use the protocol defined by the slave to communicate with the slave. Each transaction may consist of the following phases (list by the order they should exist):
- Command: 8-bit, master to slave
@ -40,29 +38,22 @@ should exist):
- Address: 8-bit, master to slave, optional
For some commands (WRBUF, RDBUF), this phase specifies the address of shared buffer to write
to/read from. For other commands with this phase, they are meaningless, but still have to
exist in the transaction.
For some commands (WRBUF, RDBUF), this phase specifies the address of the shared buffer to write to/read from. For other commands with this phase, they are meaningless but still have to exist in the transaction.
- Dummy: 8-bit, floating, optional
This phase is the turn around time between the master and the slave on the bus, and also
provides enough time for the slave to prepare the data to send to master.
This phase is the turnaround time between the master and the slave on the bus, and also provides enough time for the slave to prepare the data to send to the master.
- Data: variable length, the direction is also determined by the command.
This may be a data OUT phase, in which the direction is slave to master, or a data IN phase,
in which the direction is master to slave.
This may be a data OUT phase, in which the direction is slave to master, or a data IN phase, in which the direction is master to slave.
The *direction* means which side (master or slave) controls the MOSI, MISO, WP and HD pins.
The *direction* means which side (master or slave) controls the MOSI, MISO, WP, and HD pins.
Data IO Modes
-------------
In some IO modes, more data wires can be use to send the data. As a result, the SPI clock cycles
required for the same amount of data will be less than in 1-bit mode. For example, in QIO mode,
address and data (IN and OUT) should be sent on all 4 data wires (MOSI, MISO, WP, and HD). Here's
the modes supported by ESP32-S2 SPI slave and the wire number used in corresponding modes.
In some IO modes, more data wires can be used to send the data. As a result, the SPI clock cycles required for the same amount of data will be less than in the 1-bit mode. For example, in QIO mode, address and data (IN and OUT) should be sent on all 4 data wires (MOSI, MISO, WP, and HD). Here are the modes supported by the ESP32-S2 SPI slave and the wire number used in corresponding modes.
+-------+------------+------------+--------------+---------+
| Mode | command WN | address WN | dummy cycles | data WN |
@ -80,16 +71,12 @@ the modes supported by ESP32-S2 SPI slave and the wire number used in correspond
| QPI | 4 | 4 | 4 | 4 |
+-------+------------+------------+--------------+---------+
Normally, which mode is used is determined is determined by the command sent by the master (See
:ref:`spi_slave_hd_supported_cmds`), except from the QPI mode.
Normally, which mode is used is determined by the command sent by the master (See :ref:`spi_slave_hd_supported_cmds`), except the QPI mode.
QPI Mode
^^^^^^^^
The QPI mode is a special state of the SPI Slave. The master can send ENQPI command to put the
slave into the QPI mode state. In the QPI mode, the command is also sent in 4-bit, thus it's not
compatible with the normal modes. The master should only send QPI commands when the slave is in
the QPI mode. To exit form the QPI mode, master can send EXQPI command.
The QPI mode is a special state of the SPI Slave. The master can send the ENQPI command to put the slave into the QPI mode state. In the QPI mode, the command is also sent in 4-bit, thus it's not compatible with the normal modes. The master should only send QPI commands when the slave is in QPI mode. To exit from the QPI mode, master can send the EXQPI command.
.. _spi_slave_hd_supported_cmds:
@ -97,8 +84,7 @@ Supported Commands
------------------
.. note::
The command name are in a master-oriented direction. For example, WRBUF means master writes
the buffer of slave.
The command name is in a master-oriented direction. For example, WRBUF means master writes the buffer of slave.
+----------+---------------------+---------+----------+----------------------------------------------------------+
| Name | Description | Command | Address | Data |
@ -126,9 +112,7 @@ Supported Commands
| EXQPI | Exit QPI mode | 0xDD | - | - |
+----------+---------------------+---------+----------+----------------------------------------------------------+
Moreover, WRBUF, RDBUF, WRDMA, RDDMA commands have their 2-bit and 4-bit version. To do
transactions in 2-bit or 4-bit mode, send the original command ORed by the corresponding command
mask below. For example, command 0xA1 means WRBUF in QIO mode.
Moreover, WRBUF, RDBUF, WRDMA, RDDMA commands have their 2-bit and 4-bit version. To do transactions in 2-bit or 4-bit mode, send the original command ORed by the corresponding command mask below. For example, command 0xA1 means WRBUF in QIO mode.
+-------+------+
| Mode | Mask |
@ -149,23 +133,15 @@ mask below. For example, command 0xA1 means WRBUF in QIO mode.
Segment Transaction Mode
------------------------
Segment transaction mode is the only mode supported by the SPI Slave HD driver for now. In this
mode, for a transaction the slave load onto the DMA, the master is allowed to read or write in
segments. This way the master doesn't have to prepare large buffer as the size of data provided
by the slave. After the master finish reading/writing a buffer, it has to send corresponding
termination command to the slave as a synchronization signal. The slave driver will update new
data (if exist) onto the DMA upon seeing the termination command.
Segment transaction mode is the only mode supported by the SPI Slave HD driver for now. In this mode, for a transaction the slave load onto the DMA, the master is allowed to read or write in segments. This way the master doesn't have to prepare a large buffer as the size of data provided by the slave. After the master finishes reading/writing a buffer, it has to send the corresponding termination command to the slave as a synchronization signal. The slave driver will update new data (if exist) onto the DMA upon seeing the termination command.
The termination command is WR_DONE (0x07) for the WRDMA, and CMD8 (0x08) for the RDDMA.
The termination command is WR_DONE (0x07) for the WRDMA and CMD8 (0x08) for the RDDMA.
Here's an example for the flow the master read data from the slave DMA:
1. The slave loads 4092 bytes of data onto the RDDMA
2. The master do seven RDDMA transactions, each of them are 512 bytes long, and reads the first
3584 bytes from the slave
3. The master do the last RDDMA transaction of 512 bytes (equal, longer or shorter than the total
length loaded by the slave are all allowed). The first 508 bytes are valid data from the
slave, while the last 4 bytes are meaningless bytes.
2. The master do seven RDDMA transactions, each of them is 512 bytes long, and reads the first 3584 bytes from the slave
3. The master do the last RDDMA transaction of 512 bytes (equal, longer, or shorter than the total length loaded by the slave are all allowed). The first 508 bytes are valid data from the slave, while the last 4 bytes are meaningless bytes.
4. The master sends CMD8 to the slave
5. The slave loads another 4092 bytes of data onto the RDDMA
6. The master can start new reading transactions after it sends the CMD8

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@ -88,17 +88,17 @@
* - 名字
- 描述
* - ``board/esp32-wrover-kit-3.3v.cfg``
- 板载 3.3V 模组ESP32-WROOM-32ESP32-WROVER-BESP32-WROVER-E ESP-WROVER-KIT 开发板配置文件
- 板载 3.3 V 模组ESP32-WROOM-32ESP32-WROVER-BESP32-WROVER-E ESP-WROVER-KIT 开发板配置文件
* - ``board/esp32-wrover-kit-1.8v.cfg``
- 板载 1.8V 模组ESP32-WROVER ESP-WROVER-KIT 开发板配置文件
- 板载 1.8 V 模组ESP32-WROVER ESP-WROVER-KIT 开发板配置文件
* - ``board/esp32-ethernet-kit-3.3v.cfg``
- 板载 3.3V 模组ESP32-WROVER-B / ESP32-WROVER-E ESP-Ethernet-KIT 开发板配置文件
- 板载 3.3 V 模组ESP32-WROVER-B / ESP32-WROVER-E ESP-Ethernet-KIT 开发板配置文件
* - ``target/esp32.cfg``
- ESP32 的目标配置文件,可以和某个 ``interface/`` 下的配置文件一同使用
* - ``target/esp32-solo-1.cfg``
- ESP32-SOLO-1 的目标配置文件,和 ``esp32.cfg`` 的差别在于它仅配置一个 CPU
- ESP32-SOLO-1 模组的目标配置文件,和 ``esp32.cfg`` 的差别在于它仅配置一个 CPU
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- 适用于 ESP-WROVER-KIT ESP-Prog 板子JTAG 适配器配置文件
- 适用于 ESP-WROVER-KIT ESP-Prog JTAG 适配器配置文件
---
@ -111,7 +111,7 @@
* - 名字
- 描述
* - ``ESP32_FLASH_VOLTAGE``
- 如果 ESP32 模组集成的是 1.8 V Flash将该变量设置为 ``1.8``,详情请参考 :ref:`jtag-debugging-tip-code-flash-voltage`
- 如果 ESP32 模组集成的是 1.8 V flash将该变量设置为 ``1.8``,详情请参考 :ref:`jtag-debugging-tip-code-flash-voltage`
* - ``ESP32_ONLYCPU``
- 对于多核芯片,将该值设置为 ``1`` 可以仅启用单核调试功能
@ -119,11 +119,11 @@
.. jtag-pins
.. list-table:: ESP32 脚和 JTAG 接口信号
.. list-table:: ESP32 脚和 JTAG 接口信号
:widths: 25 75
:header-rows: 1
* - ESP32
* - ESP32
- JTAG 信号
* - MTDO / GPIO15
- TDO

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@ -7,14 +7,13 @@
.. These code blocks can be moved back to the main .rst files, with target-specific
.. file names being replaced by substitutions.
.. run-openocd
::
openocd -f board/esp32s2-kaluga-1.cfg
openocd -f board/esp32c3-builtin.cfg
.. |run-openocd-device-name| replace:: ESP32-S2-Kaluga-1 开发板
.. |run-openocd-device-name| replace:: 通过内置 USB 连接的 ESP32-C3
---
@ -22,21 +21,25 @@
::
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32s2-kaluga-1.cfg
Open On-Chip Debugger v0.10.0-esp32-20200420 (2020-04-20-16:15)
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c3-builtin.cfg
Open On-Chip Debugger v0.10.0-esp32-20201202-26-g05a036c2 (2021-03-15-17:18)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
none separate
adapter speed: 20000 kHz
http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Warn : Transport "jtag" was already selected
force hard breakpoints
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 20000 kHz
Info : JTAG tap: esp32s2.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32s2: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32s2: Core was reset (pwrstat=0x5F, after clear 0x0F).
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
Info : clock speed 40000 kHz
Info : JTAG tap: esp32c3.cpu tap/device found: 0x00005c25 (mfg: 0x612 (Espressif Systems), part: 0x0005, ver: 0x0)
Info : datacount=2 progbufsize=16
Info : Examined RISC-V core; found 1 harts
Info : hart 0: XLEN=32, misa=0x40101104
Info : Listening on port 3333 for gdb connections
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32s2-kaluga-1.cfg``
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c3-builtin.cfg``
---
@ -44,7 +47,7 @@
::
openocd -f board/esp32s2-kaluga-1.cfg -c "program_esp filename.bin 0x10000 verify exit"
openocd -f board/esp32c3-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
---
@ -52,7 +55,7 @@
.. code-block:: bash
src/openocd -f board/esp32s2-kaluga-1.cfg
src/openocd -f board/esp32c3-builtin.cfg
---
@ -60,13 +63,13 @@
.. code-block:: batch
src\openocd -f board/esp32s2-kaluga-1.cfg
src\openocd -f board/esp32c3-builtin.cfg
---
.. idf-py-openocd-default-cfg
.. |idf-py-def-cfg| replace:: ``-f board/esp32s2-kaluga-1.cfg``
.. |idf-py-def-cfg| replace:: ``-f board/esp32c3-builtin.cfg``
---
@ -74,26 +77,28 @@
::
openocd -f board/esp32s2-kaluga-1.cfg -c "init; halt; esp appimage_offset 0x210000"
openocd -f board/esp32c3-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
---
.. openocd-cfg-files
.. list-table:: ESP32-S2 相关的 OpenOCD 配置文件
.. list-table:: ESP32-C3 相关的 OpenOCD 配置文件
:widths: 25 75
:header-rows: 1
* -
* -
- 描述
* - ``board/esp32s2-kaluga-1.cfg``
- ESP32-S2-Kaluga-1 开发板配置文件,内部已包含 ESP32-S2 目标配置和 JTAG 适配器配置
* - ``target/esp32s2.cfg``
- ESP32-S2 目标配置文件,可以和某个 ``interface/`` 下的配置文件一同使用
* - ``interface/ftdi/esp32s2_kaluga_v1.cfg``
- 适用于 ESP32-S2-Kaluga-1 开发板的 JTAG 适配器配置文件
* - ``board/esp32c3-builtin.cfg``
- 通过内置 USB 连接的 ESP32-C3 系列开发板配置文件,包含 ESP32-C3 目标配置和 JTAG 适配器配置。
* - ``board/esp32c3-ftdi.cfg``
- 通过与 ESP-Prog 兼容的 FTDI ESP32-C3 调试的配置文件,包括 ESP32-C3 目标配置和 JTAG 适配器配置。
* - ``target/esp32c3.cfg``
- ESP32-C3 目标配置文件。可以和某个 ``interface/`` 下的配置文件一同使用。
* - ``interface/esp_usb_jtag.cfg``
- 适用于 ESP32-C3 JTAG 适配器配置文件。
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- 适用于 ESP-Prog 板子的 JTAG 适配器配置文件
- 适用于 ESP-Prog JTAG 适配器配置文件
---
@ -105,28 +110,31 @@
.. jtag-pins
.. list-table:: ESP32-S2 脚和 JTAG 接口信号
.. list-table:: ESP32-C3 脚和 JTAG 接口信号
:widths: 25 75
:header-rows: 1
* - ESP32-S2
* - ESP32-C3
- JTAG 信号
* - MTDO / GPIO40
* - MTDO / GPIO7
- TDO
* - MTDI / GPIO41
* - MTDI / GPIO5
- TDI
* - MTCK / GPIO39
* - MTCK / GPIO6
- TCK
* - MTMS / GPIO42
* - MTMS / GPIO4
- TMS
.. |jtag-sel-gpio| replace:: GPIO10
.. |jtag-gpio-list| replace:: GPIO4-GPIO7
---
.. run-openocd-d3
::
openocd -l openocd_log.txt -d3 -f board/esp32s2-kaluga-1.cfg
openocd -l openocd_log.txt -d3 -f board/esp32c3-builtin.cfg
---
@ -134,7 +142,7 @@
::
openocd -d3 -f board/esp32s2-kaluga-1.cfg 2>&1 | tee openocd.log
openocd -d3 -f board/esp32c3-builtin.cfg 2>&1 | tee openocd.log
---
@ -142,19 +150,19 @@
::
xtensa-esp32s2-elf-gdb -ex "set remotelogfile gdb_log.txt" <all other options>
riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" <all other options>
---
.. devkit-defs
.. |devkit-name| replace:: ESP-S2-Kaluga-1
.. |devkit-name-with-link| replace:: :doc:`ESP-S2-Kaluga-1 <../../hw-reference/index>`
.. |devkit-name| replace:: ESP32-C3
.. |devkit-name-with-link| replace:: :doc:`ESP32-C3 <../../hw-reference/index>`
---
.. devkit-hw-config
* 开箱即用ESP32-S2-Kaluga-1 不需要任何其他硬件配置即可进行 JTAG 调试。 但是,如果遇到问题,请检查 “JTAG” DIP 开关的 25 号是否在 “ON” 的位置。
* 开箱即用ESP32-C3 不需要任何其他硬件配置即可进行 JTAG 调试。
---

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@ -87,13 +87,13 @@
* - 名字
- 描述
* - ``board/esp32s2-kaluga-1.cfg``
- ESP32-S2-Kaluga-1 开发板配置文件,内部已包含 ESP32-S2 目标配置和 JTAG 适配器配置
- ESP32-S2-Kaluga-1 开发板配置文件,包含 ESP32-S2 目标配置和 JTAG 适配器配置
* - ``target/esp32s2.cfg``
- ESP32-S2 目标配置文件,可以和某个 ``interface/`` 下的配置文件一同使用
* - ``interface/ftdi/esp32s2_kaluga_v1.cfg``
- 适用于 ESP32-S2-Kaluga-1 开发板的 JTAG 适配器配置文件
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- 适用于 ESP-Prog JTAG 适配器配置文件
- 适用于 ESP-Prog JTAG 适配器配置文件
---
@ -105,11 +105,11 @@
.. jtag-pins
.. list-table:: ESP32-S2 脚和 JTAG 接口信号
.. list-table:: ESP32-S2 脚和 JTAG 接口信号
:widths: 25 75
:header-rows: 1
* - ESP32-S2
* - ESP32-S2
- JTAG 信号
* - MTDO / GPIO40
- TDO
@ -155,6 +155,6 @@
.. devkit-hw-config
* 开箱即用ESP32-S2-Kaluga-1 不需要任何其他硬件配置即可进行 JTAG 调试。 但是,如果遇到问题,请检查 “JTAG” DIP 开关的 25 号是否在 “ON” 位置。
* 开箱即用ESP32-S2-Kaluga-1 不需要任何其他硬件配置即可进行 JTAG 调试。 但是,如果遇到问题,请检查标有 TCK、TDO、TDI、TMS “JTAG” DIP 开关(原理图中的 SW5是否在 “ON” 位置。
---

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@ -87,22 +87,22 @@
.. openocd-cfg-files
.. list-table:: OpenOCD configuration files for ESP32-S3
.. list-table:: ESP32-S3 相关的 OpenOCD 配置文件
:widths: 25 75
:header-rows: 1
* - Name
- Description
* - 名称
- 描述
* - ``board/esp32s3-builtin.cfg``
- Board configuration file for ESP32-S3 for debugging via builtin USB JTAG, includes target and adapter configuration.
- ESP32-S3 系列开发板的配置文件,用于通过内置的 USB JTAG 进行调试,包括 ESP32-S3 目标配置和适配器配置。
* - ``board/esp32s3-ftdi.cfg``
- Board configuration file for ESP32-S3 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
- ESP32-S3 系列开发板的配置文件,用于通过外部连接的基于 FTDI 的探头,如 ESP-Prog包括 ESP32-S3 目标配置和适配器配置。
* - ``target/esp32s3.cfg``
- ESP32-S3 target configuration file. Can be used together with one of the ``interface/`` configuration files.
- ESP32-S3 目标配置文件,可以和某个 ``interface/`` 下的配置文件一同使用
* - ``interface/ftdi/esp_usb_jtag.cfg``
- JTAG adapter configuration file for ESP32-S3 builtin USB JTAG.
- 适用于 ESP32-S3 JTAG 适配器配置文件。
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- JTAG adapter configuration file for ESP-Prog debug adapter board.
- 适用于 ESP-Prog JTAG 适配器配置文件。
---
@ -114,21 +114,24 @@
.. jtag-pins
.. list-table:: ESP32-S3 pins and JTAG signals
.. list-table:: ESP32-S3 管脚和 JTAG 接口信号
:widths: 25 75
:header-rows: 1
* - ESP32-S3 Pin
- JTAG Signal
* - MTDO
* - ESP32-S3 管脚
- JTAG 信号
* - MTDO / GPIO40
- TDO
* - MTDI
* - MTDI / GPIO41
- TDI
* - MTCK
* - MTCK / GPIO39
- TCK
* - MTMS
* - MTMS / GPIO42
- TMS
.. |jtag-sel-gpio| replace:: GPIO3
.. |jtag-gpio-list| replace:: GPIO39-GPIO42
---
.. run-openocd-d3
@ -158,12 +161,12 @@
.. devkit-defs
.. |devkit-name| replace:: ESP32-S3
.. |devkit-name-with-link| replace:: :doc:`ESP32-S3 <../../hw-reference/index>`
.. |devkit-name-with-link| replace:: :doc:`ESP32-S3 <../../hw-reference/index>`
---
.. devkit-hw-config
* Out of the box, ESP32-S3 doesn't need any additional hardware configuration for JTAG debugging. However if you are experiencing issues, check that switches 2-5 of the "JTAG" DIP switch block are in "ON" position.
* 开箱即用ESP32-S3 不需要任何其他硬件配置即可进行 JTAG 调试。 但是,如果遇到问题,请检查 “JTAG” DIP 开关的 2-5 号是否在 “ON” 位置。
---

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@ -37,10 +37,10 @@ JTAG 调试
.. only:: esp32
ESP32 具有两个强大的 Xtensa 内核支持多种程序架构。ESP-IDF 自带的 FreeRTOS 操作系统支持多核抢占式调度,允许用户以更加直观的方式编写软件。
与此相对地,由于缺乏合适的工具,简便的编程方式也会给程序的调试带来困难,比如找出由两个线程引起的错误,并且这两个线程在单独的 CPU 核上同时运行,那么仅凭 ``printf`` 语句会花费很长时间来定位该错误。调试此类问题更好(往往也更快)的方法是使用调试器,将其连接到处理器的调试端口。
乐鑫已完成 OpenOCD 移植,以支持 {IDF_TARGET_NAME} 处理器和多核 FreeRTOS 架构(此作为大多数 {IDF_TARGET_NAME} 应用程序的基础)。此外,乐鑫还提供了一些 OpenOCD 本身并不支持的工具,以进一步丰富调试功能。
乐鑫已完成 OpenOCD 移植,以支持 {IDF_TARGET_NAME} 处理器和多核 FreeRTOS 架构(大多数 {IDF_TARGET_NAME} 应用程序的基础)。此外,乐鑫还提供了一些 OpenOCD 本身并不支持的工具,以进一步丰富调试功能。
本文将介绍如何在 Linux、Windows 和 macOS 环境下为 {IDF_TARGET_NAME} 安装 OpenOCD并使用 GDB 进行软件调试。除部分安装流程有所不同外,所有操作系统的软件用户界面和使用流程都是相同的。
@ -64,23 +64,21 @@ JTAG 调试
“Application Loading and Monitoring” 标志显示一组关键的软件和硬件组件,可用于编译、构建和烧写应用程序到 {IDF_TARGET_NAME} 上,以及监视来自 {IDF_TARGET_NAME} 的运行诊断信息。
`Eclipse <https://www.eclipse.org/>`__ 环境集成了 JTAG 调试和应用程序加载、监视的功能使得软件从编写、编译、加载到调试的迭代过程变得更加快速简单。Eclipse IDE 及其集成的调试软件均适用于 Windows、Linux 和 macOS 平台。
`Eclipse <https://www.eclipse.org/>`__ 环境集成了 JTAG 调试和应用程序加载、监视的功能使得软件从编写、编译、加载到调试的迭代过程变得更加快速简单。Eclipse IDE 及其集成的调试软件均适用于 Windows、Linux 和 macOS 平台。根据用户喜好,除了使用 Eclipse 集成开发环境,还可以直接在命令行终端运行 `debugger``idf.py build`
.. only:: not SOC_USB_SERIAL_JTAG_SUPPORTED
若使用 |devkit-name-with-link|,由于其板载 FT232H 芯片,仅需一根 USB 线即可连接 PC 与 {IDF_TARGET_NAME}。FT232H 提供了两路 USB 通道,一路连接到 JTAG另一路连接到 UART。
.. only:: SOC_USB_SERIAL_JTAG_SUPPORTED
仅需一根 USB 线即可高效连接 PC 与 {IDF_TARGET_NAME},因为 {IDF_TARGET_NAME} 芯片本身提供了两路 USB 通道,一路连接到 JTAG另一路连接到 USB 终端。应将 USB 线连接到 {IDF_TARGET_NAME} 的 D+/D- USB 管脚,而非通过 USB-UART 芯片连接到串行 RxD/TxD。后文中 :ref:`jtag-debugging-configuring-target` 小节将对此进行解释。
.. only:: esp32c3
.. only:: esp32c3
.. note::
{IDF_TARGET_NAME} 中的 USB 接口只能用于调试版本 3 或更新版本的芯片,对于版本 1 或 2 的芯片,请使用其他调试板(例如 ESP-Prog。确定芯片版本最简单的方法是通过 `idf.py flash` 完成芯片烧写,并在底部寻找 `芯片为 ESP32-C3 (版本 3)` 信息。
根据用户喜好,除了使用 Eclipse 集成开发环境,还可以直接在命令行终端运行 `debugger``idf.py build`
{IDF_TARGET_NAME} 中的 USB 接口只能用于调试版本 3 或更新版本的芯片,对于版本 1 或 2 的芯片,请使用其他调试板(例如 ESP-Prog。确定芯片版本最简单的方法是通过 `idf.py flash` 完成芯片烧写,并在底部寻找类似 `芯片为 ESP32-C3 (版本 3)` 信息。
.. _jtag-debugging-selecting-jtag-adapter:
@ -91,15 +89,15 @@ JTAG 调试
上手 JTAG 最快速便捷的方式是使用 |devkit-name-with-link|,因为它板载了 JTAG 调试接口,无需使用外部 JTAG 硬件适配器和额外线缆来连接 JTAG 与 {IDF_TARGET_NAME}。|devkit-name| 采用 FT2232H 提供的 JTAG 接口,可以稳定运行在 20 MHz 的时钟频率,外接的适配器很难达到这个速度。
.. only:: not SOC_USB_SERIAL_JTAG_SUPPORTED
.. only:: SOC_USB_SERIAL_JTAG_SUPPORTED
上手 JTAG 最快速便捷的方式是将一根 USB 线连接到 {IDF_TARGET_NAME} 的 D+/D- USB 管脚,无需使用外部 JTAG 适配器和额外线缆。
如果您想使用单独的 JTAG 适配器,请确保其与 {IDF_TARGET_NAME} 的电平电压和 OpenOCD 软件都兼容。{IDF_TARGET_NAME} 使用的是业界标准的 JTAG 接口它未使用实际上也并不需要TRST 信号脚。JTAG 使用的 IO 管脚由 VDD_3P3_RTC 电源管脚供电(通常连接到外部 3.3 V 的电源轨),因此 JTAG 硬件适配器的管脚需要能够在该电压范围内正常工作。
在软件方面OpenOCD 支持相当多数量的 JTAG 适配器,请参阅 `OpenOCD 支持的适配器列表 <http://openocd.org/doc/html/Debug-Adapter-Hardware.html>`_ (请注意这一列表并不完整),其中还列出了兼容 SWD 接口的适配器,但请注意,{IDF_TARGET_NAME} 目前并不支持 SWD。此外硬编码为只支持特定产品线的 JTAG 适配器也无法在 {IDF_TARGET_NAME} 上工作,例如仅针对 STM32 系列产品的 ST-LINK 适配器。
在软件方面OpenOCD 支持相当多数量的 JTAG 适配器,请参阅 `OpenOCD 支持的适配器列表 <http://openocd.org/doc/html/Debug-Adapter-Hardware.html>`_ (请注意这一列表并不完整),其中还列出了兼容 SWD 接口的适配器,但请注意,{IDF_TARGET_NAME} 目前并不支持 SWD。此外硬编码为只支持特定产品线的 JTAG 适配器也无法在 {IDF_TARGET_NAME} 上工作,例如仅针对 STM32 系列产品的 ST-LINK 适配器。
JTAG 正常工作至少需要连接的信号线有TDI、TDO、TCK、TMS 和 GND。一些 JTAG 适配器还需要 {IDF_TARGET_NAME} 提供一路电源到适配器的某个管脚上(比如 Vtar用于设置适配器的工作电压。您也可以选择将 SRST 信号线连接到 {IDF_TARGET_NAME} 的 CH_PD 管脚上,但请注意,目前 OpenOCD 对该信号线提供的支持相当有限。
保证 JTAG 正常工作需要连接的信号线包括TDI、TDO、TCK、TMS 和 GND。一些 JTAG 适配器还需要 {IDF_TARGET_NAME} 提供一路电源到适配器的某个管脚上(比如 Vtar用于设置适配器的工作电压。您也可以选择将 SRST 信号线连接到 {IDF_TARGET_NAME} 的 CH_PD 管脚上,但请注意,目前 OpenOCD 对该信号线提供的支持相当有限。
`ESP-Prog <https://docs.espressif.com/projects/espressif-esp-iot-solution/en/latest/hw-reference/ESP-Prog_guide.html>`_ 中展示了使用外部电路板进行调试的实例,方法是将其连接到 {IDF_TARGET_NAME} 的 JTAG 管脚上。
@ -138,10 +136,11 @@ JTAG 正常工作至少需要连接的信号线有TDI、TDO、TCK、TMS 和 G
OpenOCD 安装完成后就可以配置 {IDF_TARGET_NAME} 目标(即带 JTAG 接口的 {IDF_TARGET_NAME} 板),具体分为以下三个步骤:
- 配置并连接 JTAG 接口
- 运行 OpenOCD
- 上传待调试的应用程序
* :ref:`jtag-debugging-configure-and-connect-JTAG-interface`
* :ref:`jtag-debugging-run-openocd`
* :ref:`jtag-upload-app-debug`
.. _jtag-debugging-configure-and-connect-JTAG-interface:
配置并连接 JTAG 接口
~~~~~~~~~~~~~~~~~~~~
@ -199,7 +198,7 @@ OpenOCD 安装完成后就可以配置 {IDF_TARGET_NAME} 目标(即带 JTAG
按照正常步骤构建并上传 {IDF_TARGET_NAME} 应用程序,具体请参阅 :ref:`get-started-build` 章节。
除此以外,您还可以使用 OpenOCD 通过 JTAG 接口将应用程序镜像烧写到闪存中,命令如下:
除此以外,您还可以使用 OpenOCD 通过 JTAG 接口将应用程序镜像烧写到 flash 中,命令如下:
.. include:: {IDF_TARGET_PATH_NAME}.inc
:start-after: run-openocd-upload
@ -210,8 +209,8 @@ OpenOCD 安装完成后就可以配置 {IDF_TARGET_NAME} 目标(即带 JTAG
``program_esp <image_file> <offset> [verify] [reset] [exit]``
- ``image_file`` - 程序镜像文件存放的路径
- ``offset`` - 镜像烧写到闪存中的偏移地址
- ``verify`` - 烧写完成后校验闪存中的内容(可选)
- ``offset`` - 镜像烧写到 flash 中的偏移地址
- ``verify`` - 烧写完成后校验 flash 中的内容(可选)
- ``reset`` - 烧写完成后重启目标(可选)
- ``exit`` - 烧写完成后退出 OpenOCD可选
@ -313,7 +312,7 @@ Windows 用户的示例如下:
.. toctree::
:hidden:
:maxdepth: 1
using-debugger
@ -325,4 +324,4 @@ Windows 用户的示例如下:
- :doc:`debugging-examples`
- :doc:`tips-and-quirks`
- :doc:`../app_trace`
- `ESP-Prog 调试板介绍 <https://docs.espressif.com/projects/espressif-esp-iot-solution/zh_CN/latest/hw-reference/ESP-Prog_guide.html>`__
- `ESP-Prog 调试板介绍 <https://docs.espressif.com/projects/espressif-esp-iot-solution/zh_CN/latest/hw-reference/ESP-Prog_guide.html>`__

View File

@ -6,13 +6,11 @@ Wi-Fi 库
概述
-----
Wi-Fi 库支持配置及监控 {IDF_TARGET_NAME} Wi-Fi 连网功能。
Wi-Fi 库支持配置及监控 {IDF_TARGET_NAME} Wi-Fi 连网功能。支持配置:
支持配置:
- 基站模式(即 STA 模式或 Wi-Fi 客户端模式),此时 {IDF_TARGET_NAME} 连接到接入点 (AP)。
- station 模式(即 STA 模式或 Wi-Fi 客户端模式),此时 {IDF_TARGET_NAME} 连接到接入点 (AP)。
- AP 模式(即 Soft-AP 模式或接入点模式),此时基站连接到 {IDF_TARGET_NAME}。
- AP-STA 共存模式({IDF_TARGET_NAME} 既是接入点,同时又作为基站连接到另外一个接入点)。
- station/AP 共存模式({IDF_TARGET_NAME} 既是接入点,同时又作为基站连接到另外一个接入点)。
- 上述模式的各种安全模式WPA、WPA2 及 WEP 等)。
- 扫描接入点(包括主动扫描及被动扫描)。
@ -26,7 +24,7 @@ ESP-IDF 示例项目的 :example:`wifi` 目录下包含以下应用程序:
* Wi-Fi 示例代码;
* 另外一个简单的应用程序 `esp-idf-template <https://github.com/espressif/esp-idf-template>`_演示了如何将 {IDF_TARGET_NAME} 模组连接到 AP
* 一个简单的应用程序 `esp-idf-template <https://github.com/espressif/esp-idf-template>`_展示了最基础的 IDF 项目结构
API 参考