mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
ble: support esp32h2 modem clock selection
This commit is contained in:
cjin
parent
f5ccae4d93
commit
3d2342df6c
@ -395,6 +395,26 @@ choice BT_LE_WAKEUP_SOURCE
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Use BLE rtc timer to wakeup CPU
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endchoice
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choice BT_LE_LP_CLK_SRC
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prompt "BLE low power clock source"
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default BT_LE_LP_CLK_SRC_MAIN_XTAL
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config BT_LE_LP_CLK_SRC_MAIN_XTAL
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bool "Use main XTAL as RTC clock source"
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help
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User main XTAL as RTC clock source.
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This option is recommended if external 32.768k XTAL is not available.
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Using the external 32.768 kHz XTAL will have lower current consumption
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in light sleep compared to using the main XTAL.
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config BT_LE_LP_CLK_SRC_DEFAULT
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bool "Use system RTC slow clock source"
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help
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Use the same slow clock source as system RTC
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Using any clock source other than external 32.768 kHz XTAL supports only
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legacy ADV and SCAN due to low clock accuracy.
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endchoice
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config BT_LE_USE_ESP_TIMER
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bool "Enable Esp Timer for Callout"
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depends on !BT_NIMBLE_ENABLED
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@ -40,6 +40,10 @@
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#include "hci_uart.h"
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#include "bt_osi_mem.h"
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#if SOC_PM_RETENTION_HAS_CLOCK_BUG
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#include "esp_private/sleep_retention.h"
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#endif
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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#include "hci/hci_hal.h"
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#endif // CONFIG_BT_BLUEDROID_ENABLED
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@ -49,7 +53,6 @@
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#include "esp_private/periph_ctrl.h"
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#include "esp_sleep.h"
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/* Macro definition
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************************************************************************
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*/
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@ -122,9 +125,12 @@ extern void npl_freertos_mempool_deinit(void);
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extern int os_msys_buf_alloc(void);
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extern uint32_t r_os_cputime_get32(void);
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extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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extern const sleep_retention_entries_config_t *esp_ble_mac_retention_link_get(uint8_t *size, uint8_t extra);
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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extern void ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg,
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void *w_arg, uint32_t us_to_enabled);
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extern void ble_rtc_wake_up_state_clr(void);
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extern void r_ble_rtc_wake_up_state_clr(void);
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extern int os_msys_init(void);
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extern void os_msys_buf_free(void);
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extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
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@ -184,11 +190,13 @@ static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
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#endif // CONFIG_PM_ENABLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#define BLE_RTC_DELAY_US (1100)
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#define BLE_RTC_DELAY_US_LIGHT_SLEEP (5100)
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#define BLE_RTC_DELAY_US_MODEM_SLEEP (1500)
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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#define BLE_RTC_DELAY_US (0)
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#define BLE_RTC_DELAY_US_LIGHT_SLEEP (2000)
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#define BLE_RTC_DELAY_US_MODEM_SLEEP (0)
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static void ble_sleep_timer_callback(void *arg);
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static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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@ -427,8 +435,7 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
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if (!s_ble_active) {
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return;
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}
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#ifdef CONFIG_PM_ENABLE
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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uint32_t delta_tick;
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uint32_t us_to_sleep;
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@ -458,11 +465,14 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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r_ble_rtc_wake_up_state_clr();
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#if SOC_PM_RETENTION_HAS_CLOCK_BUG
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sleep_retention_do_extra_retention(true);
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#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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esp_phy_disable();
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#ifdef CONFIG_PM_ENABLE
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esp_pm_lock_release(s_pm_lock);
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#endif // CONFIG_PM_ENABLE
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esp_phy_disable();
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s_ble_active = false;
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}
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@ -471,24 +481,44 @@ IRAM_ATTR void controller_wakeup_cb(void *arg)
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if (s_ble_active) {
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return;
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}
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esp_phy_enable();
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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esp_pm_lock_acquire(s_pm_lock);
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r_ble_rtc_wake_up_state_clr();
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG
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sleep_retention_do_extra_retention(false);
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG */
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#endif //CONFIG_PM_ENABLE
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esp_phy_enable();
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s_ble_active = true;
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}
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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static void ble_sleep_timer_callback(void * arg)
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{
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esp_pm_lock_acquire(s_pm_lock);
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}
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
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{
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uint8_t size;
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const sleep_retention_entries_config_t *ble_mac_modem_config = esp_ble_mac_retention_link_get(&size, extra);
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esp_err_t err = sleep_retention_entries_create(ble_mac_modem_config, size, REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_MAC);
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if (err == ESP_OK) {
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Modem BLE MAC retention initialization");
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}
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return err;
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}
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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#endif // CONFIG_PM_ENABLE
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static void sleep_modem_ble_mac_modem_state_deinit(void)
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{
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sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_MAC);
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}
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#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
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esp_err_t controller_sleep_init(void)
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{
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@ -496,12 +526,13 @@ esp_err_t controller_sleep_init(void)
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#ifdef CONFIG_BT_LE_SLEEP_ENABLE
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
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500 + BLE_RTC_DELAY_US);
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#ifdef CONFIG_PM_ENABLE
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esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
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#endif // CONFIG_PM_ENABLE
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BLE_RTC_DELAY_US_LIGHT_SLEEP);
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#else
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ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0,
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BLE_RTC_DELAY_US_MODEM_SLEEP);
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#endif /* FREERTOS_USE_TICKLESS_IDLE */
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#endif // CONFIG_BT_LE_SLEEP_ENABLE
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#ifdef CONFIG_PM_ENABLE
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@ -510,7 +541,7 @@ esp_err_t controller_sleep_init(void)
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goto error;
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}
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esp_pm_lock_acquire(s_pm_lock);
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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esp_timer_create_args_t create_args = {
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.callback = ble_sleep_timer_callback,
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@ -524,20 +555,23 @@ esp_err_t controller_sleep_init(void)
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
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#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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/* Create a new regdma link for BLE related register restoration */
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rc = sleep_modem_ble_mac_modem_state_init(1);
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assert(rc == 0);
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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esp_sleep_enable_bt_wakeup();
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ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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return rc;
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error:
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/*lock should release first and then delete*/
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if (s_pm_lock != NULL) {
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esp_pm_lock_release(s_pm_lock);
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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}
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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esp_sleep_disable_bt_wakeup();
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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if (s_ble_sleep_timer != NULL) {
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esp_timer_stop(s_ble_sleep_timer);
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@ -545,34 +579,26 @@ error:
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s_ble_sleep_timer = NULL;
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}
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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esp_sleep_disable_bt_wakeup();
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#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#endif //CONFIG_PM_ENABLE
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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/*lock should release first and then delete*/
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if (s_pm_lock != NULL) {
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esp_pm_lock_release(s_pm_lock);
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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}
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#endif // CONFIG_PM_ENABLE
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return rc;
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}
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void controller_sleep_deinit(void)
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{
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#ifdef CONFIG_PM_ENABLE
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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r_ble_rtc_wake_up_state_clr();
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esp_sleep_disable_bt_wakeup();
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#endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
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/* lock should be released first */
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if (s_ble_active) {
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esp_pm_lock_release(s_pm_lock);
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}
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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sleep_modem_ble_mac_modem_state_deinit();
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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if (s_ble_sleep_timer != NULL) {
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esp_timer_stop(s_ble_sleep_timer);
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@ -580,6 +606,12 @@ void controller_sleep_deinit(void)
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s_ble_sleep_timer = NULL;
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}
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#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */
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#ifdef CONFIG_PM_ENABLE
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/* lock should be released first */
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esp_pm_lock_release(s_pm_lock);
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esp_pm_lock_delete(s_pm_lock);
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s_pm_lock = NULL;
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#endif //CONFIG_PM_ENABLE
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}
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@ -647,7 +679,27 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
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/* Enable BT-related clocks */
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modem_clock_module_enable(PERIPH_BT_MODULE);
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, 249);
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#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source");
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL, (320 - 1));
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#else
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#if CONFIG_RTC_CLK_SRC_INT_RC
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC_SLOW, (5 - 1));
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#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using external 32.768 kHz XTAL as clock source");
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_XTAL32K, (1 - 1));
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#elif CONFIG_RTC_CLK_SRC_INT_RC32K
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_RC32K, (1 - 1));
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#elif CONFIG_RTC_CLK_SRC_EXT_OSC
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ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 32 kHz oscillator as clock source, can only run legacy ADV or SCAN due to low clock accuracy!");
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modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, MODEM_CLOCK_LPCLK_SRC_EXT32K, (1 - 1));
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#else
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ESP_LOGE(NIMBLE_PORT_LOG_TAG, "Unsupported clock source");
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assert(0);
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#endif
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#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
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esp_phy_enable();
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esp_btbb_enable();
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s_ble_active = true;
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@ -196,7 +196,17 @@ extern "C" {
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#define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000)
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#if CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL
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#define RTC_FREQ_N (100000) /* in Hz */
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#else
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#if CONFIG_RTC_CLK_SRC_INT_RC
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#define RTC_FREQ_N (30000) /* in Hz */
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#elif CONFIG_RTC_CLK_SRC_EXT_CRYS
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#define RTC_FREQ_N (32768) /* in Hz */
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#else
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#define RTC_FREQ_N (32000) /* in Hz */
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#endif
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#endif /* CONFIG_BT_LE_LP_CLK_SRC_MAIN_XTAL */
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#define BLE_LL_TX_PWR_DBM_N (9)
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@ -29,6 +29,7 @@ extern "C" {
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#define REGDMA_PHY_LINK(_pri) ((0x00 << 8) | _pri)
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#define REGDMA_PCR_LINK(_pri) ((0x01 << 8) | _pri)
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#define REGDMA_MODEMSYSCON_LINK(_pri) ((0x02 << 8) | _pri)
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#define REGDMA_MODEMLPCON_LINK(_pri) ((0x03 << 8) | _pri)
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#define REGDMA_INTMTX_LINK(_pri) ((0x0d << 8) | _pri)
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#define REGDMA_HPSYS_LINK(_pri) ((0x0e << 8) | _pri)
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@ -23,6 +23,10 @@
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#include "soc/pcr_reg.h"
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#include "modem/modem_syscon_reg.h"
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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#include "modem/modem_lpcon_reg.h"
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#endif
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static __attribute__((unused)) const char *TAG = "sleep_clock";
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esp_err_t sleep_clock_system_retention_init(void)
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@ -50,9 +54,15 @@ void sleep_clock_system_retention_deinit(void)
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esp_err_t sleep_clock_modem_retention_init(void)
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{
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
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#endif
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
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#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
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[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) } /* MODEM LPCON */
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#endif
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};
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esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_2, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
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24
components/esp_phy/esp32h2/include/btbb_retention_reg.h
Normal file
24
components/esp_phy/esp32h2/include/btbb_retention_reg.h
Normal file
@ -0,0 +1,24 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
|
||||
|
||||
// btbb sleep retention reg
|
||||
|
||||
#define BB_PART_0_SIZE 93
|
||||
#define BB_PART_1_SIZE 62
|
||||
#define BB_PART_2_SIZE 19
|
||||
#define BB_PART_0_ADDR 0x600A2000
|
||||
#define BB_PART_1_ADDR 0x600A2800
|
||||
#define BB_PART_2_ADDR 0x600A2C00
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -17,7 +17,7 @@ static _lock_t s_btbb_access_lock;
|
||||
static uint8_t s_btbb_access_ref = 0;
|
||||
|
||||
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
#include "esp_private/sleep_retention.h"
|
||||
#include "btbb_retention_reg.h"
|
||||
static const char* TAG = "btbb_init";
|
||||
@ -33,7 +33,7 @@ static esp_err_t btbb_sleep_retention_init(void)
|
||||
const static sleep_retention_entries_config_t btbb_regs_retention[] = {
|
||||
[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
|
||||
[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
|
||||
[2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER }
|
||||
[2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
|
||||
};
|
||||
esp_err_t err = sleep_retention_entries_create(btbb_regs_retention, ARRAY_SIZE(btbb_regs_retention), REGDMA_LINK_PRI_5, SLEEP_RETENTION_MODULE_BLE_BB);
|
||||
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for btbb retention");
|
||||
@ -45,7 +45,7 @@ static void btbb_sleep_retention_deinit(void)
|
||||
{
|
||||
sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_BLE_BB);
|
||||
}
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
|
||||
|
||||
void esp_btbb_enable(void)
|
||||
@ -53,9 +53,9 @@ void esp_btbb_enable(void)
|
||||
_lock_acquire(&s_btbb_access_lock);
|
||||
if (s_btbb_access_ref == 0) {
|
||||
bt_bb_v2_init_cmplx(BTBB_ENABLE_VERSION_PRINT);
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
btbb_sleep_retention_init();
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
}
|
||||
s_btbb_access_ref++;
|
||||
_lock_release(&s_btbb_access_lock);
|
||||
@ -65,9 +65,9 @@ void esp_btbb_disable(void)
|
||||
{
|
||||
_lock_acquire(&s_btbb_access_lock);
|
||||
if (s_btbb_access_ref && (--s_btbb_access_ref == 0)) {
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
btbb_sleep_retention_deinit();
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE && !CONFIG_IDF_TARGET_ESP32H2
|
||||
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
}
|
||||
_lock_release(&s_btbb_access_lock);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user