From 3cbf202267b89750594702cef4952702dfe5811d Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 2 Aug 2021 17:16:16 +0800 Subject: [PATCH] mspi: cancel oct flash 40m dtr, oct flash 80m str, oct psram 40m tuning --- components/spi_flash/esp32s3/spi_timing_config.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/components/spi_flash/esp32s3/spi_timing_config.h b/components/spi_flash/esp32s3/spi_timing_config.h index 0c94b2e718..9487d31b1d 100644 --- a/components/spi_flash/esp32s3/spi_timing_config.h +++ b/components/spi_flash/esp32s3/spi_timing_config.h @@ -30,12 +30,6 @@ extern "C" { //OCTAL FLASH #if CONFIG_ESPTOOLPY_OCT_FLASH -// OCT FLASH 40M DTR -#if SPI_TIMING_FLASH_DTR_MODE && CONFIG_ESPTOOLPY_FLASHFREQ_40M -_Static_assert(!CONFIG_ESPTOOLPY_FLASHFREQ_40M, "Octal FLASH 40MHz DDR is not supported. TODO: IDF-1630"); -#define SPI_TIMING_FLASH_EXPECTED_CORE_CLK_MHZ 160 -#endif - //OCT FLASH 80M DTR #if SPI_TIMING_FLASH_DTR_MODE && CONFIG_ESPTOOLPY_FLASHFREQ_80M #define SPI_TIMING_FLASH_EXPECTED_CORE_CLK_MHZ 160 @@ -46,11 +40,6 @@ _Static_assert(!CONFIG_ESPTOOLPY_FLASHFREQ_40M, "Octal FLASH 40MHz DDR is not su #define SPI_TIMING_FLASH_EXPECTED_CORE_CLK_MHZ 240 #endif -//OCT FLASH 80M STR -#if SPI_TIMING_FLASH_STR_MODE && CONFIG_ESPTOOLPY_FLASHFREQ_80M -#define SPI_TIMING_FLASH_EXPECTED_CORE_CLK_MHZ 160 -#endif - //OCT FLASH 120M STR #if SPI_TIMING_FLASH_STR_MODE && CONFIG_ESPTOOLPY_FLASHFREQ_120M #define SPI_TIMING_FLASH_EXPECTED_CORE_CLK_MHZ 120 @@ -67,11 +56,6 @@ _Static_assert(!CONFIG_ESPTOOLPY_FLASHFREQ_40M, "Octal FLASH 40MHz DDR is not su //OCTAL PSRAM #if CONFIG_SPIRAM_MODE_OCT -//OCT 40M PSRAM -#if SPI_TIMING_PSRAM_DTR_MODE && CONFIG_SPIRAM_SPEED_40M -#define SPI_TIMING_PSRAM_EXPECTED_CORE_CLK_MHZ 80 -#endif - //OCT 80M PSRAM #if SPI_TIMING_PSRAM_DTR_MODE && CONFIG_SPIRAM_SPEED_80M #define SPI_TIMING_PSRAM_EXPECTED_CORE_CLK_MHZ 160