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fix(i2s): add rcc trick for some ll functions

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This commit is contained in:
laokaiyao 2023-12-22 19:39:31 +08:00
parent 6b3a35eea4
commit 3c9505ac64
8 changed files with 99 additions and 31 deletions
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2
components/esp_driver_i2s/i2s_common.c
View File

@ -881,11 +881,13 @@ esp_err_t i2s_del_channel(i2s_chan_handle_t handle)
/* Must switch back to D2CLK on ESP32-S2,
* because the clock of some registers are bound to APLL,
* otherwise, once APLL is disabled, the registers can't be updated anymore */
I2S_CLOCK_SRC_ATOMIC() {
if (handle->dir == I2S_DIR_TX) {
i2s_ll_tx_clk_set_src(handle->controller->hal.dev, I2S_CLK_SRC_DEFAULT);
} else {
i2s_ll_rx_clk_set_src(handle->controller->hal.dev, I2S_CLK_SRC_DEFAULT);
}
}
periph_rtc_apll_release();
}
#endif

6
components/esp_driver_i2s/i2s_pdm.c
View File

@ -151,8 +151,7 @@ static esp_err_t i2s_pdm_tx_set_gpio(i2s_chan_handle_t handle, const i2s_pdm_tx_
i2s_gpio_check_and_set(gpio_cfg->clk, i2s_periph_signal[id].m_tx_ws_sig, false, gpio_cfg->invert_flags.clk_inv);
}
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
}
#endif
@ -441,8 +440,7 @@ static esp_err_t i2s_pdm_rx_set_gpio(i2s_chan_handle_t handle, const i2s_pdm_rx_
}
}
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
}
#endif

2
components/esp_driver_i2s/i2s_private.h
View File

@ -47,10 +47,8 @@ extern "C" {
#if !SOC_RCC_IS_INDEPENDENT
#define I2S_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#define I2S_RCC_ATOMIC_ENV (void)__DECLARE_RCC_ATOMIC_ENV
#else
#define I2S_RCC_ATOMIC()
#define I2S_RCC_ATOMIC_ENV
#endif
#define I2S_NULL_POINTER_CHECK(tag, p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, tag, "input parameter '"#p"' is NULL")

6
components/esp_driver_i2s/i2s_std.c
View File

@ -164,8 +164,7 @@ static esp_err_t i2s_std_set_gpio(i2s_chan_handle_t handle, const i2s_std_gpio_c
/* For "tx + slave" mode, select TX signal index for ws and bck */
if (handle->dir == I2S_DIR_TX && !handle->controller->full_duplex) {
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
}
#endif
@ -180,8 +179,7 @@ static esp_err_t i2s_std_set_gpio(i2s_chan_handle_t handle, const i2s_std_gpio_c
/* For "rx + master" mode, select RX signal index for ws and bck */
if (handle->dir == I2S_DIR_RX && !handle->controller->full_duplex) {
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
}
#endif

6
components/esp_driver_i2s/i2s_tdm.c
View File

@ -169,8 +169,7 @@ static esp_err_t i2s_tdm_set_gpio(i2s_chan_handle_t handle, const i2s_tdm_gpio_c
/* For "tx + slave" mode, select TX signal index for ws and bck */
if (handle->dir == I2S_DIR_TX && !handle->controller->full_duplex) {
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
}
#endif
@ -185,8 +184,7 @@ static esp_err_t i2s_tdm_set_gpio(i2s_chan_handle_t handle, const i2s_tdm_gpio_c
/* For "rx + master" mode, select RX signal index for ws and bck */
if (handle->dir == I2S_DIR_RX && !handle->controller->full_duplex) {
#if SOC_I2S_HW_VERSION_2
I2S_RCC_ATOMIC() {
I2S_RCC_ATOMIC_ENV;
I2S_CLOCK_SRC_ATOMIC() {
i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
}
#endif

48
components/hal/esp32p4/include/hal/i2s_ll.h
View File

@ -112,7 +112,7 @@ static inline void i2s_ll_enable_core_clock(i2s_dev_t *hw, bool enable)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_tx_enable_clock(i2s_dev_t *hw)
static inline void _i2s_ll_tx_enable_clock(i2s_dev_t *hw)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
switch (I2S_LL_GET_ID(hw)) {
@ -128,12 +128,16 @@ static inline void i2s_ll_tx_enable_clock(i2s_dev_t *hw)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_tx_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_tx_enable_clock(__VA_ARGS__)
/**
* @brief Enable I2S rx module clock
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
static inline void _i2s_ll_rx_enable_clock(i2s_dev_t *hw)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
switch (I2S_LL_GET_ID(hw)) {
@ -149,6 +153,10 @@ static inline void i2s_ll_rx_enable_clock(i2s_dev_t *hw)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_rx_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_rx_enable_clock(__VA_ARGS__)
/**
* @brief Disable I2S tx module clock
*
@ -204,7 +212,7 @@ static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw)
static inline void _i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
// Special on P4, set mst_clk_sel to 1 means attach the mclk signal to TX module
@ -221,12 +229,16 @@ static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_mclk_bind_to_tx_clk(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_mclk_bind_to_tx_clk(__VA_ARGS__)
/**
* @brief I2S mclk use rx module clock
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw)
static inline void _i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
// Special on P4, set mst_clk_sel to 0 means attach the mclk signal to RX module
@ -243,6 +255,10 @@ static inline void i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_mclk_bind_to_rx_clk(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_mclk_bind_to_rx_clk(__VA_ARGS__)
/**
* @brief Enable I2S TX slave mode
*
@ -331,7 +347,7 @@ static inline uint32_t i2s_ll_get_clk_src(i2s_clock_src_t src)
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock.
*/
static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void _i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
uint32_t clk_src = i2s_ll_get_clk_src(src);
@ -348,13 +364,17 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_tx_clk_set_src(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_tx_clk_set_src(__VA_ARGS__)
/**
* @brief Set RX source clock
*
* @param hw Peripheral I2S hardware instance address.
* @param src I2S source clock
*/
static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
static inline void _i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
{
// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
uint32_t clk_src = i2s_ll_get_clk_src(src);
@ -371,6 +391,10 @@ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src)
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_rx_clk_set_src(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_rx_clk_set_src(__VA_ARGS__)
/**
* @brief Set I2S tx bck div num
*
@ -464,7 +488,7 @@ static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, ui
* @param hw Peripheral I2S hardware instance address.
* @param mclk_div The mclk division coefficients
*/
static inline void i2s_ll_tx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
static inline void _i2s_ll_tx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
{
/* Workaround for inaccurate clock while switching from a relatively low sample rate to a high sample rate
* Set to particular coefficients first then update to the target coefficients,
@ -486,6 +510,10 @@ static inline void i2s_ll_tx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *
i2s_ll_tx_set_raw_clk_div(hw, mclk_div->integer, div_x, div_y, div_z, div_yn1);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_tx_set_mclk(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_tx_set_mclk(__VA_ARGS__)
/**
* @brief Set I2S rx bck div num
*
@ -504,7 +532,7 @@ static inline void i2s_ll_rx_set_bck_div_num(i2s_dev_t *hw, uint32_t val)
* @param hw Peripheral I2S hardware instance address.
* @param mclk_div The mclk division coefficients
*/
static inline void i2s_ll_rx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
static inline void _i2s_ll_rx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *mclk_div)
{
/* Workaround for inaccurate clock while switching from a relatively low sample rate to a high sample rate
* Set to particular coefficients first then update to the target coefficients,
@ -526,6 +554,10 @@ static inline void i2s_ll_rx_set_mclk(i2s_dev_t *hw, const hal_utils_clk_div_t *
i2s_ll_rx_set_raw_clk_div(hw, mclk_div->integer, div_x, div_y, div_z, div_yn1);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_rx_set_mclk(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_ll_rx_set_mclk(__VA_ARGS__)
/**
* @brief Start I2S TX
*

38
components/hal/i2s_hal.c
View File

@ -66,7 +66,42 @@ void i2s_hal_init(i2s_hal_context_t *hal, int port_id)
hal->dev = I2S_LL_GET_HW(port_id);
}
#if SOC_PERIPH_CLK_CTRL_SHARED
void _i2s_hal_set_tx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src)
{
if (clk_info) {
hal_utils_clk_div_t mclk_div = {};
#if SOC_I2S_HW_VERSION_2
_i2s_ll_tx_enable_clock(hal->dev);
_i2s_ll_mclk_bind_to_tx_clk(hal->dev);
#endif
_i2s_ll_tx_clk_set_src(hal->dev, clk_src);
i2s_hal_calc_mclk_precise_division(clk_info->sclk, clk_info->mclk, &mclk_div);
_i2s_ll_tx_set_mclk(hal->dev, &mclk_div);
i2s_ll_tx_set_bck_div_num(hal->dev, clk_info->bclk_div);
} else {
_i2s_ll_tx_clk_set_src(hal->dev, clk_src);
}
}
void _i2s_hal_set_rx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src)
{
if (clk_info) {
hal_utils_clk_div_t mclk_div = {};
#if SOC_I2S_HW_VERSION_2
_i2s_ll_rx_enable_clock(hal->dev);
_i2s_ll_mclk_bind_to_rx_clk(hal->dev);
#endif
_i2s_ll_rx_clk_set_src(hal->dev, clk_src);
i2s_hal_calc_mclk_precise_division(clk_info->sclk, clk_info->mclk, &mclk_div);
_i2s_ll_rx_set_mclk(hal->dev, &mclk_div);
i2s_ll_rx_set_bck_div_num(hal->dev, clk_info->bclk_div);
} else {
_i2s_ll_rx_clk_set_src(hal->dev, clk_src);
}
}
#else
void i2s_hal_set_tx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src)
{
if (clk_info) {
hal_utils_clk_div_t mclk_div = {};
@ -83,7 +118,7 @@ void _i2s_hal_set_tx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *c
}
}
void _i2s_hal_set_rx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src)
void i2s_hal_set_rx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src)
{
if (clk_info) {
hal_utils_clk_div_t mclk_div = {};
@ -99,6 +134,7 @@ void _i2s_hal_set_rx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *c
i2s_ll_rx_clk_set_src(hal->dev, clk_src);
}
}
#endif // SOC_PERIPH_CLK_CTRL_SHARED
/*-------------------------------------------------------------------------
| STD Specific Slot Configurations |

14
components/hal/include/hal/i2s_hal.h
View File

@ -139,6 +139,7 @@ void i2s_hal_init(i2s_hal_context_t *hal, int port_id);
*/
void i2s_hal_calc_mclk_precise_division(uint32_t sclk, uint32_t mclk, hal_utils_clk_div_t *mclk_div);
#if SOC_PERIPH_CLK_CTRL_SHARED
/**
* @brief Set tx channel clock
*
@ -147,14 +148,19 @@ void i2s_hal_calc_mclk_precise_division(uint32_t sclk, uint32_t mclk, hal_utils_
* @param clk_src clock source
*/
void _i2s_hal_set_tx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src);
#if SOC_PERIPH_CLK_CTRL_SHARED
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_hal_set_tx_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _i2s_hal_set_tx_clock(__VA_ARGS__)
#else
#define i2s_hal_set_tx_clock(...) _i2s_hal_set_tx_clock(__VA_ARGS__)
#endif
/**
* @brief Set tx channel clock
*
* @param hal Context of the HAL layer
* @param clk_info clock information, if it is NULL, only set the clock source
* @param clk_src clock source
*/
void i2s_hal_set_tx_clock(i2s_hal_context_t *hal, const i2s_hal_clock_info_t *clk_info, i2s_clock_src_t clk_src);
#endif // SOC_PERIPH_CLK_CTRL_SHARED
/**
* @brief Set rx channel clock