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https://github.com/espressif/esp-idf.git
synced 2024-09-20 00:36:01 -04:00
feat(gdma): supported rx err_eof interrupt
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50b7681dae
commit
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@ -739,16 +739,7 @@ void gdma_default_rx_isr(void *args)
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uint32_t intr_status = gdma_hal_read_intr_status(hal, pair_id, GDMA_CHANNEL_DIRECTION_RX);
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uint32_t intr_status = gdma_hal_read_intr_status(hal, pair_id, GDMA_CHANNEL_DIRECTION_RX);
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gdma_hal_clear_intr(hal, pair_id, GDMA_CHANNEL_DIRECTION_RX, intr_status);
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gdma_hal_clear_intr(hal, pair_id, GDMA_CHANNEL_DIRECTION_RX, intr_status);
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if ((intr_status & GDMA_LL_EVENT_RX_SUC_EOF) && rx_chan->cbs.on_recv_eof) {
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/* Call on_recv_done before eof callbacks to ensure a correct sequence */
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uint32_t eof_addr = gdma_hal_get_eof_desc_addr(hal, pair_id, GDMA_CHANNEL_DIRECTION_RX);
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gdma_event_data_t edata = {
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.rx_eof_desc_addr = eof_addr
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};
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need_yield |= rx_chan->cbs.on_recv_eof(&rx_chan->base, &edata, rx_chan->user_data);
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}
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if ((intr_status & GDMA_LL_EVENT_RX_DESC_ERROR) && rx_chan->cbs.on_descr_err) {
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need_yield |= rx_chan->cbs.on_descr_err(&rx_chan->base, NULL, rx_chan->user_data);
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}
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if ((intr_status & GDMA_LL_EVENT_RX_DONE) && rx_chan->cbs.on_recv_done) {
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if ((intr_status & GDMA_LL_EVENT_RX_DONE) && rx_chan->cbs.on_recv_done) {
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/* Here we don't return an event data in this callback.
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/* Here we don't return an event data in this callback.
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* Because we can't get a determinant descriptor address
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* Because we can't get a determinant descriptor address
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@ -760,6 +751,24 @@ void gdma_default_rx_isr(void *args)
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*/
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*/
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need_yield |= rx_chan->cbs.on_recv_done(&rx_chan->base, NULL, rx_chan->user_data);
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need_yield |= rx_chan->cbs.on_recv_done(&rx_chan->base, NULL, rx_chan->user_data);
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}
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}
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if ((intr_status & GDMA_LL_EVENT_RX_DESC_ERROR) && rx_chan->cbs.on_descr_err) {
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need_yield |= rx_chan->cbs.on_descr_err(&rx_chan->base, NULL, rx_chan->user_data);
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}
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if ((intr_status & GDMA_LL_EVENT_RX_SUC_EOF) && rx_chan->cbs.on_recv_eof) {
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uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id);
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gdma_event_data_t suc_eof_data = {
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.rx_eof_desc_addr = eof_addr,
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};
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need_yield |= rx_chan->cbs.on_recv_eof(&rx_chan->base, &suc_eof_data, rx_chan->user_data);
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}
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if ((intr_status & GDMA_LL_EVENT_RX_ERR_EOF) && rx_chan->cbs.on_recv_eof) {
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uint32_t eof_addr = gdma_ll_rx_get_error_eof_desc_addr(group->hal.dev, pair->pair_id);
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gdma_event_data_t err_eof_data = {
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.rx_eof_desc_addr = eof_addr,
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.flags.abnormal_eof = true,
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};
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need_yield |= rx_chan->cbs.on_recv_eof(&rx_chan->base, &err_eof_data, rx_chan->user_data);
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}
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if (need_yield) {
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if (need_yield) {
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portYIELD_FROM_ISR();
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portYIELD_FROM_ISR();
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@ -781,7 +790,7 @@ void gdma_default_tx_isr(void *args)
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if ((intr_status & GDMA_LL_EVENT_TX_EOF) && tx_chan->cbs.on_trans_eof) {
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if ((intr_status & GDMA_LL_EVENT_TX_EOF) && tx_chan->cbs.on_trans_eof) {
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uint32_t eof_addr = gdma_hal_get_eof_desc_addr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX);
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uint32_t eof_addr = gdma_hal_get_eof_desc_addr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX);
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gdma_event_data_t edata = {
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gdma_event_data_t edata = {
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.tx_eof_desc_addr = eof_addr
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.tx_eof_desc_addr = eof_addr,
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};
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};
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need_yield |= tx_chan->cbs.on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data);
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need_yield |= tx_chan->cbs.on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data);
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}
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}
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@ -58,6 +58,14 @@ typedef struct {
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intptr_t rx_eof_desc_addr; /*!< EOF descriptor address of RX channel */
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intptr_t rx_eof_desc_addr; /*!< EOF descriptor address of RX channel */
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intptr_t tx_eof_desc_addr; /*!< EOF descriptor address of TX channel */
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intptr_t tx_eof_desc_addr; /*!< EOF descriptor address of TX channel */
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};
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};
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struct {
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uint32_t abnormal_eof: 1; /*!< 0: normal/success EOF;
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* 1: abnormal/error EOF,
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* it doesn't mean GDMA goes into an error condition,
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* but the other peripheral goes into an abnormal state.
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* For GDMA, it's still a valid EOF
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*/
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} flags;
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} gdma_event_data_t;
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} gdma_event_data_t;
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/**
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/**
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