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efuse: Enable and adjust some efuse tests for H2 chip
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81e1e65995
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@ -2,6 +2,6 @@
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components/efuse/test_apps:
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components/efuse/test_apps:
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disable_test:
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disable_test:
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- if: IDF_TARGET in ["esp32s2", "esp32s3", "esp32h2"]
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- if: IDF_TARGET in ["esp32s2", "esp32s3"]
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temporary: true
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temporary: true
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reason: eFuse for S2 and S3 is similar to the C3 chip, so we only test for C3. H2 fails IDF-6897
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reason: eFuse for S2 and S3 is similar to the C3 chip, so we only test for C3.
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@ -69,6 +69,9 @@ static esp_err_t s_check_key(esp_efuse_block_t num_key, void* wr_key)
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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#endif
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#if SOC_ECDSA_SUPPORTED
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purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
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#endif
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#endif
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purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL ||
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purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL ||
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purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG ||
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purpose == ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG ||
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@ -121,7 +124,10 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK_KEY0, tmp_purpose, &rd_key, 33));
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK_KEY0, tmp_purpose, &rd_key, 33));
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK10, tmp_purpose, &rd_key, sizeof(rd_key)));
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK10, tmp_purpose, &rd_key, sizeof(rd_key)));
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for (esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_RESERVED; purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++purpose) {
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for (esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_USER; purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++purpose) {
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if (purpose == ESP_EFUSE_KEY_PURPOSE_USER) {
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continue;
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}
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esp_efuse_utility_reset();
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esp_efuse_utility_reset();
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#ifdef CONFIG_EFUSE_FPGA_TEST
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#ifdef CONFIG_EFUSE_FPGA_TEST
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esp_efuse_utility_update_virt_blocks();
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esp_efuse_utility_update_virt_blocks();
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@ -160,7 +166,11 @@ TEST_CASE("Test 1 esp_efuse_write_key for FPGA", "[efuse]")
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esp_efuse_purpose_t purpose [] = {
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esp_efuse_purpose_t purpose [] = {
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ESP_EFUSE_KEY_PURPOSE_USER,
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ESP_EFUSE_KEY_PURPOSE_USER,
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#if SOC_ECDSA_SUPPORTED
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ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY,
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#else
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ESP_EFUSE_KEY_PURPOSE_RESERVED,
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ESP_EFUSE_KEY_PURPOSE_RESERVED,
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#endif
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1,
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ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1,
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ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2,
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ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2,
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@ -11,7 +11,7 @@ from pytest_embedded import Dut
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@pytest.mark.esp32c2
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@pytest.mark.esp32c2
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@pytest.mark.esp32c3
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@pytest.mark.esp32c3
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@pytest.mark.esp32c6
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@pytest.mark.esp32c6
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# @pytest.mark.esp32h2 IDF-6897
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@pytest.mark.esp32h2
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@pytest.mark.generic
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@pytest.mark.generic
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def test_efuse(dut: Dut) -> None:
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def test_efuse(dut: Dut) -> None:
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dut.run_all_single_board_cases()
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dut.run_all_single_board_cases()
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