Merge branch 'refactor/gptimer_retention_link_test' into 'master'

gptimer: optimize the backup register Closes IDF-9749 See merge request espressif/esp-idf!33522
2024-10-05 20:47:46 -04:00 · 2024-09-26 12:28:23 +08:00 · 2024-09-26 12:28:23 +08:00 · 399ea2a05c
commit 399ea2a05c
parent 06bd290ce7 0c38389aa2
19 changed files with 154 additions and 259 deletions
--- a/components/esp_driver_gptimer/include/driver/gptimer.h
+++ b/components/esp_driver_gptimer/include/driver/gptimer.h
@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */
@ -28,9 +28,9 @@ typedef struct {
                                              if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
    struct {
        uint32_t intr_shared: 1;         /*!< Set true, the timer interrupt number can be shared with other peripherals */
-        uint32_t backup_before_sleep: 1; /*!< If set, the driver will backup/restore the GPTimer registers before/after entering/exist sleep mode.
-                                              By this approach, the system can power off GPTimer's power domain.
-                                              This can save power, but at the expense of more RAM being consumed */
+        uint32_t allow_pd: 1;            /*!< If set, driver allows the power domain to be powered off when system enters sleep mode.
+                                              This can save power, but at the expense of more RAM being consumed to save register context. */
+        uint32_t backup_before_sleep: 1; /*!< @deprecated, same meaning as allow_pd */
    } flags;                             /*!< GPTimer config flags*/
 } gptimer_config_t;

--- a/components/esp_driver_gptimer/src/gptimer.c
+++ b/components/esp_driver_gptimer/src/gptimer.c
@ -94,8 +94,9 @@ esp_err_t gptimer_new_timer(const gptimer_config_t *config, gptimer_handle_t *re
                            TAG, "invalid interrupt priority:%d", config->intr_priority);
    }

+    bool allow_pd = (config->flags.allow_pd == 1) || (config->flags.backup_before_sleep == 1);
 #if !SOC_TIMER_SUPPORT_SLEEP_RETENTION
-    ESP_RETURN_ON_FALSE(config->flags.backup_before_sleep == 0, ESP_ERR_NOT_SUPPORTED, TAG, "register back up is not supported");
+    ESP_RETURN_ON_FALSE(allow_pd == false, ESP_ERR_NOT_SUPPORTED, TAG, "not able to power down in light sleep");
 #endif // SOC_TIMER_SUPPORT_SLEEP_RETENTION

    timer = heap_caps_calloc(1, sizeof(gptimer_t), GPTIMER_MEM_ALLOC_CAPS);
@ -106,11 +107,11 @@ esp_err_t gptimer_new_timer(const gptimer_config_t *config, gptimer_handle_t *re
    int group_id = group->group_id;
    int timer_id = timer->timer_id;

+    if (allow_pd) {
 #if GPTIMER_USE_RETENTION_LINK
-    if (config->flags.backup_before_sleep != 0) {
        gptimer_create_retention_module(group);
-    }
 #endif // GPTIMER_USE_RETENTION_LINK
+    }

    // initialize HAL layer
    timer_hal_init(&timer->hal, group_id, timer_id);
--- a/components/esp_driver_gptimer/src/gptimer_common.c
+++ b/components/esp_driver_gptimer/src/gptimer_common.c
@ -87,7 +87,7 @@ gptimer_group_t *gptimer_acquire_group_handle(int group_id)
            }
        }
 #if GPTIMER_USE_RETENTION_LINK
-        sleep_retention_module_t module = TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id);
+        sleep_retention_module_t module = tg_timer_reg_retention_info[group_id].module;
        sleep_retention_module_init_param_t init_param = {
            .cbs = {
                .create = {
--- a/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt
+++ b/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt
@ -1,6 +1,5 @@
 set(srcs "test_app_main.c"
-         "test_gptimer.c"
-         "test_gptimer_sleep.c")
+         "test_gptimer.c")

 if(CONFIG_GPTIMER_ISR_IRAM_SAFE)
    list(APPEND srcs "test_gptimer_iram.c")
@ -10,6 +9,10 @@ if(CONFIG_SOC_TIMER_SUPPORT_ETM)
    list(APPEND srcs "test_gptimer_etm.c")
 endif()

+if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED AND CONFIG_PM_ENABLE)
+    list(APPEND srcs "test_gptimer_sleep.c")
+endif()
+
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(SRCS ${srcs}
--- a/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer_sleep.c
+++ b/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer_sleep.c
@ -15,20 +15,8 @@
 #include "esp_private/sleep_cpu.h"
 #include "esp_private/esp_sleep_internal.h"
 #include "esp_private/esp_pmu.h"
-#if !SOC_LIGHT_SLEEP_SUPPORTED
-#include "esp_private/gptimer.h"
-#include "esp_private/sleep_retention.h"
-#include "hal/timer_ll.h"
-#include "hal/wdt_hal.h"
-#endif

-#if CONFIG_GPTIMER_ISR_IRAM_SAFE
-#define TEST_ALARM_CALLBACK_ATTR IRAM_ATTR
-#else
-#define TEST_ALARM_CALLBACK_ATTR
-#endif // CONFIG_GPTIMER_ISR_IRAM_SAFE
-
-static TEST_ALARM_CALLBACK_ATTR bool test_gptimer_alarm_stop_callback(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_data)
+static bool test_gptimer_alarm_stop_callback(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_data)
 {
    TaskHandle_t task_handle = (TaskHandle_t)user_data;
    BaseType_t high_task_wakeup;
@ -37,75 +25,19 @@ static TEST_ALARM_CALLBACK_ATTR bool test_gptimer_alarm_stop_callback(gptimer_ha
    return high_task_wakeup == pdTRUE;
 }

-/**
- * @brief This function abstracts the behavior of performing the Backup-Reset-Restore process on the specified
- *        Timer group and is used as a helper function to test the retention function of the driver.
- *        If light-sleep feature is supported, this function will enter and exit a real light sleep or PD_TOP
- *        light sleep. Otherwise, it will trigger retention by software and reset the timer module to simulate
- *        a light-sleep in/out process to verify the driver's support for GPTimer sleep retention.
- *
- * @param timer Timer handle to be reset, created by `gptimer_new_timer()`
- * @param back_up_before_sleep Whether to back up GPTimer registers before sleep
- */
-static void test_gptimer_survival_after_sleep_helper(gptimer_handle_t timer, bool back_up_before_sleep)
-{
-#if SOC_LIGHT_SLEEP_SUPPORTED
-    esp_sleep_context_t sleep_ctx;
-    esp_sleep_set_sleep_context(&sleep_ctx);
-    printf("go to light sleep for 2 seconds\r\n");
-#if ESP_SLEEP_POWER_DOWN_CPU
-    TEST_ESP_OK(sleep_cpu_configure(true));
-#endif
-    TEST_ESP_OK(esp_sleep_enable_timer_wakeup(2 * 1000 * 1000));
-    TEST_ESP_OK(esp_light_sleep_start());
-
-    printf("Waked up! Let's see if GPTimer driver can still work...\r\n");
-#if ESP_SLEEP_POWER_DOWN_CPU
-    TEST_ESP_OK(sleep_cpu_configure(false));
-#endif
-
-    printf("check if the sleep happened as expected\r\n");
-    TEST_ASSERT_EQUAL(0, sleep_ctx.sleep_request_result);
-#if SOC_TIMER_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
-    if (back_up_before_sleep) {
-        // Verify that when GPTimer retention is configured and sleep is requested,
-        // the TOP power domain should be allowed to power down.
-        TEST_ASSERT_EQUAL(PMU_SLEEP_PD_TOP, sleep_ctx.sleep_flags & PMU_SLEEP_PD_TOP);
-    } else {
-        // Verify that when GPTimer retention is not configured and sleep is requested, the TOP power
-        // domain should not be allowed to power down to ensure the peripheral context is not lost.
-        TEST_ASSERT_EQUAL(0, sleep_ctx.sleep_flags & PMU_SLEEP_PD_TOP);
-    }
-#endif
-    esp_sleep_set_sleep_context(NULL);
-#elif SOC_TIMER_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
-    if (back_up_before_sleep) {
-        printf("Back up the timer group context in use and then reset it\r\n");
-        sleep_retention_do_extra_retention(true);
-
-        int group_id;
-        gptimer_get_group_id(timer, &group_id);
-        _timer_ll_reset_register(group_id);
-
-        printf("Reset done! Let's restore its context and see if its driver can still work...\r\n");
-        sleep_retention_do_extra_retention(false);
-    }
-#endif
-}
-
 /**
 * @brief Test the GPTimer driver can still work after light sleep
 *
- * @param back_up_before_sleep Whether to back up GPTimer registers before sleep
+ * @param allow_pd Whether to allow power down the peripheral in light sleep
 */
-static void test_gptimer_sleep_retention(bool back_up_before_sleep)
+static void test_gptimer_sleep_retention(bool allow_pd)
 {
    TaskHandle_t task_handle =  xTaskGetCurrentTaskHandle();
    gptimer_config_t timer_config = {
        .resolution_hz = 10000, // 10KHz, 1 tick = 0.1ms
        .clk_src = GPTIMER_CLK_SRC_DEFAULT,
        .direction = GPTIMER_COUNT_UP,
-        .flags.backup_before_sleep = back_up_before_sleep,
+        .flags.allow_pd = allow_pd,
    };
    gptimer_handle_t timer = NULL;
    TEST_ESP_OK(gptimer_new_timer(&timer_config, &timer));
@ -135,7 +67,27 @@ static void test_gptimer_sleep_retention(bool back_up_before_sleep)
    // Note: don't enable the gptimer before going to sleep, ensure no power management lock is acquired by it
    TEST_ESP_OK(gptimer_disable(timer));

-    test_gptimer_survival_after_sleep_helper(timer, back_up_before_sleep);
+    esp_sleep_context_t sleep_ctx;
+    esp_sleep_set_sleep_context(&sleep_ctx);
+    printf("go to light sleep for 2 seconds\r\n");
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(true));
+#endif
+    TEST_ESP_OK(esp_sleep_enable_timer_wakeup(2 * 1000 * 1000));
+    TEST_ESP_OK(esp_light_sleep_start());
+
+    printf("Waked up! Let's see if GPTimer driver can still work...\r\n");
+#if ESP_SLEEP_POWER_DOWN_CPU
+    TEST_ESP_OK(sleep_cpu_configure(false));
+#endif
+
+    printf("check if the sleep happened as expected\r\n");
+    TEST_ASSERT_EQUAL(0, sleep_ctx.sleep_request_result);
+#if SOC_RMT_SUPPORT_SLEEP_RETENTION
+    // check if the power domain also is powered down
+    TEST_ASSERT_EQUAL(allow_pd ? PMU_SLEEP_PD_TOP : 0, (sleep_ctx.sleep_flags) & PMU_SLEEP_PD_TOP);
+#endif
+    esp_sleep_set_sleep_context(NULL);

    uint64_t count_value_after_sleep = 0;
    TEST_ESP_OK(gptimer_get_raw_count(timer, &count_value_after_sleep));
--- a/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_sleep.c
+++ b/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_sleep.c
@ -113,7 +113,7 @@ static void test_rmt_tx_rx_sleep_retention(bool allow_pd)
 #endif
    esp_sleep_set_sleep_context(NULL);

-    // enable both channels, pm lock will be acquired, so no light sleep will event happen during the transaction
+    // enable both channels, pm lock will be acquired, so no light sleep will even happen during the transaction
    TEST_ESP_OK(rmt_enable(tx_channel));
    TEST_ESP_OK(rmt_enable(rx_channel));

--- a/components/hal/esp32c5/include/hal/timer_ll.h
+++ b/components/hal/esp32c5/include/hal/timer_ll.h
@ -24,7 +24,6 @@ extern "C" {
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
-#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER)

 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task)                                     \
    (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{                                          \
--- a/components/hal/esp32c6/include/hal/timer_ll.h
+++ b/components/hal/esp32c6/include/hal/timer_ll.h
@ -24,7 +24,6 @@ extern "C" {
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
-#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER)

 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task)                                        \
    (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{                                             \
--- a/components/hal/esp32c61/include/hal/timer_ll.h
+++ b/components/hal/esp32c61/include/hal/timer_ll.h
@ -24,7 +24,6 @@ extern "C" {
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
-#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER)

 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task)                                        \
    (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{                                             \
--- a/components/hal/esp32h2/include/hal/timer_ll.h
+++ b/components/hal/esp32h2/include/hal/timer_ll.h
@ -24,7 +24,6 @@ extern "C" {
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
-#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER)

 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task)                                        \
    (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{                                             \
--- a/components/hal/esp32p4/include/hal/timer_ll.h
+++ b/components/hal/esp32p4/include/hal/timer_ll.h
@ -24,7 +24,6 @@ extern "C" {
 // Get timer group register base address with giving group number
 #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1))
 #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id))
-#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER)

 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task)                         \
    (uint32_t[2][2][GPTIMER_ETM_TASK_MAX]){                                 \
--- a/components/soc/esp32c5/timer_periph.c
+++ b/components/soc/esp32c5/timer_periph.c
@ -1,4 +1,3 @@
-
 /*
 * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
 *
@ -56,26 +55,21 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
        TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
        .owner = ENTRY(0) | ENTRY(2)
    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
-        .owner = ENTRY(0) | ENTRY(2)
-    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

@ -99,35 +93,32 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
        TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
        .owner = ENTRY(0) | ENTRY(2)
    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
-        .owner = ENTRY(0) | ENTRY(2)
-    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

 const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
    [0] = {
+        .module = SLEEP_RETENTION_MODULE_TG0_TIMER,
        .regdma_entry_array = tg0_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
    },
    [1] = {
+        .module = SLEEP_RETENTION_MODULE_TG1_TIMER,
        .regdma_entry_array = tg1_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
    },
--- a/components/soc/esp32c6/timer_periph.c
+++ b/components/soc/esp32c6/timer_periph.c
@ -40,41 +40,36 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(0), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(0), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x02),
        TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

@ -83,50 +78,47 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(1), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x02),
        TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

 const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
    [0] = {
+        .module = SLEEP_RETENTION_MODULE_TG0_TIMER,
        .regdma_entry_array = tg0_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
    },
    [1] = {
+        .module = SLEEP_RETENTION_MODULE_TG1_TIMER,
        .regdma_entry_array = tg1_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
    },
--- a/components/soc/esp32c61/timer_periph.c
+++ b/components/soc/esp32c61/timer_periph.c
@ -40,41 +40,36 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(0), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(0), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x02),
        TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

@ -83,50 +78,47 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(1), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x02),
        TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

 const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
    [0] = {
+        .module = SLEEP_RETENTION_MODULE_TG0_TIMER,
        .regdma_entry_array = tg0_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
    },
    [1] = {
+        .module = SLEEP_RETENTION_MODULE_TG1_TIMER,
        .regdma_entry_array = tg1_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
    },
--- a/components/soc/esp32h2/timer_periph.c
+++ b/components/soc/esp32h2/timer_periph.c
@ -40,41 +40,36 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(0), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(0), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x02),
        TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

@ -83,50 +78,47 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: wait for the capture done
    [1] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x01),
        TIMG_T0UPDATE_REG(1), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [2] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x02),
        TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [3] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x03),
-        TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [4] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x04),
+    [3] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x03),
        TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [5] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x05),
+    [4] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x04),
        TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0) | ENTRY(2)
    },
 };

 const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
    [0] = {
+        .module = SLEEP_RETENTION_MODULE_TG0_TIMER,
        .regdma_entry_array = tg0_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
    },
    [1] = {
+        .module = SLEEP_RETENTION_MODULE_TG1_TIMER,
        .regdma_entry_array = tg1_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
    },
--- a/components/soc/esp32p4/timer_periph.c
+++ b/components/soc/esp32p4/timer_periph.c
@ -42,66 +42,56 @@ const regdma_entries_config_t tg0_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(0), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [1] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x01),
        TIMG_T1UPDATE_REG(0), TIMG_T1_UPDATE, TIMG_T1_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: wait for the capture done
    [2] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x02),
        TIMG_T0UPDATE_REG(0), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [3] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG0_TIMER_LINK(0x03),
        TIMG_T1UPDATE_REG(0), 0x0, TIMG_T1_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [4] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x04),
        TIMG_T0LO_REG(0), TIMG_T0LOADLO_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [5] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x05),
-        TIMG_T0HI_REG(0), TIMG_T0LOADHI_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [6] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x06),
        TIMG_T1LO_REG(0), TIMG_T1LOADLO_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [7] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG0_TIMER_LINK(0x07),
-        TIMG_T1HI_REG(0), TIMG_T1LOADHI_REG(0), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [8] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x08),
+    [6] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x06),
        TIMG_T0LOAD_REG(0), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
-    [9] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x09),
+    [7] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG0_TIMER_LINK(0x07),
        TIMG_T1LOAD_REG(0), 0x1, TIMG_T1_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [10] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x0a),
+    [8] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG0_TIMER_LINK(0x08),
        TIMG_T0CONFIG_REG(0), TIMG_T0CONFIG_REG(0),
        TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
 };

@ -110,74 +100,66 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = {
    [0] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x00),
        TIMG_T0UPDATE_REG(1), TIMG_T0_UPDATE, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [1] = {
        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x01),
        TIMG_T1UPDATE_REG(1), TIMG_T1_UPDATE, TIMG_T1_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: wait for the capture done
    [2] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x02),
        TIMG_T0UPDATE_REG(1), 0x0, TIMG_T0_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [3] = {
        .config = REGDMA_LINK_WAIT_INIT(REGDMA_TG1_TIMER_LINK(0x03),
        TIMG_T1UPDATE_REG(1), 0x0, TIMG_T1_UPDATE_M, 0, 1),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: save the captured counter value
    // restore stage: store the captured counter value to the loader register
    [4] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x04),
        TIMG_T0LO_REG(1), TIMG_T0LOADLO_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    [5] = {
        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x05),
-        TIMG_T0HI_REG(1), TIMG_T0LOADHI_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [6] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x06),
        TIMG_T1LO_REG(1), TIMG_T1LOADLO_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
-    },
-    [7] = {
-        .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_TG1_TIMER_LINK(0x07),
-        TIMG_T1HI_REG(1), TIMG_T1LOADHI_REG(1), 2, 0, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // restore stage: trigger a soft reload, so the timer can continue from where it was backed up
-    [8] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x08),
+    [6] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x06),
        TIMG_T0LOAD_REG(1), 0x1, TIMG_T0_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
-    [9] = {
-        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x09),
+    [7] = {
+        .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_TIMER_LINK(0x07),
        TIMG_T1LOAD_REG(1), 0x1, TIMG_T1_LOAD_M, 1, 0),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
    // backup stage: save other configuration and status registers
    // restore stage: restore the configuration and status registers
-    [10] = {
-        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x0a),
+    [8] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TG1_TIMER_LINK(0x08),
        TIMG_T0CONFIG_REG(1), TIMG_T0CONFIG_REG(1), TG_TIMER_RETENTION_REGS_CNT, 0, 0,
        tg_timer_regs_map[0], tg_timer_regs_map[1],
        tg_timer_regs_map[2], tg_timer_regs_map[3]),
-        .owner = TIMG_RETENTION_ENTRY
+        .owner = ENTRY(0)
    },
 };

 const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS] = {
    [0] = {
+        .module = SLEEP_RETENTION_MODULE_TG0_TIMER,
        .regdma_entry_array = tg0_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg0_timer_regdma_entries)
    },
    [1] = {
+        .module = SLEEP_RETENTION_MODULE_TG1_TIMER,
        .regdma_entry_array = tg1_timer_regdma_entries,
        .array_size = ARRAY_SIZE(tg1_timer_regdma_entries)
    },
--- a/components/soc/include/soc/timer_periph.h
+++ b/components/soc/include/soc/timer_periph.h
@ -13,20 +13,14 @@
 #include "soc/periph_defs.h"
 #include "soc/regdma.h"

+#if SOC_TIMER_SUPPORT_SLEEP_RETENTION
+#include "soc/retention_periph_defs.h"
+#endif // SOC_TIMER_SUPPORT_SLEEP_RETENTION
+
 #ifdef __cplusplus
 extern "C" {
 #endif

-#if SOC_LIGHT_SLEEP_SUPPORTED
-#if SOC_PHY_SUPPORTED
-#define TIMG_RETENTION_ENTRY    (ENTRY(0) | ENTRY(2))
-#else
-#define TIMG_RETENTION_ENTRY    (ENTRY(0))
-#endif
-#else
-#define TIMG_RETENTION_ENTRY    REGDMA_SW_TRIGGER_ENTRY
-#endif
-
 typedef struct {
    struct {
        const periph_module_t module; // Peripheral module
@ -36,8 +30,9 @@ typedef struct {

 extern const timer_group_signal_conn_t timer_group_periph_signals;

-#if SOC_TIMER_SUPPORT_SLEEP_RETENTION && SOC_PAU_SUPPORTED
+#if SOC_TIMER_SUPPORT_SLEEP_RETENTION
 typedef struct {
+    const periph_retention_module_t module;
    const regdma_entries_config_t *regdma_entry_array;
    uint32_t array_size;
 } tg_timer_reg_retention_info_t;
--- a/docs/en/api-reference/peripherals/gptimer.rst
+++ b/docs/en/api-reference/peripherals/gptimer.rst
@ -48,7 +48,7 @@ To install a timer instance, there is a configuration structure that needs to be
 - :cpp:member:`gptimer_config_t::direction` sets the counting direction of the timer, supported directions are listed in :cpp:type:`gptimer_count_direction_t`, you can only pick one of them.
 - :cpp:member:`gptimer_config_t::resolution_hz` sets the resolution of the internal counter. Each count step is equivalent to **1 / resolution_hz** seconds.
 - :cpp:member:`gptimer_config::intr_priority` sets the priority of the timer interrupt. If it is set to ``0``, the driver will allocate an interrupt with a default priority. Otherwise, the driver will use the given priority.
- :cpp:member:`gptimer_config_t::backup_before_sleep` enables the backup of the GPTimer registers before entering sleep mode. This option implies an balance between power consumption and memory usage. If the power consumption is not a concern, you can disable this option to save memory. But if you want to save more power, you should enable this option to backup the GPTimer registers before entering sleep mode, and restore them after waking up. This feature depends on specific hardware module, if you enable this flag on an unsupported chip, you will get an error message like ``register back up is not supported``.
+- :cpp:member:`gptimer_config_t::allow_pd` configures if the driver allows the system to power down the peripheral in light sleep mode. Before entering sleep, the system will backup the GPTimer register context, which will be restored later when the system exit the sleep mode. Powering down the peripheral can save more power, but at the cost of more memory consumed to save the register context. It's a tradeoff between power consumption and memory consumption. This configuration option relies on specific hardware feature, if you enable it on an unsupported chip, you will see error message like ``not able to power down in light sleep``.
 - Optional :cpp:member:`gptimer_config_t::intr_shared` sets whether or not mark the timer interrupt source as a shared one. For the pros/cons of a shared interrupt, you can refer to :doc:`Interrupt Handling <../../api-reference/system/intr_alloc>`.

 With all the above configurations set in the structure, the structure can be passed to :cpp:func:`gptimer_new_timer` which will instantiate the timer instance and return a handle of the timer.
@ -289,7 +289,7 @@ The driver can prevent the above issue by creating a power management lock. The

 .. only:: SOC_TIMER_SUPPORT_SLEEP_RETENTION

-    Besides the potential changes to the clock source, when the power management is enabled, the system can also power down a domain where GPTimer register located. To ensure the GPTimer driver can continue work after sleep, we can either backup the GPTimer registers to the RAM, or just refuse to power down. You can choose what to do in :cpp:member:`gptimer_config_t::backup_before_sleep`. It's a balance between power saving and memory consumption. Set it based on your application requirements.
+    Besides the potential changes to the clock source, when the power management is enabled, the system can also power down the GPTimer hardware before sleep. Set the :cpp:member:`gptimer_config_t::allow_pd` to ``true`` to enable the power down feature. GPTimer registers will be backed up before sleep and restored after wake up. Please note, enabling this option will increase the memory consumption.

 .. _gptimer-iram-safe:

--- a/docs/zh_CN/api-reference/peripherals/gptimer.rst
+++ b/docs/zh_CN/api-reference/peripherals/gptimer.rst
@ -48,7 +48,7 @@
 - :cpp:member:`gptimer_config_t::direction` 设置定时器的计数方向，:cpp:type:`gptimer_count_direction_t` 中列出多个支持的方向，仅可选择其中一个方向。
 - :cpp:member:`gptimer_config_t::resolution_hz` 设置内部计数器的分辨率。计数器每滴答一次相当于 **1 / resolution_hz** 秒。
 - :cpp:member:`gptimer_config::intr_priority` 设置中断的优先级。如果设置为 ``0``，则会分配一个默认优先级的中断，否则会使用指定的优先级。
- :cpp:member:`gptimer_config::backup_before_sleep` 用于使能在进入睡眠模式前备份 GPTimer 寄存器。这个选项需要用户在功耗和内存使用之间取得平衡。如果功耗不是一个问题，可以禁用这个选项来节省内存。但如果想要节省功耗，应该使能这个选项，在进入睡眠模式前备份 GPTimer 寄存器，并在唤醒后恢复它们。这个功能依赖于特定的硬件模块，如果你在不支持的芯片上启用它，你会得到一个错误信息，如 ``register back up is not supported``。
+- :cpp:member:`gptimer_config::allow_pd` 配置驱动程序是否允许系统在睡眠模式下关闭外设电源。在进入睡眠之前，系统将备份 GPTimer 寄存器上下文，当系统退出睡眠模式时，这些上下文将被恢复。关闭外设可以节省更多功耗，但代价是消耗更多内存来保存寄存器上下文。你需要在功耗和内存消耗之间做权衡。此配置选项依赖于特定的硬件功能，如果在不支持的芯片上启用它，你将看到类似 ``not able to power down in light sleep`` 的错误消息。
 - 可选地， :cpp:member:`gptimer_config_t::intr_shared` 设置是否将定时器中断源标记为共享源。了解共享中断的优缺点，请参考 :doc:`Interrupt Handling <../../api-reference/system/intr_alloc>`。

 完成上述结构配置之后，可以将结构传递给 :cpp:func:`gptimer_new_timer`，用以实例化定时器实例并返回定时器句柄。
@ -289,7 +289,7 @@

 .. only:: SOC_TIMER_SUPPORT_SLEEP_RETENTION

-    除了时钟源的潜在变化外，当启用电源管理时，系统还可以关闭 GPTimer 寄存器所在的电源域。为确保 GPTimer 驱动程序在睡眠后继续工作，用户要么选择将 GPTimer 相关的寄存器备份到 RAM 中，要么拒绝关闭电源域。你可以根据应用需求在 :cpp:member:`gptimer_config_t::backup_before_sleep` 中设置是否需要启用寄存器备份，在功耗和内存使用之间做权衡。
+    除了时钟源的潜在变化外，当启用电源管理时，系统还可以在睡眠前关闭 GPTimer 电源。将 :cpp:member:`gptimer_config_t::allow_pd` 设置为 ``true`` 以启用电源关闭功能。GPTimer 寄存器将在睡眠前备份，并在唤醒后恢复。请注意，启用此选项会增加内存消耗。

 .. _gptimer-iram-safe: