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test(cache): cache panic test app
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@ -1,5 +1,9 @@
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# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
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components/esp_system/test_apps/cache_panic:
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depends_components:
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- spi_flash # esp_system is included by default
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components/esp_system/test_apps/console:
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disable:
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- if: CONFIG_NAME == "serial_jtag_only" and SOC_USB_SERIAL_JTAG_SUPPORTED != 1
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# This is the project CMakeLists.txt file for the test subproject
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cmake_minimum_required(VERSION 3.16)
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# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
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set(COMPONENTS main)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(cache_panic)
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components/esp_system/test_apps/cache_panic/README.md
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2
components/esp_system/test_apps/cache_panic/README.md
Normal file
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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set(srcs "test_cache_disabled.c"
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"test_app_main.c")
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idf_component_register(SRCS ${srcs}
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PRIV_REQUIRES unity spi_flash
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WHOLE_ARCHIVE)
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "unity.h"
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#include "unity_test_runner.h"
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#include "esp_heap_caps.h"
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#define TEST_MEMORY_LEAK_THRESHOLD (-200)
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static size_t before_free_8bit;
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static size_t before_free_32bit;
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static void check_leak(size_t before_free, size_t after_free, const char *type)
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{
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ssize_t delta = after_free - before_free;
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printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta);
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TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak");
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}
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void setUp(void)
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{
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before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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}
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void tearDown(void)
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{
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size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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check_leak(before_free_8bit, after_free_8bit, "8BIT");
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check_leak(before_free_32bit, after_free_32bit, "32BIT");
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}
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void app_main(void)
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{
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// _____ _ _____ _ _______ _
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// / ____| | | | __ \ (_) |__ __| | |
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// | | __ _ ___| |__ ___ | |__) |_ _ _ __ _ ___ | | ___ ___| |_
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// | | / _` |/ __| '_ \ / _ \ | ___/ _` | '_ \| |/ __| | |/ _ \/ __| __|
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// | |___| (_| | (__| | | | __/ | | | (_| | | | | | (__ | | __/\__ \ |_
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// \_____\__,_|\___|_| |_|\___| |_| \__,_|_| |_|_|\___| |_|\___||___/\__|
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printf(" _____ _ _____ _ _______ _\n");
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printf(" / ____| | | | __ \\ (_) |__ __| | |\n");
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printf(" | | __ _ ___| |__ ___ | |__) |_ _ _ __ _ ___ | | ___ ___| |_\n");
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printf(" | | / _` |/ __| '_ \\ / _ \\ | ___/ _` | '_ \\| |/ __| | |/ _ \\/ __| __|\n");
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printf(" | |___| (_| | (__| | | | __/ | | | (_| | | | | | (__ | | __/\\__ \\ |_\n");
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printf(" \\_____\\__,_|\\___|_| |_|\\___| |_| \\__,_|_| |_|_|\\___| |_|\\___||___/\\__|\n");
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unity_run_menu();
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}
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@ -8,27 +8,21 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/task.h>
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#include <freertos/semphr.h>
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#include <unity.h>
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#include <spi_flash_mmap.h>
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#include <esp_attr.h>
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#include <esp_flash_encrypt.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "unity.h"
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#include "esp_attr.h"
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#include "esp_memory_utils.h"
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#include "esp_private/cache_utils.h"
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//TODO: IDF-6730, migrate this test to test_app
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static QueueHandle_t result_queue;
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static IRAM_ATTR void cache_test_task(void *arg)
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{
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bool do_disable = (bool)arg;
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bool result;
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if(do_disable) {
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if (do_disable) {
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spi_flash_disable_interrupts_caches_and_other_cpu();
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}
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result = spi_flash_cache_enabled();
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@ -36,7 +30,7 @@ static IRAM_ATTR void cache_test_task(void *arg)
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spi_flash_enable_interrupts_caches_and_other_cpu();
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}
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TEST_ASSERT( xQueueSendToBack(result_queue, &result, 0) );
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TEST_ASSERT(xQueueSendToBack(result_queue, &result, 0));
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vTaskDelete(NULL);
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}
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@ -44,16 +38,16 @@ TEST_CASE("spi_flash_cache_enabled() works on both CPUs", "[spi_flash][esp_flash
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{
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result_queue = xQueueCreate(1, sizeof(bool));
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for(int cpu = 0; cpu < CONFIG_FREERTOS_NUMBER_OF_CORES; cpu++) {
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for(int disable = 0; disable <= 1; disable++) {
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for (int cpu = 0; cpu < CONFIG_FREERTOS_NUMBER_OF_CORES; cpu++) {
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for (int disable = 0; disable <= 1; disable++) {
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bool do_disable = disable;
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bool result;
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printf("Testing cpu %d disabled %d\n", cpu, do_disable);
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xTaskCreatePinnedToCore(cache_test_task, "cache_check_task",
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2048, (void *)do_disable, configMAX_PRIORITIES-1, NULL, cpu);
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2048, (void *)do_disable, configMAX_PRIORITIES - 1, NULL, cpu);
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TEST_ASSERT( xQueueReceive(result_queue, &result, 2) );
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TEST_ASSERT(xQueueReceive(result_queue, &result, 2));
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TEST_ASSERT_EQUAL(!do_disable, result);
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}
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}
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@ -64,7 +58,6 @@ TEST_CASE("spi_flash_cache_enabled() works on both CPUs", "[spi_flash][esp_flash
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
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// This needs to sufficiently large array, otherwise it may end up in
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// DRAM (e.g. size <= 8 bytes && ARCH == RISCV)
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static const uint32_t s_in_rodata[8] = { 0x12345678, 0xfedcba98 };
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@ -100,13 +93,12 @@ static void IRAM_ATTR cache_access_test_func(void* arg)
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#define CACHE_ERROR_REASON "Cache error,SW_CPU"
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#endif
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// These tests works properly if they resets the chip with the
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// "Cache disabled but cached memory region accessed" reason and the correct CPU is logged.
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static void invalid_access_to_cache_pro_cpu(void)
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{
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xTaskCreatePinnedToCore(&cache_access_test_func, "ia", 2048, NULL, 5, NULL, 0);
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vTaskDelay(1000/portTICK_PERIOD_MS);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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}
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TEST_CASE_MULTIPLE_STAGES("invalid access to cache raises panic (PRO CPU)", "[spi_flash][reset="CACHE_ERROR_REASON"]", invalid_access_to_cache_pro_cpu, reset_after_invalid_cache);
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@ -116,7 +108,7 @@ TEST_CASE_MULTIPLE_STAGES("invalid access to cache raises panic (PRO CPU)", "[sp
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static void invalid_access_to_cache_app_cpu(void)
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{
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xTaskCreatePinnedToCore(&cache_access_test_func, "ia", 2048, NULL, 5, NULL, 1);
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vTaskDelay(1000/portTICK_PERIOD_MS);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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}
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TEST_CASE_MULTIPLE_STAGES("invalid access to cache raises panic (APP CPU)", "[spi_flash][reset="CACHE_ERROR_REASON"]", invalid_access_to_cache_app_cpu, reset_after_invalid_cache);
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: Apache-2.0
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import pytest
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from pytest_embedded import Dut
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@pytest.mark.supported_targets
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@pytest.mark.generic
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def test_cache_panic(dut: Dut) -> None:
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dut.run_all_single_board_cases()
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CONFIG_ESP_TASK_WDT_EN=n
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set(srcs "test_cache_disabled.c"
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"test_out_of_bounds_write.c"
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set(srcs "test_out_of_bounds_write.c"
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"test_read_write.c"
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"test_large_flash_writes.c"
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"test_app_main.c")
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