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Merge branch 'feature/remove_psram_cs_clk_pin_settings_config_s2_s3_v4.4' into 'release/v4.4'
psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3 (v4.4) See merge request espressif/esp-idf!21045
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commit
36dde93b57
@ -143,22 +143,14 @@ menu "ESP32S2-specific"
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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default 0
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menu "PSRAM clock and cs IO for ESP32S2"
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depends on ESP32S2_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
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config SPIRAM_CLK_IO
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int
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default 30
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config SPIRAM_CS_IO
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int
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default 26
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
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endmenu
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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5
components/esp32s2/sdkconfig.rename
Normal file
5
components/esp32s2/sdkconfig.rename
Normal file
@ -0,0 +1,5 @@
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# sdkconfig replacement configurations for deprecated options formatted as
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# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
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CONFIG_DEFAULT_PSRAM_CLK_IO CONFIG_SPIRAM_CLK_IO
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CONFIG_DEFAULT_PSRAM_CS_IO CONFIG_SPIRAM_CS_IO
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@ -213,22 +213,14 @@ menu "ESP32S3-Specific"
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default 33554432 if SPIRAM_TYPE_ESPPSRAM256
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default 0
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menu "PSRAM Clock and CS IO for ESP32S3"
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depends on ESP32S3_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design.
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config SPIRAM_CLK_IO
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int
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default 30
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config SPIRAM_CS_IO
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int
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default 26
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, please refer to your hardware design.
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endmenu
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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5
components/esp32s3/sdkconfig.rename
Normal file
5
components/esp32s3/sdkconfig.rename
Normal file
@ -0,0 +1,5 @@
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# sdkconfig replacement configurations for deprecated options formatted as
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# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
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CONFIG_DEFAULT_PSRAM_CLK_IO CONFIG_SPIRAM_CLK_IO
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CONFIG_DEFAULT_PSRAM_CS_IO CONFIG_SPIRAM_CS_IO
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@ -86,8 +86,8 @@ static const char* TAG = "psram";
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#define FLASH_CLK_IO SPI_CLK_GPIO_NUM
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#define FLASH_CS_IO SPI_CS0_GPIO_NUM
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// PSRAM clock and cs IO should be configured based on hardware design.
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#define PSRAM_CLK_IO CONFIG_DEFAULT_PSRAM_CLK_IO // Default value is 30
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#define PSRAM_CS_IO CONFIG_DEFAULT_PSRAM_CS_IO // Default value is 26
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#define PSRAM_CLK_IO SPI_CLK_GPIO_NUM
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#define PSRAM_CS_IO SPI_CS1_GPIO_NUM
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#define PSRAM_SPIQ_SD0_IO SPI_Q_GPIO_NUM
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#define PSRAM_SPID_SD1_IO SPI_D_GPIO_NUM
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#define PSRAM_SPIWP_SD3_IO SPI_WP_GPIO_NUM
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@ -38,7 +38,7 @@
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#define OCT_PSRAM_ADDR_BITLEN 32
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#define OCT_PSRAM_RD_DUMMY_BITLEN (2*(10-1))
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#define OCT_PSRAM_WR_DUMMY_BITLEN (2*(5-1))
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#define OCT_PSRAM_CS1_IO CONFIG_DEFAULT_PSRAM_CS_IO
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#define OCT_PSRAM_CS1_IO SPI_CS1_GPIO_NUM
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#define OCT_PSRAM_CS_SETUP_TIME 3
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#define OCT_PSRAM_CS_HOLD_TIME 3
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@ -90,8 +90,8 @@ static const char* TAG = "psram";
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#define FLASH_CLK_IO SPI_CLK_GPIO_NUM
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#define FLASH_CS_IO SPI_CS0_GPIO_NUM
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// PSRAM clock and cs IO should be configured based on hardware design.
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#define PSRAM_CLK_IO CONFIG_DEFAULT_PSRAM_CLK_IO // Default value is 30
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#define PSRAM_CS_IO CONFIG_DEFAULT_PSRAM_CS_IO // Default value is 26
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#define PSRAM_CLK_IO SPI_CLK_GPIO_NUM
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#define PSRAM_CS_IO SPI_CS1_GPIO_NUM
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#define PSRAM_SPIQ_SD0_IO SPI_Q_GPIO_NUM
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#define PSRAM_SPID_SD1_IO SPI_D_GPIO_NUM
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#define PSRAM_SPIWP_SD3_IO SPI_WP_GPIO_NUM
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