mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'bugfix/esp_timer_prevents_delay_for_isr_dispatch_callbacks_v5.0' into 'release/v5.0'
fix(esp_timer): Fix delay in ISR dispatch callbacks (v5.0) See merge request espressif/esp-idf!25473
This commit is contained in:
commit
328f592e9d
@ -47,13 +47,11 @@ entries:
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archive: libesp_timer.a
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entries:
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if PM_SLP_IRAM_OPT = y:
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esp_timer_impl_common:esp_timer_impl_lock (noflash)
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esp_timer_impl_common:esp_timer_impl_unlock (noflash)
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if ESP_TIMER_IMPL_TG0_LAC = y:
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esp_timer_impl_lac:esp_timer_impl_lock (noflash)
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esp_timer_impl_lac:esp_timer_impl_unlock (noflash)
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esp_timer_impl_lac:esp_timer_impl_advance (noflash)
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elif ESP_TIMER_IMPL_SYSTIMER = y:
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esp_timer_impl_systimer:esp_timer_impl_lock (noflash)
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esp_timer_impl_systimer:esp_timer_impl_unlock (noflash)
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esp_timer_impl_systimer:esp_timer_impl_advance (noflash)
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[mapping:newlib_pm]
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@ -2,7 +2,8 @@ idf_build_get_property(target IDF_TARGET)
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set(srcs "src/esp_timer.c"
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"src/ets_timer_legacy.c"
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"src/system_time.c")
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"src/system_time.c"
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"src/esp_timer_impl_common.c")
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if(CONFIG_ESP_TIMER_IMPL_TG0_LAC)
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list(APPEND srcs "src/esp_timer_impl_lac.c")
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -142,3 +142,12 @@ uint64_t esp_timer_impl_get_alarm_reg(void);
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*/
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void esp_timer_impl_init_system_time(void);
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#endif
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#if CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
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/**
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* @brief Set the next alarm if there is such an alarm in the cached array.
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*
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* @note Available only when CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is enabled.
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*/
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void esp_timer_impl_try_to_set_next_alarm(void);
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#endif
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@ -489,6 +489,7 @@ static void IRAM_ATTR timer_alarm_handler(void* arg)
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bool isr_timers_processed = false;
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#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
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esp_timer_impl_try_to_set_next_alarm();
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// process timers with ISR dispatch method
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isr_timers_processed = timer_process_alarm(ESP_TIMER_ISR);
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xHigherPriorityTaskWoken = s_isr_dispatch_need_yield;
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70
components/esp_timer/src/esp_timer_impl_common.c
Normal file
70
components/esp_timer/src/esp_timer_impl_common.c
Normal file
@ -0,0 +1,70 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_timer_impl.h"
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#include "esp_timer.h"
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#include "esp_err.h"
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#include "esp_task.h"
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#include "esp_attr.h"
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/* Spinlock used to protect access to the hardware registers. */
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portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
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/* Alarm values to generate interrupt on match
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* [0] - for ESP_TIMER_TASK alarms,
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* [1] - for ESP_TIMER_ISR alarms.
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*/
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uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
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void esp_timer_impl_lock(void)
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{
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portENTER_CRITICAL(&s_time_update_lock);
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}
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void esp_timer_impl_unlock(void)
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{
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portEXIT_CRITICAL(&s_time_update_lock);
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}
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void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
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void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));
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void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
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{
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esp_timer_impl_set_alarm_id(timestamp, 0);
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}
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#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
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void IRAM_ATTR esp_timer_impl_try_to_set_next_alarm(void) {
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portENTER_CRITICAL_ISR(&s_time_update_lock);
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unsigned now_alarm_idx; // ISR is called due to this current alarm
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unsigned next_alarm_idx; // The following alarm after now_alarm_idx
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if (timestamp_id[0] < timestamp_id[1]) {
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now_alarm_idx = 0;
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next_alarm_idx = 1;
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} else {
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now_alarm_idx = 1;
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next_alarm_idx = 0;
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}
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if (timestamp_id[next_alarm_idx] != UINT64_MAX) {
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// The following alarm is valid and can be used.
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// Remove the current alarm from consideration.
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esp_timer_impl_set_alarm_id(UINT64_MAX, now_alarm_idx);
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} else {
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// There is no the following alarm.
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// Remove the current alarm from consideration as well.
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timestamp_id[now_alarm_idx] = UINT64_MAX;
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}
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portEXIT_CRITICAL_ISR(&s_time_update_lock);
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}
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#endif
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/* FIXME: This value is safe for 80MHz APB frequency, should be modified to depend on clock frequency. */
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uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
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{
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return 50;
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -92,18 +92,10 @@ static intr_handle_t s_timer_interrupt_handle;
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static intr_handler_t s_alarm_handler = NULL;
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/* Spinlock used to protect access to the hardware registers. */
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portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
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extern portMUX_TYPE s_time_update_lock;
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void esp_timer_impl_lock(void)
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{
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portENTER_CRITICAL(&s_time_update_lock);
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}
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void esp_timer_impl_unlock(void)
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{
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portEXIT_CRITICAL(&s_time_update_lock);
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}
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/* Alarm values to generate interrupt on match */
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extern uint64_t timestamp_id[2];
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uint64_t IRAM_ATTR esp_timer_impl_get_counter_reg(void)
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{
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@ -145,7 +137,7 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
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void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
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{
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static uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
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assert(alarm_id < sizeof(timestamp_id) / sizeof(timestamp_id[0]));
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portENTER_CRITICAL_SAFE(&s_time_update_lock);
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timestamp_id[alarm_id] = timestamp;
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timestamp = MIN(timestamp_id[0], timestamp_id[1]);
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@ -173,16 +165,12 @@ void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id
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portEXIT_CRITICAL_SAFE(&s_time_update_lock);
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}
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void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
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{
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esp_timer_impl_set_alarm_id(timestamp, 0);
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}
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static void IRAM_ATTR timer_alarm_isr(void *arg)
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{
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/* Clear interrupt status */
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REG_WRITE(INT_CLR_REG, TIMG_LACT_INT_CLR);
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/* Call the upper layer handler */
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/* Call the upper layer handler */
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(*s_alarm_handler)(arg);
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}
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@ -273,12 +261,6 @@ void esp_timer_impl_deinit(void)
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s_timer_interrupt_handle = NULL;
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}
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/* FIXME: This value is safe for 80MHz APB frequency, should be modified to depend on clock frequency. */
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uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
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{
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return 50;
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}
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uint64_t esp_timer_impl_get_alarm_reg(void)
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{
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portENTER_CRITICAL_SAFE(&s_time_update_lock);
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@ -293,5 +275,3 @@ uint64_t esp_timer_impl_get_alarm_reg(void)
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void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us) __attribute__((alias("esp_timer_impl_update_apb_freq")));
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void esp_timer_private_set(uint64_t new_us) __attribute__((alias("esp_timer_impl_set")));
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void esp_timer_private_advance(int64_t time_diff_us) __attribute__((alias("esp_timer_impl_advance")));
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void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
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void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -48,17 +48,10 @@ static intr_handler_t s_alarm_handler = NULL;
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static systimer_hal_context_t systimer_hal;
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/* Spinlock used to protect access to the hardware registers. */
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static portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
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extern portMUX_TYPE s_time_update_lock;
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void esp_timer_impl_lock(void)
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{
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portENTER_CRITICAL(&s_time_update_lock);
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}
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void esp_timer_impl_unlock(void)
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{
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portEXIT_CRITICAL(&s_time_update_lock);
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}
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/* Alarm values to generate interrupt on match */
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extern uint64_t timestamp_id[2];
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uint64_t IRAM_ATTR esp_timer_impl_get_counter_reg(void)
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{
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@ -76,7 +69,7 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
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void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
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{
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static uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
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assert(alarm_id < sizeof(timestamp_id) / sizeof(timestamp_id[0]));
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portENTER_CRITICAL_SAFE(&s_time_update_lock);
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timestamp_id[alarm_id] = timestamp;
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timestamp = MIN(timestamp_id[0], timestamp_id[1]);
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@ -86,11 +79,6 @@ void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id
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portEXIT_CRITICAL_SAFE(&s_time_update_lock);
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}
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void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
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{
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esp_timer_impl_set_alarm_id(timestamp, 0);
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}
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static void IRAM_ATTR timer_alarm_isr(void *arg)
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{
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// clear the interrupt
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@ -200,11 +188,6 @@ void esp_timer_impl_deinit(void)
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s_alarm_handler = NULL;
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}
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uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
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{
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return 50;
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}
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uint64_t esp_timer_impl_get_alarm_reg(void)
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{
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portENTER_CRITICAL_SAFE(&s_time_update_lock);
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@ -216,5 +199,3 @@ uint64_t esp_timer_impl_get_alarm_reg(void)
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void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us) __attribute__((alias("esp_timer_impl_update_apb_freq")));
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void esp_timer_private_set(uint64_t new_us) __attribute__((alias("esp_timer_impl_set")));
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void esp_timer_private_advance(int64_t time_diff_us) __attribute__((alias("esp_timer_impl_advance")));
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void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
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void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));
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@ -1180,4 +1180,73 @@ TEST_CASE("Test ESP_TIMER_ISR, stop API cleans alarm reg if ISR timer list is em
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vSemaphoreDelete(done);
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printf("timer deleted\n");
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}
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volatile uint64_t task_t1;
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volatile uint64_t isr_t1;
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const uint64_t period_task_ms = 200;
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const uint64_t period_isr_ms = 20;
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void task_timer_cb(void *arg) {
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uint64_t t2 = esp_timer_get_time();
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uint64_t dt_task_ms = (t2 - task_t1) / 1000;
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task_t1 = t2;
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printf("task callback, %d msec\n", (int)dt_task_ms);
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vTaskDelay((period_task_ms / 2) / portTICK_PERIOD_MS); // very long callback in timer task
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static bool first_run = true;
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if (first_run) {
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first_run = false;
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} else {
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TEST_ASSERT_INT_WITHIN(period_task_ms / 3, period_task_ms, dt_task_ms);
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}
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}
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void IRAM_ATTR isr_timer_cb(void *arg) {
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uint64_t t2 = esp_timer_get_time();
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uint64_t dt_isr_ms = (t2 - isr_t1) / 1000;
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isr_t1 = t2;
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esp_rom_printf("isr callback, %d msec\n", (int)dt_isr_ms);
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static bool first_run = true;
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if (first_run) {
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first_run = false;
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} else {
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TEST_ASSERT_INT_WITHIN(period_isr_ms / 3, period_isr_ms, dt_isr_ms);
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}
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}
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TEST_CASE("Test ISR dispatch callbacks are not blocked even if TASK callbacks take more time", "[esp_timer][isr_dispatch]")
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{
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esp_timer_handle_t task_timer_handle;
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esp_timer_handle_t isr_timer_handle;
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const esp_timer_create_args_t task_timer_args = {
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.callback = &task_timer_cb,
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.arg = NULL,
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.dispatch_method = ESP_TIMER_TASK,
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.name = "task_timer",
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.skip_unhandled_events = true,
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};
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const esp_timer_create_args_t isr_timer_args = {
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.callback = &isr_timer_cb,
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.arg = NULL,
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.dispatch_method = ESP_TIMER_ISR,
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.name = "isr_timer",
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.skip_unhandled_events = true,
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};
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ESP_ERROR_CHECK(esp_timer_create(&task_timer_args, &task_timer_handle));
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ESP_ERROR_CHECK(esp_timer_create(&isr_timer_args, &isr_timer_handle));
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ESP_ERROR_CHECK(esp_timer_start_periodic(task_timer_handle, period_task_ms * 1000));
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task_t1 = esp_timer_get_time();
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ESP_ERROR_CHECK(esp_timer_start_periodic(isr_timer_handle, period_isr_ms * 1000));
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isr_t1 = esp_timer_get_time();
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vTaskDelay(period_task_ms * 5 / portTICK_PERIOD_MS);
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TEST_ESP_OK(esp_timer_stop(task_timer_handle));
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TEST_ESP_OK(esp_timer_stop(isr_timer_handle));
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TEST_ESP_OK(esp_timer_delete(task_timer_handle));
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TEST_ESP_OK(esp_timer_delete(isr_timer_handle));
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}
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#endif // CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
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