From 9d5a20022baa5ea699f20797842b15f24dad0357 Mon Sep 17 00:00:00 2001 From: YAMAMOTO Takashi Date: Fri, 6 Sep 2024 14:39:24 +0900 Subject: [PATCH] fix(esp32): Fix comment typos --- components/esp_rom/esp32/include/esp32/rom/cache.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_rom/esp32/include/esp32/rom/cache.h b/components/esp_rom/esp32/include/esp32/rom/cache.h index 5b56d7e046..d9017615e6 100644 --- a/components/esp_rom/esp32/include/esp32/rom/cache.h +++ b/components/esp_rom/esp32/include/esp32/rom/cache.h @@ -44,7 +44,7 @@ void mmu_init(int cpu_no); * * @param int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu. * - * @param int pod : process identifier. Range 0~7. + * @param int pid : process identifier. Range 0~7. * * @param unsigned int vaddr : virtual address in CPU address space. * Can be IRam0, IRam1, IRom0 and DRom0 memory address. @@ -87,7 +87,7 @@ static inline __attribute__((always_inline)) unsigned int IRAM_ATTR cache_flash_ * * @param int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu. * - * @param int pod : process identifier. Range 0~7. + * @param int pid : process identifier. Range 0~7. * * @param unsigned int vaddr : virtual address in CPU address space. * Can be IRam0, IRam1, IRom0 and DRom0 memory address.