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feat(adc): add ADC func clock enable function on C5,C6,H2

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This commit is contained in:
gaoxu 2024-07-13 14:06:57 +08:00
parent 65820c07ac
commit 2f49a2e9c8
4 changed files with 39 additions and 0 deletions
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6
components/esp_hw_support/adc_share_hw_ctrl.c
View File

@ -207,6 +207,9 @@ void adc_apb_periph_claim(void)
if (s_adc_digi_ctrlr_cnt == 1) {
ADC_BUS_CLK_ATOMIC() {
adc_ll_enable_bus_clock(true);
#if SOC_RCC_IS_INDEPENDENT
adc_ll_enable_func_clock(true);
#endif
adc_ll_reset_register();
}
}
@ -221,6 +224,9 @@ void adc_apb_periph_free(void)
if (s_adc_digi_ctrlr_cnt == 0) {
ADC_BUS_CLK_ATOMIC() {
adc_ll_enable_bus_clock(false);
#if SOC_RCC_IS_INDEPENDENT
adc_ll_enable_func_clock(false);
#endif
}
} else if (s_adc_digi_ctrlr_cnt < 0) {
portEXIT_CRITICAL(&s_spinlock);

11
components/hal/esp32c5/include/hal/adc_ll.h
View File

@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
PCR.saradc_conf.saradc_reg_clk_en = enable;
}
#if SOC_RCC_IS_INDEPENDENT
/**
* @brief Enable the ADC function clock
* @param enable true to enable, false to disable
*/
static inline void adc_ll_enable_func_clock(bool enable)
{
PCR.saradc_clkm_conf.saradc_clkm_en = enable;
}
#endif
/**
* @brief Reset ADC module
*/

11
components/hal/esp32c6/include/hal/adc_ll.h
View File

@ -565,6 +565,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
PCR.saradc_conf.saradc_reg_clk_en = enable;
}
#if SOC_RCC_IS_INDEPENDENT
/**
* @brief Enable the ADC function clock
* @param enable true to enable, false to disable
*/
static inline void adc_ll_enable_func_clock(bool enable)
{
PCR.saradc_clkm_conf.saradc_clkm_en = enable;
}
#endif
/**
* @brief Reset ADC module
*/

11
components/hal/esp32h2/include/hal/adc_ll.h
View File

@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable)
PCR.saradc_conf.saradc_reg_clk_en = enable;
}
#if SOC_RCC_IS_INDEPENDENT
/**
* @brief Enable the ADC function clock
* @param enable true to enable, false to disable
*/
static inline void adc_ll_enable_func_clock(bool enable)
{
PCR.saradc_clkm_conf.saradc_clkm_en = enable;
}
#endif
/**
* @brief Reset ADC module
*/