docs(c61): add docs build for C61

This commit is contained in:
Marius Vikhammer 2024-05-30 11:19:25 +08:00
parent a946d0cddf
commit 2eb4cd3d84
25 changed files with 1167 additions and 119 deletions

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@ -102,7 +102,7 @@ check_docs_lang_sync:
parallel:
matrix:
- DOCLANG: ["en", "zh_CN"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c5","esp32h2", "esp32p4"]
DOCTGT: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c2", "esp32c6", "esp32c61", "esp32c5","esp32h2", "esp32p4"]
check_docs_gh_links:
image: $ESP_IDF_DOC_ENV_IMAGE

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@ -109,7 +109,7 @@ typedef struct {
*
* @param[in] i2c_slave Handle for I2C slave.
* @param[out] evt_cause I2C capture event cause, fed by driver
* @param[in] user_ctx User data, set in `i2c_slave_register_event_callbacks()`
* @param[in] arg User data, set in `i2c_slave_register_event_callbacks()`
*
* @return Whether a high priority task has been waken up by this function
*/

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@ -0,0 +1,46 @@
choice ESP32C61_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address"
default ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR
help
Configure the number of universally administered (by IEEE) MAC addresses.
During initialization, MAC addresses for each network interface are generated or derived from a
single base MAC address.
If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
receive a universally administered MAC address. These are generated sequentially by adding 0
and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
addresses, respectively.
When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
a custom universal MAC address range, the correct setting will depend on the allocation of MAC
addresses in this range (either 2 or 4 per device.)
Note that ESP32-C6 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac()
API to return a MAC for Ethernet, this can only be used with an external MAC peripheral.
config ESP32C61_UNIVERSAL_MAC_ADDRESSES_TWO
bool "Two"
select ESP_MAC_UNIVERSAL_MAC_ADDRESSES_TWO
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_BT
config ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR
bool "Four"
select ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR
select ESP_MAC_ADDR_UNIVERSE_IEEE802154
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
select ESP_MAC_ADDR_UNIVERSE_BT
select ESP_MAC_ADDR_UNIVERSE_ETH
endchoice
config ESP32C61_UNIVERSAL_MAC_ADDRESSES
int
default 2 if ESP32C61_UNIVERSAL_MAC_ADDRESSES_TWO
default 4 if ESP32C61_UNIVERSAL_MAC_ADDRESSES_FOUR

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@ -4,10 +4,6 @@ if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
if(${target} STREQUAL "esp32c61")
return() # TODO: [ESP32C61] IDF-9268
endif()
set(srcs "src/core_dump_init.c"
"src/core_dump_common.c"
"src/core_dump_flash.c"

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@ -595,10 +595,6 @@ config SOC_SPI_SUPPORT_CONTINUOUS_TRANS
bool
default y
config SOC_SPI_SUPPORT_SLAVE_HD_VER2
bool
default y
config SOC_SPI_SUPPORT_CLK_XTAL
bool
default y
@ -1007,10 +1003,6 @@ config SOC_WIFI_CSI_SUPPORT
bool
default y
config SOC_WIFI_MESH_SUPPORT
bool
default y
config SOC_WIFI_HE_SUPPORT
bool
default y

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@ -17,64 +17,64 @@
#pragma once
/*-------------------------- COMMON CAPS ---------------------------------------*/
// #define SOC_ADC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304
// #define SOC_DEDICATED_GPIO_SUPPORTED 1 //TODO: [ESP32C61] IDF-9321
// \#define SOC_ADC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304
// \#define SOC_DEDICATED_GPIO_SUPPORTED 1 //TODO: [ESP32C61] IDF-9321
#define SOC_UART_SUPPORTED 1 //TODO: [ESP32C61] IDF-9320
// #define SOC_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
// #define SOC_AHB_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
// #define SOC_GPTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9306
// #define SOC_BT_SUPPORTED 1
// #define SOC_IEEE802154_SUPPORTED 1
// #define SOC_ASYNC_MEMCPY_SUPPORTED 1 //TODO: [ESP32C61] IDF-9315
// #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9319
// #define SOC_TEMP_SENSOR_SUPPORTED 1 //TODO: [ESP32C61] IDF-9322
// #define SOC_WIFI_SUPPORTED 1
// \#define SOC_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
// \#define SOC_AHB_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
// \#define SOC_GPTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9306
// \#define SOC_BT_SUPPORTED 1
// \#define SOC_IEEE802154_SUPPORTED 1
// \#define SOC_ASYNC_MEMCPY_SUPPORTED 1 //TODO: [ESP32C61] IDF-9315
// \#define SOC_USB_SERIAL_JTAG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9319
// \#define SOC_TEMP_SENSOR_SUPPORTED 1 //TODO: [ESP32C61] IDF-9322
// \#define SOC_WIFI_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
// #define SOC_ULP_SUPPORTED 1
// \#define SOC_ULP_SUPPORTED 1
#define SOC_EFUSE_KEY_PURPOSE_FIELD 1
#define SOC_EFUSE_SUPPORTED 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_MEM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9274
// #define SOC_I2S_SUPPORTED 1 //TODO: [ESP32C61] IDF-9312, IDF-9313
// #define SOC_GPSPI_SUPPORTED 1 //TODO: [ESP32C61] IDF-9299, IDF-9300, IDF-9301
// #define SOC_LEDC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9291
// #define SOC_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9296, IDF-9297
// \#define SOC_I2S_SUPPORTED 1 //TODO: [ESP32C61] IDF-9312, IDF-9313
// \#define SOC_GPSPI_SUPPORTED 1 //TODO: [ESP32C61] IDF-9299, IDF-9300, IDF-9301
// \#define SOC_LEDC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9291
// \#define SOC_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9296, IDF-9297
#define SOC_SYSTIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9307, IDF-9308
// #define SOC_SUPPORT_COEXISTENCE 1
// #define SOC_MPI_SUPPORTED 1
// #define SOC_SHA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9234
// #define SOC_HMAC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9323
// #define SOC_DIG_SIGN_SUPPORTED 1 //TODO: [ESP32C61] IDF-9325
// #define SOC_ECC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9235
// \#define SOC_SUPPORT_COEXISTENCE 1
// \#define SOC_MPI_SUPPORTED 1
// \#define SOC_SHA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9234
// \#define SOC_HMAC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9323
// \#define SOC_DIG_SIGN_SUPPORTED 1 //TODO: [ESP32C61] IDF-9325
// \#define SOC_ECC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9235
#define SOC_FLASH_ENC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9232
// #define SOC_SECURE_BOOT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9233
// #define SOC_BOD_SUPPORTED 1 //TODO: [ESP32C61] IDF-9254
// #define SOC_APM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9230
// #define SOC_PMU_SUPPORTED 1 //TODO: [ESP32C61] IDf-9250
// #define SOC_LP_TIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9244
// #define SOC_LP_AON_SUPPORTED 1
// #define SOC_LP_PERIPHERALS_SUPPORTED 1
// #define SOC_CLK_TREE_SUPPORTED 1 //TODO: [ESP32C61] IDF-9249
// #define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9270
// #define SOC_WDT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9257
// \#define SOC_SECURE_BOOT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9233
// \#define SOC_BOD_SUPPORTED 1 //TODO: [ESP32C61] IDF-9254
// \#define SOC_APM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9230
// \#define SOC_PMU_SUPPORTED 1 //TODO: [ESP32C61] IDf-9250
// \#define SOC_LP_TIMER_SUPPORTED 1 //TODO: [ESP32C61] IDF-9244
// \#define SOC_LP_AON_SUPPORTED 1
// \#define SOC_LP_PERIPHERALS_SUPPORTED 1
// \#define SOC_CLK_TREE_SUPPORTED 1 //TODO: [ESP32C61] IDF-9249
// \#define SOC_ASSIST_DEBUG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9270
// \#define SOC_WDT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9257
#define SOC_SPI_FLASH_SUPPORTED 1 //TODO: [ESP32C61] IDF-9314
// #define SOC_RNG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9236
// #define SOC_MODEM_CLOCK_SUPPORTED 1
// #define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276
// \#define SOC_RNG_SUPPORTED 1 //TODO: [ESP32C61] IDF-9236
// \#define SOC_MODEM_CLOCK_SUPPORTED 1
// \#define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276
// #define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332
// #define SOC_MCPWM_SUPPORTED 0 //TODO: [ESP32C61] IDF-9338
// #define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336
// #define SOC_ETM_SUPPORTED 0
// #define SOC_PARLIO_SUPPORTED 0 //TODO: [ESP32C61] IDF-9333, 9334
// #define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331
// #define SOC_RMT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9343
// #define SOC_AES_SUPPORTED 0 //TODO: [ESP32C61] IDF-9328
// #define SOC_SDIO_SLAVE_SUPPORTED 0
// #define SOC_PAU_SUPPORTED 0
// #define SOC_LP_I2C_SUPPORTED 0 //TODO: [ESP32C61] IDF-9330, IDF-9337
// #define SOC_ULP_LP_UART_SUPPORTED 0 //TODO: [ESP32C61] IDF-9329, IDF-9341
// #define SOC_PM_SUPPORTED 1
// \#define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332
// \#define SOC_MCPWM_SUPPORTED 0 //TODO: [ESP32C61] IDF-9338
// \#define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336
// \#define SOC_ETM_SUPPORTED 0
// \#define SOC_PARLIO_SUPPORTED 0 //TODO: [ESP32C61] IDF-9333, 9334
// \#define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331
// \#define SOC_RMT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9343
// \#define SOC_AES_SUPPORTED 0 //TODO: [ESP32C61] IDF-9328
// \#define SOC_SDIO_SLAVE_SUPPORTED 0
// \#define SOC_PAU_SUPPORTED 0
// \#define SOC_LP_I2C_SUPPORTED 0 //TODO: [ESP32C61] IDF-9330, IDF-9337
// \#define SOC_ULP_LP_UART_SUPPORTED 0 //TODO: [ESP32C61] IDF-9329, IDF-9341
// \#define SOC_PM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
@ -91,43 +91,43 @@
//TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304
/*-------------------------- ADC CAPS -------------------------------*/
/*!< SAR ADC Module*/
// #define SOC_ADC_DIG_CTRL_SUPPORTED 1
// #define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
// #define SOC_ADC_MONITOR_SUPPORTED 1
// #define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit
// #define SOC_ADC_DMA_SUPPORTED 1
// \#define SOC_ADC_DIG_CTRL_SUPPORTED 1
// \#define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
// \#define SOC_ADC_MONITOR_SUPPORTED 1
// \#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit
// \#define SOC_ADC_DMA_SUPPORTED 1
#define SOC_ADC_PERIPH_NUM (1U)
#define SOC_ADC_MAX_CHANNEL_NUM (7)
// #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7)
// #define SOC_ADC_ATTEN_NUM (4)
// \#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7)
// \#define SOC_ADC_ATTEN_NUM (4)
// /*!< Digital */
// #define SOC_ADC_DIGI_CONTROLLER_NUM (1U)
// #define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */
// #define SOC_ADC_DIGI_MAX_BITWIDTH (12)
// #define SOC_ADC_DIGI_MIN_BITWIDTH (12)
// #define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
// #define SOC_ADC_DIGI_MONITOR_NUM (2)
// #define SOC_ADC_DIGI_RESULT_BYTES (4)
// #define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
// \#define SOC_ADC_DIGI_CONTROLLER_NUM (1U)
// \#define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */
// \#define SOC_ADC_DIGI_MAX_BITWIDTH (12)
// \#define SOC_ADC_DIGI_MIN_BITWIDTH (12)
// \#define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
// \#define SOC_ADC_DIGI_MONITOR_NUM (2)
// \#define SOC_ADC_DIGI_RESULT_BYTES (4)
// \#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
// /*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval <= 4095 */
// #define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
// #define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
// \#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
// \#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
// /*!< RTC */
// #define SOC_ADC_RTC_MIN_BITWIDTH (12)
// #define SOC_ADC_RTC_MAX_BITWIDTH (12)
// \#define SOC_ADC_RTC_MIN_BITWIDTH (12)
// \#define SOC_ADC_RTC_MAX_BITWIDTH (12)
// /*!< Calibration */ // TODO: [ESP32C61] IDF-9303
// #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
// #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
// #define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */
// \#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
// \#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
// \#define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */
/*!< Interrupt */
#define SOC_ADC_TEMPERATURE_SHARE_INTR (1)
/*!< ADC power control is shared by PWDET */
// #define SOC_ADC_SHARED_POWER 1
// \#define SOC_ADC_SHARED_POWER 1
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (0)
@ -169,10 +169,10 @@
//TODO: [ESP32C61] IDF-9310
/*-------------------------- GDMA CAPS -------------------------------------*/
// #define SOC_AHB_GDMA_VERSION 1U
// #define SOC_GDMA_NUM_GROUPS_MAX 1U
// #define SOC_GDMA_PAIRS_PER_GROUP_MAX 3
// #define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule
// \#define SOC_AHB_GDMA_VERSION 1U
// \#define SOC_GDMA_NUM_GROUPS_MAX 1U
// \#define SOC_GDMA_PAIRS_PER_GROUP_MAX 3
// \#define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule
/*-------------------------- ETM CAPS --------------------------------------*/
#define SOC_ETM_GROUPS 1U // Number of ETM groups
@ -182,16 +182,16 @@
// ESP32-C61 has 1 GPIO peripheral
#define SOC_GPIO_PORT 1U
#define SOC_GPIO_PIN_COUNT 22
// #define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 //TODO: [ESP32C61] IDF-9340
// \#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 //TODO: [ESP32C61] IDF-9340
// GPIO peripheral has the ETM extension
// #define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9340
// \#define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9340
// Target has the full LP IO subsystem
// On ESP32-C61, Digital IOs have their own registers to control pullup/down capability, independent of LP registers.
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
// GPIO0~7 on ESP32C61 can support chip deep sleep wakeup
// #define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) //TODO:reopen
// \#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) //TODO:reopen
#define SOC_GPIO_VALID_GPIO_MASK ((1U<<SOC_GPIO_PIN_COUNT) - 1)
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK
@ -210,18 +210,18 @@
#define SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP (1)
// The Clock Out signal is route to the pin by GPIO matrix
// #define SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX (1)
// \#define SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX (1)
#define SOC_GPIO_CLOCKOUT_CHANNEL_NUM (3)
/*-------------------------- RTCIO CAPS --------------------------------------*/
//TODO: [ESP32C61] IDF-9317
// #define SOC_RTCIO_PIN_COUNT 8
// #define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 /* This macro indicates that the target has separate RTC IOMUX hardware feature,
// \#define SOC_RTCIO_PIN_COUNT 8
// \#define SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1 /* This macro indicates that the target has separate RTC IOMUX hardware feature,
// * so it supports unique IOMUX configuration (including IE, OE, PU, PD, DRV etc.)
// * when the pins are switched to RTC function.
// */
// #define SOC_RTCIO_HOLD_SUPPORTED 1
// #define SOC_RTCIO_WAKE_SUPPORTED 1
// \#define SOC_RTCIO_HOLD_SUPPORTED 1
// \#define SOC_RTCIO_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
@ -327,7 +327,7 @@
#define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP (1) ///< Capture timer shares clock with other PWM timers
/*------------------------ USB SERIAL JTAG CAPS ------------------------------*/
// #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395
// \#define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395
/*-------------------------- PARLIO CAPS --------------------------------------*/
#define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */
@ -377,7 +377,7 @@
#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
#define SOC_SPI_SUPPORT_CD_SIG 1
#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1
#define SOC_SPI_SUPPORT_SLAVE_HD_VER2 1
// #define SOC_SPI_SUPPORT_SLAVE_HD_VER2 1 // TODO : [ESP32C61] IDF-9301
#define SOC_SPI_SUPPORT_CLK_XTAL 1
#define SOC_SPI_SUPPORT_CLK_PLL_F80M 1
#define SOC_SPI_SUPPORT_CLK_RC_FAST 1
@ -465,7 +465,7 @@
// ESP32-C61 has 3 UARTs (3 HP UART)
#define SOC_UART_NUM (3)
#define SOC_UART_HP_NUM (3)
// #define SOC_UART_LP_NUM (1U) //TODO: IDF-9341
// \#define SOC_UART_LP_NUM (1U) //TODO: IDF-9341
#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */
#define SOC_LP_UART_FIFO_LEN (16) /*!< The LP UART hardware FIFO length */
#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */
@ -499,13 +499,13 @@
#define SOC_PM_SUPPORT_BT_WAKEUP (1)
#define SOC_PM_SUPPORT_EXT1_WAKEUP (1)
#define SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN (1) /*!<Supports one bit per pin to configure the EXT1 trigger level */
// #define SOC_PM_SUPPORT_CPU_PD (1)
// \#define SOC_PM_SUPPORT_CPU_PD (1)
#define SOC_PM_SUPPORT_MODEM_PD (1)
#define SOC_PM_SUPPORT_XTAL32K_PD (1)
#define SOC_PM_SUPPORT_RC32K_PD (1)
#define SOC_PM_SUPPORT_RC_FAST_PD (1)
#define SOC_PM_SUPPORT_VDDSDIO_PD (1)
// #define SOC_PM_SUPPORT_TOP_PD (1)
// \#define SOC_PM_SUPPORT_TOP_PD (1)
#define SOC_PM_SUPPORT_HP_AON_PD (1)
#define SOC_PM_SUPPORT_MAC_BB_PD (1)
#define SOC_PM_SUPPORT_RTC_PERIPH_PD (1)
@ -517,7 +517,7 @@
#define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */
// #define SOC_PM_CPU_RETENTION_BY_SW (1)
// \#define SOC_PM_CPU_RETENTION_BY_SW (1)
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (0)
#define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)
@ -544,24 +544,24 @@
#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */
#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */
#define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
// #define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */
#define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */
/*---------------------------------- Bluetooth CAPS ----------------------------------*/
// #define SOC_BLE_SUPPORTED (1) /*!< Support Bluetooth Low Energy hardware */
// #define SOC_BLE_MESH_SUPPORTED (1) /*!< Support BLE MESH */
// #define SOC_ESP_NIMBLE_CONTROLLER (1) /*!< Support BLE EMBEDDED controller V1 */
// #define SOC_BLE_50_SUPPORTED (1) /*!< Support Bluetooth 5.0 */
// #define SOC_BLE_DEVICE_PRIVACY_SUPPORTED (1) /*!< Support BLE device privacy mode */
// #define SOC_BLE_POWER_CONTROL_SUPPORTED (1) /*!< Support Bluetooth Power Control */
// #define SOC_BLE_PERIODIC_ADV_ENH_SUPPORTED (1) /*!< Support For BLE Periodic Adv Enhancements */
// #define SOC_BLUFI_SUPPORTED (1) /*!< Support BLUFI */
// #define SOC_BLE_MULTI_CONN_OPTIMIZATION (1) /*!< Support multiple connections optimization */
// \#define SOC_BLE_SUPPORTED (1) /*!< Support Bluetooth Low Energy hardware */
// \#define SOC_BLE_MESH_SUPPORTED (1) /*!< Support BLE MESH */
// \#define SOC_ESP_NIMBLE_CONTROLLER (1) /*!< Support BLE EMBEDDED controller V1 */
// \#define SOC_BLE_50_SUPPORTED (1) /*!< Support Bluetooth 5.0 */
// \#define SOC_BLE_DEVICE_PRIVACY_SUPPORTED (1) /*!< Support BLE device privacy mode */
// \#define SOC_BLE_POWER_CONTROL_SUPPORTED (1) /*!< Support Bluetooth Power Control */
// \#define SOC_BLE_PERIODIC_ADV_ENH_SUPPORTED (1) /*!< Support For BLE Periodic Adv Enhancements */
// \#define SOC_BLUFI_SUPPORTED (1) /*!< Support BLUFI */
// \#define SOC_BLE_MULTI_CONN_OPTIMIZATION (1) /*!< Support multiple connections optimization */
// #define SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND (1)
// \#define SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND (1)
/*------------------------------------- PHY CAPS -------------------------------------*/
#define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BLE and 15.4*/
/*------------------------------------- No Reset CAPS -------------------------------------*/
// #define SOC_CAPS_NO_RESET_BY_ANA_BOD (1) //TODO: [ESP32C61] IDF-9254
// \#define SOC_CAPS_NO_RESET_BY_ANA_BOD (1) //TODO: [ESP32C61] IDF-9254

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@ -216,6 +216,8 @@ ESP32C2_DOCS = ['api-guides/RF_calibration.rst',
ESP32C5_DOCS = ['']
ESP32C61_DOCS = ['']
ESP32C6_DOCS = ['api-guides/RF_calibration.rst',
'api-reference/peripherals/sd_pullup_requirements.rst',
'api-guides/phy.rst']

View File

@ -0,0 +1,389 @@
languages.rst
contribute/esp-idf-tests-with-pytest.rst
contribute/contributor-agreement.rst
contribute/documenting-code.rst
contribute/creating-examples.rst
contribute/style-guide.rst
contribute/copyright-guide.rst
contribute/install-pre-commit-hook.rst
contribute/index.rst
api-guides/core_dump_internals.rst
api-guides/performance/speed.rst
api-guides/performance/size.rst
api-guides/performance/ram-usage.rst
api-guides/performance/index.rst
api-guides/jtag-debugging/debugging-examples.rst
api-guides/jtag-debugging/configure-ft2232h-jtag.rst
api-guides/jtag-debugging/tips-and-quirks.rst
api-guides/jtag-debugging/using-debugger.rst
api-guides/jtag-debugging/building-openocd-macos.rst
api-guides/jtag-debugging/building-openocd-linux.rst
api-guides/jtag-debugging/configure-other-jtag.rst
api-guides/jtag-debugging/building-openocd-windows.rst
api-guides/jtag-debugging/index.rst
api-guides/jtag-debugging/configure-builtin-jtag.rst
api-guides/partition-tables.rst
api-guides/phy.rst
api-guides/app_trace.rst
api-guides/thread-local-storage.rst
api-guides/error-handling.rst
api-guides/tools/idf-tools.rst
api-guides/tools/idf-clang-tidy.rst
api-guides/tools/idf-component-manager.rst
api-guides/tools/idf-py.rst
api-guides/tools/qemu.rst
api-guides/tools/idf-windows-installer.rst
api-guides/tools/idf-monitor.rst
api-guides/tools/idf-docker-image.rst
api-guides/tools/index.rst
api-guides/low-power-mode.rst
api-guides/startup.rst
api-guides/hlinterrupts.rst
api-guides/RF_calibration.rst
api-guides/unit-tests.rst
api-guides/deep-sleep-stub.rst
api-guides/blufi.rst
api-guides/lwip.rst
api-guides/coexist.rst
api-guides/flash_psram_config.rst
api-guides/usb-serial-jtag-console.rst
api-guides/linker-script-generation.rst
api-guides/wifi.rst
api-guides/usb-otg-console.rst
api-guides/bluetooth.rst
api-guides/wireshark-user-guide.rst
api-guides/bootloader.rst
api-guides/esp-wifi-mesh.rst
api-guides/cplusplus.rst
api-guides/build-system.rst
api-guides/core_dump.rst
api-guides/inc/external-ram-esp32-notes.rst
api-guides/inc/linux-host-requirements.rst
api-guides/c.rst
api-guides/dfu.rst
api-guides/current-consumption-measurement-modules.rst
api-guides/esp-ble-mesh/ble-mesh-index.rst
api-guides/esp-ble-mesh/ble-mesh-feature-list.rst
api-guides/esp-ble-mesh/ble-mesh-terminology.rst
api-guides/esp-ble-mesh/ble-mesh-architecture.rst
api-guides/esp-ble-mesh/ble-mesh-faq.rst
api-guides/external-ram.rst
api-guides/reproducible-builds.rst
api-guides/hardware-abstraction.rst
api-guides/wifi-security.rst
api-guides/host-apps.rst
api-guides/index.rst
api-guides/openthread.rst
api-guides/fatal-errors.rst
api-guides/memory-types.rst
api-guides/general-notes.rst
third-party-tools/platformio.rst
third-party-tools/clion.rst
third-party-tools/visualgdb.rst
COPYRIGHT.rst
libraries-and-frameworks/libs-frameworks.rst
libraries-and-frameworks/index.rst
libraries-and-frameworks/cloud-frameworks.rst
versions.rst
api-reference/api-conventions.rst
api-reference/template.rst
api-reference/provisioning/protocomm.rst
api-reference/provisioning/provisioning.rst
api-reference/provisioning/index.rst
api-reference/provisioning/wifi_provisioning.rst
api-reference/storage/vfs.rst
api-reference/storage/spiffs.rst
api-reference/storage/nvs_encryption.rst
api-reference/storage/wear-levelling.rst
api-reference/storage/fatfs.rst
api-reference/storage/nvs_partition_gen.rst
api-reference/storage/nvs_flash.rst
api-reference/storage/partition.rst
api-reference/storage/sdmmc.rst
api-reference/storage/mass_mfg.rst
api-reference/storage/fatfsgen.rst
api-reference/storage/index.rst
api-reference/storage/nvs_partition_parse.rst
api-reference/peripherals/sdspi_share.rst
api-reference/peripherals/isp.rst
api-reference/peripherals/adc_continuous.rst
api-reference/peripherals/adc_oneshot.rst
api-reference/peripherals/usb_host.rst
api-reference/peripherals/twai.rst
api-reference/peripherals/usb_host/usb_host_notes_arch.rst
api-reference/peripherals/usb_host/usb_host_notes_index.rst
api-reference/peripherals/usb_host/usb_host_notes_dwc_otg.rst
api-reference/peripherals/usb_host/usb_host_notes_usbh.rst
api-reference/peripherals/usb_host/usb_host_notes_design.rst
api-reference/peripherals/hmac.rst
api-reference/peripherals/usb_device.rst
api-reference/peripherals/gpio.rst
api-reference/peripherals/sdspi_host.rst
api-reference/peripherals/dac.rst
api-reference/peripherals/spi_slave.rst
api-reference/peripherals/etm.rst
api-reference/peripherals/i2s.rst
api-reference/peripherals/gptimer.rst
api-reference/peripherals/pcnt.rst
api-reference/peripherals/touch_element.rst
api-reference/peripherals/ppa.rst
api-reference/peripherals/mcpwm.rst
api-reference/peripherals/ana_cmpr.rst
api-reference/peripherals/camera_driver.rst
api-reference/peripherals/ledc.rst
api-reference/peripherals/temp_sensor.rst
api-reference/peripherals/spi_features.rst
api-reference/peripherals/sdio_slave.rst
api-reference/peripherals/clk_tree.rst
api-reference/peripherals/spi_flash/spi_flash_concurrency.rst
api-reference/peripherals/spi_flash/spi_flash_override_driver.rst
api-reference/peripherals/spi_flash/spi_flash_optional_feature.rst
api-reference/peripherals/spi_flash/spi_flash_idf_vs_rom.rst
api-reference/peripherals/spi_flash/index.rst
api-reference/peripherals/sdm.rst
api-reference/peripherals/touch_pad.rst
api-reference/peripherals/lcd/i80_lcd.rst
api-reference/peripherals/lcd/spi_lcd.rst
api-reference/peripherals/lcd/i2c_lcd.rst
api-reference/peripherals/lcd/dsi_lcd.rst
api-reference/peripherals/lcd/index.rst
api-reference/peripherals/lcd/rgb_lcd.rst
api-reference/peripherals/adc_calibration.rst
api-reference/peripherals/spi_slave_hd.rst
api-reference/peripherals/parlio.rst
api-reference/peripherals/ds.rst
api-reference/peripherals/i2c.rst
api-reference/peripherals/dedic_gpio.rst
api-reference/peripherals/sd_pullup_requirements.rst
api-reference/peripherals/spi_master.rst
api-reference/peripherals/index.rst
api-reference/peripherals/sdmmc_host.rst
api-reference/peripherals/uart.rst
api-reference/peripherals/ecdsa.rst
api-reference/peripherals/ldo_regulator.rst
api-reference/peripherals/rmt.rst
api-reference/peripherals/jpeg.rst
api-reference/kconfig.rst
api-reference/network/esp_openthread.rst
api-reference/network/esp_eth.rst
api-reference/network/esp_netif_driver.rst
api-reference/network/esp_dpp.rst
api-reference/network/esp_now.rst
api-reference/network/esp-wifi-mesh.rst
api-reference/network/esp_smartconfig.rst
api-reference/network/esp_nan.rst
api-reference/network/esp_wifi.rst
api-reference/network/index.rst
api-reference/network/esp_netif.rst
api-reference/system/sleep_modes.rst
api-reference/system/mm_sync.rst
api-reference/system/ota.rst
api-reference/system/app_trace.rst
api-reference/system/ulp_macros.rst
api-reference/system/perfmon.rst
api-reference/system/ulp-lp-core.rst
api-reference/system/ulp.rst
api-reference/system/esp_function_with_shared_stack.rst
api-reference/system/efuse.rst
api-reference/system/chip_revision.rst
api-reference/system/ulp_instruction_set.rst
api-reference/system/async_memcpy.rst
api-reference/system/random.rst
api-reference/system/esp_timer.rst
api-reference/system/esp_event.rst
api-reference/system/freertos.rst
api-reference/system/system_time.rst
api-reference/system/log.rst
api-reference/system/soc_caps.rst
api-reference/system/internal-unstable.rst
api-reference/system/app_image_format.rst
api-reference/system/freertos_additions.rst
api-reference/system/himem.rst
api-reference/system/power_management.rst
api-reference/system/mem_alloc.rst
api-reference/system/wdts.rst
api-reference/system/misc_system_api.rst
api-reference/system/bootloader_image_format.rst
api-reference/system/inc/show-efuse-table_ESP32-C61.rst
api-reference/system/inc/espefuse_summary_ESP32-P4.rst
api-reference/system/inc/power_management_esp32.rst
api-reference/system/inc/espefuse_summary_ESP32-H2.rst
api-reference/system/inc/espefuse_summary_ESP32-S2.rst
api-reference/system/inc/power_management_esp32c61.rst
api-reference/system/inc/espefuse_summary_ESP32-C2.rst
api-reference/system/inc/espefuse_summary_ESP32-C3.rst
api-reference/system/inc/show-efuse-table_ESP32-C5.rst
api-reference/system/inc/revisions_ESP32-H2.rst
api-reference/system/inc/revisions_ESP32-C6.rst
api-reference/system/inc/revisions_ESP32-S3.rst
api-reference/system/inc/show-efuse-table_ESP32-C6.rst
api-reference/system/inc/show-efuse-table_ESP32-H2.rst
api-reference/system/inc/revisions_ESP32-C5.rst
api-reference/system/inc/power_management_esp32c6.rst
api-reference/system/inc/revisions_ESP32-C3.rst
api-reference/system/inc/show-efuse-table_ESP32-S3.rst
api-reference/system/inc/power_management_esp32c3.rst
api-reference/system/inc/revisions_ESP32.rst
api-reference/system/inc/power_management_esp32p4.rst
api-reference/system/inc/espefuse_summary_ESP32-C5.rst
api-reference/system/inc/power_management_esp32h2.rst
api-reference/system/inc/show-efuse-table_ESP32-C3.rst
api-reference/system/inc/power_management_esp32c5.rst
api-reference/system/inc/espefuse_summary_ESP32.rst
api-reference/system/inc/show-efuse-table_ESP32-P4.rst
api-reference/system/inc/espefuse_summary_ESP32-C61.rst
api-reference/system/inc/power_management_esp32s2.rst
api-reference/system/inc/espefuse_summary_ESP32-S3.rst
api-reference/system/inc/revisions_ESP32-C2.rst
api-reference/system/inc/revisions_ESP32-S2.rst
api-reference/system/inc/revisions_ESP32-P4.rst
api-reference/system/inc/espefuse_summary_ESP32-C6.rst
api-reference/system/inc/show-efuse-table_ESP32.rst
api-reference/system/inc/power_management_esp32s3.rst
api-reference/system/inc/show-efuse-table_ESP32-C2.rst
api-reference/system/inc/power_management_esp32c2.rst
api-reference/system/inc/show-efuse-table_ESP32-S2.rst
api-reference/system/heap_debug.rst
api-reference/system/mm.rst
api-reference/system/ipc.rst
api-reference/system/esp_https_ota.rst
api-reference/system/ulp-risc-v.rst
api-reference/system/esp_err.rst
api-reference/system/freertos_idf.rst
api-reference/system/console.rst
api-reference/system/intr_alloc.rst
api-reference/system/index.rst
api-reference/system/pthread.rst
api-reference/bluetooth/esp_spp.rst
api-reference/bluetooth/esp_l2cap_bt.rst
api-reference/bluetooth/esp_hidd.rst
api-reference/bluetooth/esp_avrc.rst
api-reference/bluetooth/controller_vhci.rst
api-reference/bluetooth/esp_bt_defs.rst
api-reference/bluetooth/esp_hf_ag.rst
api-reference/bluetooth/esp_bt_main.rst
api-reference/bluetooth/esp_bt_device.rst
api-reference/bluetooth/esp_hidh.rst
api-reference/bluetooth/esp_gatts.rst
api-reference/bluetooth/esp_gattc.rst
api-reference/bluetooth/esp_sdp.rst
api-reference/bluetooth/bt_common.rst
api-reference/bluetooth/nimble/index.rst
api-reference/bluetooth/esp_hf_client.rst
api-reference/bluetooth/esp_a2dp.rst
api-reference/bluetooth/esp_blufi.rst
api-reference/bluetooth/bt_le.rst
api-reference/bluetooth/esp_hf_defs.rst
api-reference/bluetooth/esp_gap_bt.rst
api-reference/bluetooth/esp_gatt_defs.rst
api-reference/bluetooth/esp-ble-mesh.rst
api-reference/bluetooth/index.rst
api-reference/bluetooth/esp_gap_ble.rst
api-reference/bluetooth/classic_bt.rst
api-reference/error-codes.rst
api-reference/index.rst
api-reference/protocols/icmp_echo.rst
api-reference/protocols/esp_serial_slave_link.rst
api-reference/protocols/mqtt.rst
api-reference/protocols/mbedtls.rst
api-reference/protocols/esp_http_server.rst
api-reference/protocols/esp_sdio_slave_protocol.rst
api-reference/protocols/esp_local_ctrl.rst
api-reference/protocols/esp_crt_bundle.rst
api-reference/protocols/esp_http_client.rst
api-reference/protocols/esp_https_server.rst
api-reference/protocols/esp_spi_slave_protocol.rst
api-reference/protocols/modbus.rst
api-reference/protocols/esp_tls.rst
api-reference/protocols/mdns.rst
api-reference/protocols/index.rst
api-reference/protocols/asio.rst
security/host-based-security-workflows.rst
security/flash-encryption.rst
security/security.rst
security/secure-boot-v2.rst
security/secure-boot-v1.rst
security/index.rst
about.rst
resources.rst
migration-guides/release-5.x/5.4/index.rst
migration-guides/release-5.x/5.4/system.rst
migration-guides/release-5.x/5.2/ieee802154.rst
migration-guides/release-5.x/5.2/gcc.rst
migration-guides/release-5.x/5.2/protocols.rst
migration-guides/release-5.x/5.2/wifi.rst
migration-guides/release-5.x/5.2/storage.rst
migration-guides/release-5.x/5.2/index.rst
migration-guides/release-5.x/5.2/system.rst
migration-guides/release-5.x/5.2/peripherals.rst
migration-guides/release-5.x/5.3/bluetooth-classic.rst
migration-guides/release-5.x/5.3/security.rst
migration-guides/release-5.x/5.3/gcc.rst
migration-guides/release-5.x/5.3/protocols.rst
migration-guides/release-5.x/5.3/storage.rst
migration-guides/release-5.x/5.3/index.rst
migration-guides/release-5.x/5.3/system.rst
migration-guides/release-5.x/5.3/peripherals.rst
migration-guides/release-5.x/5.1/ieee802154.rst
migration-guides/release-5.x/5.1/gcc.rst
migration-guides/release-5.x/5.1/networking.rst
migration-guides/release-5.x/5.1/storage.rst
migration-guides/release-5.x/5.1/index.rst
migration-guides/release-5.x/5.1/system.rst
migration-guides/release-5.x/5.1/peripherals.rst
migration-guides/release-5.x/5.0/bluetooth-classic.rst
migration-guides/release-5.x/5.0/gcc.rst
migration-guides/release-5.x/5.0/bluetooth-low-energy.rst
migration-guides/release-5.x/5.0/removed-components.rst
migration-guides/release-5.x/5.0/protocols.rst
migration-guides/release-5.x/5.0/networking.rst
migration-guides/release-5.x/5.0/provisioning.rst
migration-guides/release-5.x/5.0/build-system.rst
migration-guides/release-5.x/5.0/storage.rst
migration-guides/release-5.x/5.0/index.rst
migration-guides/release-5.x/5.0/system.rst
migration-guides/release-5.x/5.0/tools.rst
migration-guides/release-5.x/5.0/peripherals.rst
migration-guides/index.rst
get-started/establish-serial-connection.rst
get-started/linux-macos-setup.rst
get-started/linux-macos-start-project.rst
get-started/windows-setup.rst
get-started/start-project.rst
get-started/flashing-troubleshooting.rst
get-started/windows-start-project.rst
get-started/index.rst
get-started/windows-setup-update.rst
404.rst
index.rst
hw-reference/esp32s2/user-guide-esp-lyrap-lcd32-v1.2.rst
hw-reference/esp32s2/user-guide-devkitm-1-v1.rst
hw-reference/esp32s2/user-guide-esp-lyrap-cam-v1.0.rst
hw-reference/esp32s2/user-guide-esp-lyrap-cam-v1.1.rst
hw-reference/esp32s2/user-guide-esp-lyrap-toucha-v1.1.rst
hw-reference/esp32s2/user-guide-esp32-s2-kaluga-1-kit-v1.2.rst
hw-reference/esp32s2/user-guide-esp32-s2-kaluga-1-kit.rst
hw-reference/esp32s2/user-guide-s2-devkitc-1.rst
hw-reference/esp32s2/user-guide-saola-1-v1.2.rst
hw-reference/esp32s2/user-guide-esp-lyrap-lcd32-v1.1.rst
hw-reference/esp32s2/user-guide-esp-lyrat-8311a_v1.2.rst
hw-reference/esp32s2/user-guide-esp-lyrat-8311a_v1.3.rst
hw-reference/esp32s3/user-guide-devkitc-1.rst
hw-reference/esp32s3/user-guide-devkitm-1.rst
hw-reference/esp32s3/user-guide-devkitc-1-v1.0.rst
hw-reference/esp32c3/user-guide-devkitm-1.rst
hw-reference/esp32c3/user-guide-devkitc-02.rst
hw-reference/index.rst
hw-reference/esp32/get-started-ethernet-kit-v1.1.rst
hw-reference/esp32/get-started-wrover-kit.rst
hw-reference/esp32/get-started-devkitc-v2.rst
hw-reference/esp32/get-started-ethernet-kit.rst
hw-reference/esp32/get-started-ethernet-kit-v1.0.rst
hw-reference/esp32/get-started-pico-devkitm-2.rst
hw-reference/esp32/get-started-devkitc.rst
hw-reference/esp32/user-guide-devkitm-1.rst
hw-reference/esp32/get-started-pico-kit-1.rst
hw-reference/esp32/get-started-pico-kit-v3.rst
hw-reference/esp32/get-started-wrover-kit-v2.rst
hw-reference/esp32/get-started-pico-kit.rst
hw-reference/esp32/get-started-wrover-kit-v3.rst

View File

@ -0,0 +1,7 @@
INPUT += \
$(PROJECT_PATH)/components/esp_wifi/include/esp_wifi_he_types.h \
$(PROJECT_PATH)/components/esp_wifi/include/esp_wifi_he.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/clk_tree_defs.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/gpio_num.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/soc_caps.h \
$(PROJECT_PATH)/components/soc/$(IDF_TARGET)/include/soc/uart_channel.h \

View File

@ -34,7 +34,7 @@ API Guides
partition-tables
performance/index
reproducible-builds
:(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5: RF_calibration
:(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5 and not esp32c61: RF_calibration
thread-local-storage
tools/index
unit-tests

View File

@ -0,0 +1,173 @@
.. This file gets included from other .rst files in this folder.
.. It contains target-specific snippets.
.. Comments and '---' lines act as delimiters.
..
.. This is necessary mainly because RST doesn't support substitutions
.. (defined in RST, not in Python) inside code blocks. If that is ever implemented,
.. These code blocks can be moved back to the main .rst files, with target-specific
.. file names being replaced by substitutions.
.. run-openocd
::
openocd -f board/esp32c61-builtin.cfg
.. |run-openocd-device-name| replace:: ESP32-C61 through built-in USB connection
---
.. run-openocd-output
::
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c61-builtin.cfg
Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
Warn : Transport "jtag" was already selected
WARNING: ESP flash support is disabled!
force hard breakpoints
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C)
Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255
Info : clock speed 24000 kHz
Info : JTAG tap: esp32c61.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0)
Info : datacount=2 progbufsize=16
Info : Examined RISC-V core; found 2 harts
Info : hart 0: XLEN=32, misa=0x40903105
Info : starting gdb server for esp32c61 on 3333
Info : Listening on port 3333 for gdb connections
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c61-builtin.cfg``
---
.. run-openocd-upload
::
openocd -f board/esp32c61-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
---
.. run-openocd-src-linux
.. code-block:: bash
src/openocd -f board/esp32c61-builtin.cfg
---
.. run-openocd-src-win
.. code-block:: batch
src\openocd -f board/esp32c61-builtin.cfg
---
.. idf-py-openocd-default-cfg
.. |idf-py-def-cfg| replace:: ``-f board/esp32c61-builtin.cfg``
---
.. run-openocd-appimage-offset
::
openocd -f board/esp32c61-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
---
.. openocd-cfg-files
.. list-table:: OpenOCD configuration files for ESP32-C61
:widths: 25 75
:header-rows: 1
* - Name
- Description
* - ``board/esp32c61-builtin.cfg``
- Board configuration file for ESP32-C61 through built-in USB, includes target and adapter configuration.
* - ``board/esp32c61-ftdi.cfg``
- Board configuration file for ESP32-C61 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
* - ``target/esp32c61.cfg``
- ESP32-C61 target configuration file. Can be used together with one of the ``interface/`` configuration files.
* - ``interface/esp_usb_jtag.cfg``
- JTAG adapter configuration file for ESP32-C61.
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- JTAG adapter configuration file for ESP-Prog boards.
---
.. openocd-target-specific-config-vars
---
---
.. jtag-pins
.. list-table:: ESP32-C61 pins and JTAG signals
:widths: 25 75
:header-rows: 1
* - ESP32-C61 Pin
- JTAG Signal
* - MTDO / GPIO7
- TDO
* - MTDI / GPIO5
- TDI
* - MTCK / GPIO6
- TCK
* - MTMS / GPIO4
- TMS
.. |jtag-sel-gpio| replace:: GPIO15
.. |jtag-gpio-list| replace:: GPIO4-GPIO7
---
.. run-openocd-d3
::
openocd -l openocd_log.txt -d3 -f board/esp32c61-builtin.cfg
---
.. run-openocd-d3-tee
::
openocd -d3 -f board/esp32c61-builtin.cfg 2>&1 | tee openocd.log
---
.. run-gdb-remotelog
::
riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" <all other options>
---
.. devkit-defs
.. |devkit-name| replace:: ESP32-C61
.. |devkit-name-with-link| replace:: :doc:`ESP32-C61 <../../hw-reference/index>`
---
.. devkit-hw-config
* Out of the box, ESP32-C61 doesn't need any additional hardware configuration for JTAG debugging.
---

View File

@ -89,7 +89,7 @@ The ESP-IDF bootloader ignores any partition types other than ``app`` (0x00) and
SubType
~~~~~~~
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5="NOT UPDATED YET"}
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5, esp32c61="NOT UPDATED YET"}
The 8-bit SubType field is specific to a given partition type. ESP-IDF currently only specifies the meaning of the subtype field for ``app`` and ``data`` partition types.

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@ -0,0 +1,10 @@
.. code-block:: none
...
To get a dump for all eFuse registers.
.. code-block:: none
...

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@ -0,0 +1,19 @@
+---------------+---------------------------------------+-------------------------------------+
| Max CPU | Lock Acquisition | CPU and APB Frequencies |
| Frequency Set | | |
+---------------+---------------------------------------+-------------------------------------+
| 160 | ``ESP_PM_CPU_FREQ_MAX`` acquired | | CPU: 160 MHz |
| | | | APB: 80 MHz |
+ +---------------------------------------+-------------------------------------+
| | ``ESP_PM_APB_FREQ_MAX`` acquired, | | CPU: 80 MHz |
| | ``ESP_PM_CPU_FREQ_MAX`` not acquired | | APB: 80 MHz |
+ +---------------------------------------+-------------------------------------+
| | None | Min values for both frequencies set |
| | | with :cpp:func:`esp_pm_configure` |
+---------------+---------------------------------------+-------------------------------------+
| 80 | | Any of ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 80 MHz |
| | | or ``ESP_PM_APB_FREQ_MAX`` acquired | | APB: 80 MHz |
+ +---------------------------------------+-------------------------------------+
| | None | Min values for both frequencies set |
| | | with :cpp:func:`esp_pm_configure` |
+---------------+---------------------------------------+-------------------------------------+

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@ -0,0 +1,174 @@
.. code-block:: none
$ ./efuse_table_gen.py -t IDF_TARGET_PATH_NAME {IDF_TARGET_PATH_NAME}/esp_efuse_table.csv --info
Max number of bits in BLK 256
Parsing efuse CSV input file esp32c61/esp_efuse_table.csv ...
Verifying efuse table...
Sorted efuse table:
# field_name efuse_block bit_start bit_count
1 WR_DIS EFUSE_BLK0 0 32
2 WR_DIS.RD_DIS EFUSE_BLK0 0 1
3 WR_DIS.CRYPT_DPA_ENABLE EFUSE_BLK0 1 1
4 WR_DIS.SWAP_UART_SDIO_EN EFUSE_BLK0 2 1
5 WR_DIS.DIS_ICACHE EFUSE_BLK0 2 1
6 WR_DIS.DIS_USB_JTAG EFUSE_BLK0 2 1
7 WR_DIS.DIS_DOWNLOAD_ICACHE EFUSE_BLK0 2 1
8 WR_DIS.DIS_USB_SERIAL_JTAG EFUSE_BLK0 2 1
9 WR_DIS.DIS_FORCE_DOWNLOAD EFUSE_BLK0 2 1
10 WR_DIS.DIS_TWAI EFUSE_BLK0 2 1
11 WR_DIS.JTAG_SEL_ENABLE EFUSE_BLK0 2 1
12 WR_DIS.DIS_PAD_JTAG EFUSE_BLK0 2 1
13 WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 2 1
14 WR_DIS.WDT_DELAY_SEL EFUSE_BLK0 3 1
15 WR_DIS.SPI_BOOT_CRYPT_CNT EFUSE_BLK0 4 1
16 WR_DIS.SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 5 1
17 WR_DIS.SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 6 1
18 WR_DIS.SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 7 1
19 WR_DIS.KEY_PURPOSE_0 EFUSE_BLK0 8 1
20 WR_DIS.KEY_PURPOSE_1 EFUSE_BLK0 9 1
21 WR_DIS.KEY_PURPOSE_2 EFUSE_BLK0 10 1
22 WR_DIS.KEY_PURPOSE_3 EFUSE_BLK0 11 1
23 WR_DIS.KEY_PURPOSE_4 EFUSE_BLK0 12 1
24 WR_DIS.KEY_PURPOSE_5 EFUSE_BLK0 13 1
25 WR_DIS.SEC_DPA_LEVEL EFUSE_BLK0 14 1
26 WR_DIS.SECURE_BOOT_EN EFUSE_BLK0 15 1
27 WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 16 1
28 WR_DIS.SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 17 1
29 WR_DIS.FLASH_TPUW EFUSE_BLK0 18 1
30 WR_DIS.DIS_DOWNLOAD_MODE EFUSE_BLK0 18 1
31 WR_DIS.DIS_DIRECT_BOOT EFUSE_BLK0 18 1
32 WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 18 1
33 WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 18 1
34 WR_DIS.ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 18 1
35 WR_DIS.UART_PRINT_CONTROL EFUSE_BLK0 18 1
36 WR_DIS.FORCE_SEND_RESUME EFUSE_BLK0 18 1
37 WR_DIS.SECURE_VERSION EFUSE_BLK0 18 1
38 WR_DIS.SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 19 1
39 WR_DIS.DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 19 1
40 WR_DIS.DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 19 1
41 WR_DIS.BLK1 EFUSE_BLK0 20 1
42 WR_DIS.MAC EFUSE_BLK0 20 1
43 WR_DIS.MAC_EXT EFUSE_BLK0 20 1
44 WR_DIS.WAFER_VERSION_MINOR EFUSE_BLK0 20 1
45 WR_DIS.WAFER_VERSION_MAJOR EFUSE_BLK0 20 1
46 WR_DIS.PKG_VERSION EFUSE_BLK0 20 1
47 WR_DIS.BLK_VERSION_MINOR EFUSE_BLK0 20 1
48 WR_DIS.BLK_VERSION_MAJOR EFUSE_BLK0 20 1
49 WR_DIS.FLASH_CAP EFUSE_BLK0 20 1
50 WR_DIS.FLASH_TEMP EFUSE_BLK0 20 1
51 WR_DIS.FLASH_VENDOR EFUSE_BLK0 20 1
52 WR_DIS.SYS_DATA_PART1 EFUSE_BLK0 21 1
53 WR_DIS.OPTIONAL_UNIQUE_ID EFUSE_BLK0 21 1
54 WR_DIS.BLOCK_USR_DATA EFUSE_BLK0 22 1
55 WR_DIS.CUSTOM_MAC EFUSE_BLK0 22 1
56 WR_DIS.BLOCK_KEY0 EFUSE_BLK0 23 1
57 WR_DIS.BLOCK_KEY1 EFUSE_BLK0 24 1
58 WR_DIS.BLOCK_KEY2 EFUSE_BLK0 25 1
59 WR_DIS.BLOCK_KEY3 EFUSE_BLK0 26 1
60 WR_DIS.BLOCK_KEY4 EFUSE_BLK0 27 1
61 WR_DIS.BLOCK_KEY5 EFUSE_BLK0 28 1
62 WR_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 29 1
63 WR_DIS.USB_EXCHG_PINS EFUSE_BLK0 30 1
64 WR_DIS.VDD_SPI_AS_GPIO EFUSE_BLK0 30 1
65 WR_DIS.SOFT_DIS_JTAG EFUSE_BLK0 31 1
66 RD_DIS EFUSE_BLK0 32 7
67 RD_DIS.BLOCK_KEY0 EFUSE_BLK0 32 1
68 RD_DIS.BLOCK_KEY1 EFUSE_BLK0 33 1
69 RD_DIS.BLOCK_KEY2 EFUSE_BLK0 34 1
70 RD_DIS.BLOCK_KEY3 EFUSE_BLK0 35 1
71 RD_DIS.BLOCK_KEY4 EFUSE_BLK0 36 1
72 RD_DIS.BLOCK_KEY5 EFUSE_BLK0 37 1
73 RD_DIS.BLOCK_SYS_DATA2 EFUSE_BLK0 38 1
74 SWAP_UART_SDIO_EN EFUSE_BLK0 39 1
75 DIS_ICACHE EFUSE_BLK0 40 1
76 DIS_USB_JTAG EFUSE_BLK0 41 1
77 DIS_DOWNLOAD_ICACHE EFUSE_BLK0 42 1
78 DIS_USB_SERIAL_JTAG EFUSE_BLK0 43 1
79 DIS_FORCE_DOWNLOAD EFUSE_BLK0 44 1
80 SPI_DOWNLOAD_MSPI_DIS EFUSE_BLK0 45 1
81 DIS_TWAI EFUSE_BLK0 46 1
82 JTAG_SEL_ENABLE EFUSE_BLK0 47 1
83 SOFT_DIS_JTAG EFUSE_BLK0 48 3
84 DIS_PAD_JTAG EFUSE_BLK0 51 1
85 DIS_DOWNLOAD_MANUAL_ENCRYPT EFUSE_BLK0 52 1
86 USB_EXCHG_PINS EFUSE_BLK0 57 1
87 VDD_SPI_AS_GPIO EFUSE_BLK0 58 1
88 WDT_DELAY_SEL EFUSE_BLK0 80 2
89 SPI_BOOT_CRYPT_CNT EFUSE_BLK0 82 3
90 SECURE_BOOT_KEY_REVOKE0 EFUSE_BLK0 85 1
91 SECURE_BOOT_KEY_REVOKE1 EFUSE_BLK0 86 1
92 SECURE_BOOT_KEY_REVOKE2 EFUSE_BLK0 87 1
93 KEY_PURPOSE_0 EFUSE_BLK0 88 4
94 KEY_PURPOSE_1 EFUSE_BLK0 92 4
95 KEY_PURPOSE_2 EFUSE_BLK0 96 4
96 KEY_PURPOSE_3 EFUSE_BLK0 100 4
97 KEY_PURPOSE_4 EFUSE_BLK0 104 4
98 KEY_PURPOSE_5 EFUSE_BLK0 108 4
99 SEC_DPA_LEVEL EFUSE_BLK0 112 2
100 CRYPT_DPA_ENABLE EFUSE_BLK0 114 1
101 SECURE_BOOT_EN EFUSE_BLK0 116 1
102 SECURE_BOOT_AGGRESSIVE_REVOKE EFUSE_BLK0 117 1
103 FLASH_TPUW EFUSE_BLK0 124 4
104 DIS_DOWNLOAD_MODE EFUSE_BLK0 128 1
105 DIS_DIRECT_BOOT EFUSE_BLK0 129 1
106 DIS_USB_SERIAL_JTAG_ROM_PRINT EFUSE_BLK0 130 1
107 DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE EFUSE_BLK0 132 1
108 ENABLE_SECURITY_DOWNLOAD EFUSE_BLK0 133 1
109 UART_PRINT_CONTROL EFUSE_BLK0 134 2
110 FORCE_SEND_RESUME EFUSE_BLK0 141 1
111 SECURE_VERSION EFUSE_BLK0 142 16
112 SECURE_BOOT_DISABLE_FAST_WAKE EFUSE_BLK0 158 1
113 DISABLE_WAFER_VERSION_MAJOR EFUSE_BLK0 160 1
114 DISABLE_BLK_VERSION_MAJOR EFUSE_BLK0 161 1
115 MAC EFUSE_BLK1 0 8
116 MAC EFUSE_BLK1 8 8
117 MAC EFUSE_BLK1 16 8
118 MAC EFUSE_BLK1 24 8
119 MAC EFUSE_BLK1 32 8
120 MAC EFUSE_BLK1 40 8
121 MAC_EXT EFUSE_BLK1 48 16
122 WAFER_VERSION_MINOR EFUSE_BLK1 114 4
123 WAFER_VERSION_MAJOR EFUSE_BLK1 118 2
124 PKG_VERSION EFUSE_BLK1 120 3
125 BLK_VERSION_MINOR EFUSE_BLK1 123 3
126 BLK_VERSION_MAJOR EFUSE_BLK1 126 2
127 FLASH_CAP EFUSE_BLK1 128 3
128 FLASH_TEMP EFUSE_BLK1 131 2
129 FLASH_VENDOR EFUSE_BLK1 133 3
130 SYS_DATA_PART2 EFUSE_BLK10 0 256
131 OPTIONAL_UNIQUE_ID EFUSE_BLK2 0 128
132 USER_DATA EFUSE_BLK3 0 256
133 USER_DATA.MAC_CUSTOM EFUSE_BLK3 200 48
134 KEY0 EFUSE_BLK4 0 256
135 KEY1 EFUSE_BLK5 0 256
136 KEY2 EFUSE_BLK6 0 256
137 KEY3 EFUSE_BLK7 0 256
138 KEY4 EFUSE_BLK8 0 256
139 KEY5 EFUSE_BLK9 0 256
Used bits in efuse table:
EFUSE_BLK0
[0 31] [0 2] [2 2] ... [30 38] [32 52] [57 58] [80 114] [116 117] [124 130] [132 135] [141 158] [160 161]
EFUSE_BLK1
[0 63] [114 135]
EFUSE_BLK10
[0 255]
EFUSE_BLK2
[0 127]
EFUSE_BLK3
[0 255] [200 247]
EFUSE_BLK4
[0 255]
EFUSE_BLK5
[0 255]
EFUSE_BLK6
[0 255]
EFUSE_BLK7
[0 255]
EFUSE_BLK8
[0 255]
EFUSE_BLK9
[0 255]
Note: Not printed ranges are free for using. (bits in EFUSE_BLK0 are reserved for Espressif)

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@ -0,0 +1,5 @@
.. output_log
.. code-block:: none
...

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@ -0,0 +1,18 @@
.. first_boot_enc
.. code-block:: none
...
------
.. already_en_enc
.. code-block:: none
...
------

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@ -34,7 +34,7 @@ API 指南
partition-tables
performance/index
reproducible-builds
:(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5: RF_calibration
:(SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED) and not esp32c5 and not esp32c61: RF_calibration
thread-local-storage
tools/index
unit-tests

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@ -0,0 +1,173 @@
.. This file gets included from other .rst files in this folder.
.. It contains target-specific snippets.
.. Comments and '---' lines act as delimiters.
..
.. This is necessary mainly because RST doesn't support substitutions
.. (defined in RST, not in Python) inside code blocks. If that is ever implemented,
.. These code blocks can be moved back to the main .rst files, with target-specific
.. file names being replaced by substitutions.
.. run-openocd
::
openocd -f board/esp32c61-builtin.cfg
.. |run-openocd-device-name| replace:: ESP32-C61 through built-in USB connection
---
.. run-openocd-output
::
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c61-builtin.cfg
Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
Warn : Transport "jtag" was already selected
WARNING: ESP flash support is disabled!
force hard breakpoints
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C)
Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255
Info : clock speed 24000 kHz
Info : JTAG tap: esp32c61.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0)
Info : datacount=2 progbufsize=16
Info : Examined RISC-V core; found 2 harts
Info : hart 0: XLEN=32, misa=0x40903105
Info : starting gdb server for esp32c61 on 3333
Info : Listening on port 3333 for gdb connections
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c61-builtin.cfg``
---
.. run-openocd-upload
::
openocd -f board/esp32c61-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
---
.. run-openocd-src-linux
.. code-block:: bash
src/openocd -f board/esp32c61-builtin.cfg
---
.. run-openocd-src-win
.. code-block:: batch
src\openocd -f board/esp32c61-builtin.cfg
---
.. idf-py-openocd-default-cfg
.. |idf-py-def-cfg| replace:: ``-f board/esp32c61-builtin.cfg``
---
.. run-openocd-appimage-offset
::
openocd -f board/esp32c61-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
---
.. openocd-cfg-files
.. list-table:: OpenOCD configuration files for ESP32-C61
:widths: 25 75
:header-rows: 1
* - Name
- Description
* - ``board/esp32c61-builtin.cfg``
- Board configuration file for ESP32-C61 through built-in USB, includes target and adapter configuration.
* - ``board/esp32c61-ftdi.cfg``
- Board configuration file for ESP32-C61 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
* - ``target/esp32c61.cfg``
- ESP32-C61 target configuration file. Can be used together with one of the ``interface/`` configuration files.
* - ``interface/esp_usb_jtag.cfg``
- JTAG adapter configuration file for ESP32-C61.
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
- JTAG adapter configuration file for ESP-Prog boards.
---
.. openocd-target-specific-config-vars
---
---
.. jtag-pins
.. list-table:: ESP32-C61 pins and JTAG signals
:widths: 25 75
:header-rows: 1
* - ESP32-C61 Pin
- JTAG Signal
* - MTDO / GPIO7
- TDO
* - MTDI / GPIO5
- TDI
* - MTCK / GPIO6
- TCK
* - MTMS / GPIO4
- TMS
.. |jtag-sel-gpio| replace:: GPIO15
.. |jtag-gpio-list| replace:: GPIO4-GPIO7
---
.. run-openocd-d3
::
openocd -l openocd_log.txt -d3 -f board/esp32c61-builtin.cfg
---
.. run-openocd-d3-tee
::
openocd -d3 -f board/esp32c61-builtin.cfg 2>&1 | tee openocd.log
---
.. run-gdb-remotelog
::
riscv32-esp-elf-gdb -ex "set remotelogfile gdb_log.txt" <all other options>
---
.. devkit-defs
.. |devkit-name| replace:: ESP32-C61
.. |devkit-name-with-link| replace:: :doc:`ESP32-C61 <../../hw-reference/index>`
---
.. devkit-hw-config
* Out of the box, ESP32-C61 doesn't need any additional hardware configuration for JTAG debugging.
---

View File

@ -89,7 +89,7 @@ Type 字段可以指定为 app (0x00) 或者 data (0x01),也可以直接使用
SubType 字段
~~~~~~~~~~~~
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5 = "NOT UPDATED YET"}
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32p4, esp32c5, esp32c61 = "NOT UPDATED YET"}
SubType 字段长度为 8 bit内容与具体分区 Type 有关。目前esp-idf 仅仅规定了 “app” 和 “data” 两种分区类型的子类型含义。

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@ -0,0 +1 @@
.. include:: ../../../en/api-reference/system/inc/espefuse_summary_ESP32-C61.rst

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@ -0,0 +1,19 @@
+---------------+---------------------------------------+-------------------------------------+
| CPU 最高频率 | 电源管理锁获取情况 | APB 频率和 CPU 频率 |
| | | |
+---------------+---------------------------------------+-------------------------------------+
| 160 | 获取 ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 160 MHz |
| | | | APB: 80 Mhz |
+ +---------------------------------------+-------------------------------------+
| | | 获取 ``ESP_PM_APB_FREQ_MAX``, | | CPU: 80 MHz |
| | | 未获得 ``ESP_PM_CPU_FREQ_MAX`` | | APB: 80 Mhz |
+ +---------------------------------------+-------------------------------------+
| | 无 | 使用 :cpp:func:`esp_pm_configure` |
| | | 为二者设置最小值 |
+---------------+---------------------------------------+-------------------------------------+
| 80 | | 获取 ``ESP_PM_CPU_FREQ_MAX`` | | CPU: 80 MHz |
| | | 或 ``ESP_PM_APB_FREQ_MAX`` | | APB: 80 Mhz |
+ +---------------------------------------+-------------------------------------+
| | 无 | 使用 :cpp:func:`esp_pm_configure` |
| | | 为二者设置最小值 |
+---------------+---------------------------------------+-------------------------------------+

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@ -0,0 +1 @@
.. include:: ../../../en/api-reference/system/inc/show-efuse-table_ESP32-C61.rst

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@ -0,0 +1,5 @@
.. output_log
.. code-block:: none
...

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@ -0,0 +1,18 @@
.. first_boot_enc
.. code-block:: none
...
------
.. already_en_enc
.. code-block:: none
...
------