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example: bringup light sleep example for esp32h2

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This commit is contained in:
Lou Tianhao 2023-05-22 19:14:42 +08:00
parent 2abfeb19c8
commit 2c9a2a76f7
17 changed files with 30 additions and 64 deletions
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1
components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
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@ -86,7 +86,6 @@ static void bootloader_super_wdt_auto_feed(void)
static inline void bootloader_hardware_init(void)
{
// TODO: IDF-6267
/* Enable analog i2c master clock */
SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
}

4
components/driver/ledc/ledc.c
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@ -404,9 +404,7 @@ static uint32_t ledc_auto_clk_divisor(ledc_mode_t speed_mode, int freq_hz, uint3
return ret;
}
#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6267 Remove when H2 light sleep supported
extern void esp_sleep_periph_use_8m(bool use_or_not);
#endif
/**
* @brief Function setting the LEDC timer divisor with the given source clock,
@ -504,9 +502,7 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
ESP_LOGD(LEDC_TAG, "In slow speed mode, global clk set: %d", glb_clk);
/* keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6267 Remove when H2 light sleep supported
esp_sleep_periph_use_8m(glb_clk == LEDC_SLOW_CLK_RC_FAST);
#endif
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);

2
components/driver/test_apps/gpio/main/test_gpio.c
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@ -844,7 +844,6 @@ TEST_CASE("GPIO_USB_DP_pin_pullup_disable_test", "[gpio]")
}
#endif //SOC_USB_SERIAL_JTAG_SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2) // TODO: IDF-6267 Remove when light sleep is supported
// Ignored in CI because it needs manually connect TEST_GPIO_INPUT_LEVEL_LOW_PIN to 3.3v to wake up from light sleep
TEST_CASE("GPIO_light_sleep_wake_up_test", "[gpio][ignore]")
{
@ -861,4 +860,3 @@ TEST_CASE("GPIO_light_sleep_wake_up_test", "[gpio][ignore]")
printf("Waked up from light sleep\n");
TEST_ASSERT(esp_sleep_get_wakeup_cause() == ESP_SLEEP_WAKEUP_GPIO);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(...)

8
components/esp_hw_support/modem_clock.c
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@ -318,7 +318,6 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = src;
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6267
/* The power domain of the low-power clock source required by the modem
* module remains powered on during sleep */
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
@ -335,9 +334,6 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
: ESP_PD_DOMAIN_MAX);
esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
esp_sleep_pd_config(pu_domain, ESP_PD_OPTION_ON);
#else
(void)last_src; // Only for bypass compile warning, delete if IDF-6267 resloved
#endif //!CONFIG_IDF_TARGET_ESP32H2
}
void modem_clock_deselect_lp_clock_source(periph_module_t module)
@ -370,7 +366,6 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = MODEM_CLOCK_LPCLK_SRC_INVALID;
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
#if !CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-6267
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
@ -378,7 +373,4 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
: ESP_PD_DOMAIN_MAX);
esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
#else
(void)last_src; // Only for bypass compile warning, delete if IDF-6267 resloved
#endif //!CONFIG_IDF_TARGET_ESP32H2
}

13
components/esp_hw_support/sleep_modes.c
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@ -83,16 +83,14 @@
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/rtc.h"
#include "hal/lp_timer_hal.h"
#include "esp_private/esp_pmu.h"
#include "esp_private/sleep_sys_periph.h"
#include "esp_private/sleep_clock.h"
#include "hal/gpio_ll.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp_private/sleep_retention.h"
#include "esp32h2/rom/rtc.h"
#include "esp32h2/rom/cache.h"
#include "esp32h2/rom/rtc.h"
#include "soc/extmem_reg.h"
#endif
#if SOC_LP_TIMER_SUPPORTED
#include "hal/lp_timer_hal.h"
#endif
@ -102,6 +100,9 @@
#include "esp_private/sleep_sys_periph.h"
#include "esp_private/sleep_clock.h"
#endif
#if SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG
#include "esp_private/sleep_retention.h"
#endif
// If light sleep time is less than that, don't power down flash
@ -1569,9 +1570,6 @@ esp_err_t esp_sleep_disable_bt_wakeup(void)
esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
{
#if CONFIG_IDF_TARGET_ESP32H2 // TODO: IDF-5645
return ESP_SLEEP_WAKEUP_UNDEFINED;
#else
if (esp_rom_get_reset_reason(0) != RESET_REASON_CORE_DEEP_SLEEP && !s_light_sleep_wakeup) {
return ESP_SLEEP_WAKEUP_UNDEFINED;
}
@ -1625,7 +1623,6 @@ esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
} else {
return ESP_SLEEP_WAKEUP_UNDEFINED;
}
#endif
}
esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain, esp_sleep_pd_option_t option)

7
components/esp_pm/.build-test-rules.yml
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@ -1,7 +0,0 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_pm/test_apps/esp_pm:
disable:
- if: IDF_TARGET in ["esp32h2"]
temporary: true
reason: Not supported yet

5
components/esp_pm/Kconfig
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@ -2,10 +2,7 @@ menu "Power Management"
config PM_ENABLE
bool "Support for power management"
# SMP FreeRTOS currently does not support power management IDF-4997
# ESP32H2 currently does not support power management IDF-6270
# Note. Disabling this option for H2 will also cause all sdkconfig.release test cases run without pm enabled
# ORed with __DOXYGEN__ to pass H2 docs build, need to remove when pm is supported on H2
depends on !FREERTOS_SMP || __DOXYGEN__
depends on !FREERTOS_SMP
default n
help
If enabled, application is compiled with support for power management.

4
components/esp_pm/test_apps/esp_pm/README.md
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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |

2
components/esp_pm/test_apps/esp_pm/main/test_pm.c
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@ -64,6 +64,8 @@ static void switch_freq(int mhz)
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
static const int test_freqs[] = {40, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, 40, 80, 10, 80, 20, 40};
#elif CONFIG_IDF_TARGET_ESP32H2
static const int test_freqs[] = {32, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 64, 48, 32, 64, 48, 8, 64, 48, 16, 32};
#elif CONFIG_IDF_TARGET_ESP32C2
static const int test_freqs[] = {CONFIG_XTAL_FREQ, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ, 80, CONFIG_XTAL_FREQ, 80,
CONFIG_XTAL_FREQ / 2, CONFIG_XTAL_FREQ}; // C2 xtal has 40/26MHz option

13
components/esp_pm/test_apps/esp_pm/pytest_esp_pm.py
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@ -4,14 +4,13 @@
import pytest
from pytest_embedded import Dut
CONFIGS = [
pytest.param('default', marks=[pytest.mark.supported_targets, pytest.mark.temp_skip_ci(targets=['esp32h2'], reason='h2 support TBD')]),
pytest.param('limits', marks=[pytest.mark.supported_targets, pytest.mark.temp_skip_ci(targets=['esp32h2'], reason='h2 support TBD')]),
pytest.param('options', marks=[pytest.mark.supported_targets, pytest.mark.temp_skip_ci(targets=['esp32h2'], reason='h2 support TBD')]),
]
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
@pytest.mark.supported_targets
@pytest.mark.parametrize('config', [
'default',
'limits',
'options',
], indirect=True)
def test_esp_pm(dut: Dut) -> None:
dut.run_all_single_board_cases()

10
components/esp_system/test_apps/esp_system_unity_tests/main/test_sleep.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -41,7 +41,7 @@
__attribute__((unused)) static struct timeval tv_start, tv_stop;
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6, ESP32H2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
static void check_sleep_reset(void)
{
@ -308,7 +308,7 @@ static void check_wake_stub(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
TEST_ASSERT_EQUAL_HEX32((uint32_t) &wake_stub, s_wake_stub_var);
#if !CONFIG_IDF_TARGET_ESP32S3
#if !CONFIG_IDF_TARGET_ESP32S3 && !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2
/* ROM code clears wake stub entry address */
TEST_ASSERT_NULL(esp_get_deep_sleep_wake_stub());
#endif
@ -463,7 +463,7 @@ __attribute__((unused)) static uint32_t get_cause(void)
return wakeup_cause;
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C6, ESP32H2)
// Fails on S2 IDF-2903
// This test case verifies deactivation of trigger for wake up sources
@ -658,4 +658,4 @@ TEST_CASE("wake up using GPIO (2 or 4 low)", "[deepsleep][ignore]")
esp_deep_sleep_start();
}
#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6, ESP32H2) TODO: IDF-6268
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2) TODO: IDF-6268

2
components/hal/esp32h2/include/hal/uart_ll.h
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@ -74,7 +74,7 @@ typedef enum {
UART_INTR_RS485_FRM_ERR = (0x1 << 16),
UART_INTR_RS485_CLASH = (0x1 << 17),
UART_INTR_CMD_CHAR_DET = (0x1 << 18),
// UART_INTR_WAKEUP = (0x1 << 19), // TODO: IDF-6267
UART_INTR_WAKEUP = (0x1 << 19),
} uart_intr_t;
/**

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@ -1047,6 +1047,10 @@ config SOC_UART_SUPPORT_XTAL_CLK
bool
default y
config SOC_UART_SUPPORT_WAKEUP_INT
bool
default y
config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
bool
default y

2
components/soc/esp32h2/include/soc/soc_caps.h
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@ -433,7 +433,7 @@
#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
// #define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */ // TODO: IDF-6267
#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)

6
examples/system/.build-test-rules.yml
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@ -90,12 +90,6 @@ examples/system/ipc/ipc_isr:
temporary: true
reason: the other targets are not tested yet
examples/system/light_sleep:
disable:
- if: IDF_TARGET in ["esp32h2"]
temporary: true
reason: target(s) not supported yet
examples/system/lp_core/lp_i2c:
enable:
- if: SOC_LP_I2C_SUPPORTED == 1

4
examples/system/light_sleep/README.md
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@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
# Light Sleep Example

7
examples/system/light_sleep/pytest_light_sleep.py
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@ -8,12 +8,7 @@ import pytest
from pytest_embedded import Dut
@pytest.mark.esp32
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c3
@pytest.mark.esp32c2
@pytest.mark.esp32c6
@pytest.mark.supported_targets
@pytest.mark.generic
def test_light_sleep(dut: Dut) -> None: