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Mark some interrupts that are now allocated dynamically as free, add int handle param documentation, add local ints test

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This commit is contained in:
Jeroen Domburg 2016-12-08 12:38:22 +08:00
parent 9dc908d105
commit 2c34ab3374
10 changed files with 154 additions and 124 deletions
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2
components/driver/include/driver/gpio.h
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@ -351,6 +351,8 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param arg Parameter for handler function
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
*
* @return
* - ESP_OK Success ;

2
components/driver/include/driver/ledc.h
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@ -265,6 +265,8 @@ esp_err_t ledc_set_fade(ledc_mode_t speed_mode, uint32_t channel, uint32_t duty,
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param arg Parameter for handler function
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
*
* @return
* - ESP_OK Success

2
components/driver/include/driver/pcnt.h
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@ -221,6 +221,8 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
* @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
*
* @return
* - ESP_OK Success

7
components/driver/include/driver/timer.h
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@ -258,12 +258,15 @@ esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_
* @param timer_num Timer index of timer group
* @param fn Interrupt handler function.
* @note
* Code inside the handler function can only call functions in IRAM, so cannot call other timer APIs.
* Use direct register access to access timers from inside the ISR.
* In case the this is called with the INIRAM flag, code inside the handler function can
* only call functions in IRAM, so it cannot call other timer APIs.
* Use direct register access to access timers from inside the ISR in this case.
*
* @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
* be returned here.
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Function pointer error.

12
components/driver/include/driver/uart.h
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@ -379,6 +379,18 @@ esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
*/
esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg, int intr_alloc_flags);
/**
* @brief Free UART interrupt handler registered by uart_isr_register.
*
* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
*
* @return
* - ESP_OK Success
* - ESP_FAIL Parameter error
*/
esp_err_t uart_isr_free(uart_port_t uart_num);
/**
* @brief Set UART pin number
*

13
components/driver/uart.c
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@ -309,6 +309,19 @@ esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg,
return ret;
}
esp_err_t uart_isr_free(uart_port_t uart_num)
{
esp_err_t ret;
UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_FAIL);
if (p_uart_obj[uart_num]->intr_handle==NULL) return ESP_ERR_INVALID_ARG;
UART_ENTER_CRITICAL(&uart_spinlock[uart_num]);
ret=esp_intr_free(p_uart_obj[uart_num]->intr_handle);
p_uart_obj[uart_num]->intr_handle=NULL;
UART_EXIT_CRITICAL(&uart_spinlock[uart_num]);
return ret;
}
//internal signal can be output to multiple GPIO pads
//only one GPIO pad can connect with input signal
esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int rts_io_num, int cts_io_num)

9
components/esp32/include/soc/soc.h
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@ -264,14 +264,14 @@
* Intr num Level Type PRO CPU usage APP CPU uasge
* 0 1 extern level WMAC Reserved
* 1 1 extern level BT/BLE Host VHCI Reserved
* 2 1 extern level FROM_CPU FROM_CPU
* 3 1 extern level TG0_WDT Reserved
* 2 1 extern level
* 3 1 extern level
* 4 1 extern level WBB
* 5 1 extern level BT Controller
* 6 1 timer FreeRTOS Tick(L1) FreeRTOS Tick(L1)
* 7 1 software Reserved Reserved
* 8 1 extern level BLE Controller
* 9 1 extern level EMAC
* 9 1 extern level
* 10 1 extern edge Internal Timer
* 11 3 profiling
* 12 1 extern level
@ -300,10 +300,7 @@
//CPU0 Interrupt number reserved, not touch this.
#define ETS_WMAC_INUM 0
#define ETS_BT_HOST_INUM 1
#define ETS_FROM_CPU_INUM 2
#define ETS_T0_WDT_INUM 3
#define ETS_WBB_INUM 4
#define ETS_EMAC_INUM 9
#define ETS_TG0_T1_INUM 10 /**< use edge interrupt*/
#define ETS_FRC1_INUM 22
#define ETS_T1_WDT_INUM 24

6
components/esp32/intr_alloc.c
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@ -99,8 +99,8 @@ typedef struct {
const static int_desc_t int_desc[32]={
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //0
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //1
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //2
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //3
{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //2
{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //3
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //4
{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //5
{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
@ -602,7 +602,7 @@ esp_err_t esp_intr_free(intr_handle_t handle)
if ((handle->vector_desc->flags&VECDESC_FL_NONSHARED) || free_shared_vector) {
ESP_LOGV(TAG, "esp_intr_free: Disabling int, killing handler");
//Reset to normal handler
xt_set_interrupt_handler(handle->vector_desc->intno, xt_unhandled_interrupt, (void*)handle->vector_desc->intno);
xt_set_interrupt_handler(handle->vector_desc->intno, xt_unhandled_interrupt, (void*)((int)handle->vector_desc->intno));
//Theoretically, we could free the vector_desc... not sure if that's worth the few bytes of memory
//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
//the desc.) For now, just mark it as free.

5
components/esp32/test/test_intr_alloc.c
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@ -1,5 +1,5 @@
/*
Test for multicore FreeRTOS. This test spins up threads, fiddles with queues etc.
Tests for the interrupt allocator.
*/
#include <esp_types.h>
@ -25,9 +25,6 @@
#define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
/*
* @brief timer group0 hardware timer1 init
*/
static void my_timer_init(int timer_group, int timer_idx, int ival)
{
timer_config_t config;

8
examples/13_timer_group/main/timer_group.c
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@ -86,7 +86,9 @@ void IRAM_ATTR timer_group0_isr(void *para)
/*Timer0 is an example that don't reload counter value*/
TIMERG0.hw_timer[timer_idx].update = 1;
/*We don't call a API here because they are not declared with IRAM_ATTR*/
/* We don't call a API here because they are not declared with IRAM_ATTR.
If we're okay with the timer irq not being serviced while SPI flash cache is disabled,
we can alloc this interrupt without the ESP_INTR_FLAG_IRAM flag and use the normal API. */
TIMERG0.int_clr_timers.t0 = 1;
uint64_t timer_val = ((uint64_t) TIMERG0.hw_timer[timer_idx].cnt_high) << 32
| TIMERG0.hw_timer[timer_idx].cnt_low;
@ -155,7 +157,7 @@ void tg0_timer0_init()
/*Enable timer interrupt*/
timer_enable_intr(timer_group, timer_idx);
/*Set ISR handler*/
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, 0);
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM);
/*Start timer counter*/
timer_start(timer_group, timer_idx);
}
@ -185,7 +187,7 @@ void tg0_timer1_init()
/*Enable timer interrupt*/
timer_enable_intr(timer_group, timer_idx);
/*Set ISR handler*/
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, 0);
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM);
/*Start timer counter*/
timer_start(timer_group, timer_idx);
}