mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Mark some interrupts that are now allocated dynamically as free, add int handle param documentation, add local ints test
This commit is contained in:
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9dc908d105
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2c34ab3374
@ -351,6 +351,8 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param arg Parameter for handler function
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* @param arg Parameter for handler function
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* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
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* be returned here.
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*
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*
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* @return
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* @return
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* - ESP_OK Success ;
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* - ESP_OK Success ;
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@ -265,6 +265,8 @@ esp_err_t ledc_set_fade(ledc_mode_t speed_mode, uint32_t channel, uint32_t duty,
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param arg Parameter for handler function
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* @param arg Parameter for handler function
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* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
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* be returned here.
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*
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*
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* @return
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* @return
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* - ESP_OK Success
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* - ESP_OK Success
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@ -221,6 +221,8 @@ esp_err_t pcnt_get_event_value(pcnt_unit_t unit, pcnt_evt_type_t evt_type, int16
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* @param arg Parameter for handler function
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* @param arg Parameter for handler function
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
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* be returned here.
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*
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*
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* @return
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* @return
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* - ESP_OK Success
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* - ESP_OK Success
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@ -258,12 +258,15 @@ esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_
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* @param timer_num Timer index of timer group
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* @param timer_num Timer index of timer group
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* @param fn Interrupt handler function.
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* @param fn Interrupt handler function.
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* @note
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* @note
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* Code inside the handler function can only call functions in IRAM, so cannot call other timer APIs.
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* In case the this is called with the INIRAM flag, code inside the handler function can
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* Use direct register access to access timers from inside the ISR.
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* only call functions in IRAM, so it cannot call other timer APIs.
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* Use direct register access to access timers from inside the ISR in this case.
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*
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*
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* @param arg Parameter for handler function
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* @param arg Parameter for handler function
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will
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* be returned here.
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* @return
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* @return
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* - ESP_OK Success
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Function pointer error.
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* - ESP_ERR_INVALID_ARG Function pointer error.
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@ -379,6 +379,18 @@ esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh);
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*/
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*/
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esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg, int intr_alloc_flags);
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esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg, int intr_alloc_flags);
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/**
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* @brief Free UART interrupt handler registered by uart_isr_register.
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*
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* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
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*
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* @return
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* - ESP_OK Success
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* - ESP_FAIL Parameter error
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*/
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esp_err_t uart_isr_free(uart_port_t uart_num);
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/**
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/**
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* @brief Set UART pin number
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* @brief Set UART pin number
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*
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*
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@ -309,6 +309,19 @@ esp_err_t uart_isr_register(uart_port_t uart_num, void (*fn)(void*), void * arg,
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return ret;
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return ret;
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}
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}
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esp_err_t uart_isr_free(uart_port_t uart_num)
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{
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esp_err_t ret;
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UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_FAIL);
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if (p_uart_obj[uart_num]->intr_handle==NULL) return ESP_ERR_INVALID_ARG;
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UART_ENTER_CRITICAL(&uart_spinlock[uart_num]);
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ret=esp_intr_free(p_uart_obj[uart_num]->intr_handle);
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p_uart_obj[uart_num]->intr_handle=NULL;
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UART_EXIT_CRITICAL(&uart_spinlock[uart_num]);
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return ret;
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}
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//internal signal can be output to multiple GPIO pads
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//internal signal can be output to multiple GPIO pads
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//only one GPIO pad can connect with input signal
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//only one GPIO pad can connect with input signal
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esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int rts_io_num, int cts_io_num)
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esp_err_t uart_set_pin(uart_port_t uart_num, int tx_io_num, int rx_io_num, int rts_io_num, int cts_io_num)
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@ -264,14 +264,14 @@
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* Intr num Level Type PRO CPU usage APP CPU uasge
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* Intr num Level Type PRO CPU usage APP CPU uasge
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* 0 1 extern level WMAC Reserved
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* 0 1 extern level WMAC Reserved
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* 1 1 extern level BT/BLE Host VHCI Reserved
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* 1 1 extern level BT/BLE Host VHCI Reserved
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* 2 1 extern level FROM_CPU FROM_CPU
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* 2 1 extern level
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* 3 1 extern level TG0_WDT Reserved
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* 3 1 extern level
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* 4 1 extern level WBB
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* 4 1 extern level WBB
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* 5 1 extern level BT Controller
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* 5 1 extern level BT Controller
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* 6 1 timer FreeRTOS Tick(L1) FreeRTOS Tick(L1)
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* 6 1 timer FreeRTOS Tick(L1) FreeRTOS Tick(L1)
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* 7 1 software Reserved Reserved
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* 7 1 software Reserved Reserved
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* 8 1 extern level BLE Controller
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* 8 1 extern level BLE Controller
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* 9 1 extern level EMAC
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* 9 1 extern level
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* 10 1 extern edge Internal Timer
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* 10 1 extern edge Internal Timer
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* 11 3 profiling
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* 11 3 profiling
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* 12 1 extern level
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* 12 1 extern level
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@ -300,10 +300,7 @@
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//CPU0 Interrupt number reserved, not touch this.
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//CPU0 Interrupt number reserved, not touch this.
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#define ETS_WMAC_INUM 0
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#define ETS_WMAC_INUM 0
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#define ETS_BT_HOST_INUM 1
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#define ETS_BT_HOST_INUM 1
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#define ETS_FROM_CPU_INUM 2
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#define ETS_T0_WDT_INUM 3
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#define ETS_WBB_INUM 4
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#define ETS_WBB_INUM 4
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#define ETS_EMAC_INUM 9
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#define ETS_TG0_T1_INUM 10 /**< use edge interrupt*/
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#define ETS_TG0_T1_INUM 10 /**< use edge interrupt*/
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#define ETS_FRC1_INUM 22
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#define ETS_FRC1_INUM 22
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#define ETS_T1_WDT_INUM 24
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#define ETS_T1_WDT_INUM 24
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@ -99,8 +99,8 @@ typedef struct {
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const static int_desc_t int_desc[32]={
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const static int_desc_t int_desc[32]={
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //0
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //0
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //1
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //1
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //2
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //2
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_RESVD } }, //3
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{ 1, INTTP_LEVEL, {INTDESC_NORMAL, INTDESC_NORMAL} }, //3
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //4
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //4
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //5
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{ 1, INTTP_LEVEL, {INTDESC_RESVD, INTDESC_NORMAL} }, //5
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{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
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{ 1, INTTP_NA, {INT6RES, INT6RES } }, //6
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@ -602,7 +602,7 @@ esp_err_t esp_intr_free(intr_handle_t handle)
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if ((handle->vector_desc->flags&VECDESC_FL_NONSHARED) || free_shared_vector) {
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if ((handle->vector_desc->flags&VECDESC_FL_NONSHARED) || free_shared_vector) {
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ESP_LOGV(TAG, "esp_intr_free: Disabling int, killing handler");
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ESP_LOGV(TAG, "esp_intr_free: Disabling int, killing handler");
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//Reset to normal handler
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//Reset to normal handler
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xt_set_interrupt_handler(handle->vector_desc->intno, xt_unhandled_interrupt, (void*)handle->vector_desc->intno);
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xt_set_interrupt_handler(handle->vector_desc->intno, xt_unhandled_interrupt, (void*)((int)handle->vector_desc->intno));
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//Theoretically, we could free the vector_desc... not sure if that's worth the few bytes of memory
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//Theoretically, we could free the vector_desc... not sure if that's worth the few bytes of memory
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//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
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//we save.(We can also not use the same exit path for empty shared ints anymore if we delete
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//the desc.) For now, just mark it as free.
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//the desc.) For now, just mark it as free.
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@ -1,5 +1,5 @@
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/*
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/*
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Test for multicore FreeRTOS. This test spins up threads, fiddles with queues etc.
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Tests for the interrupt allocator.
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*/
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*/
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#include <esp_types.h>
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#include <esp_types.h>
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@ -25,9 +25,6 @@
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#define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
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#define TIMER_INTERVAL1_SEC (5.78) /*!< test interval for timer 1 */
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/*
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* @brief timer group0 hardware timer1 init
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*/
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static void my_timer_init(int timer_group, int timer_idx, int ival)
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static void my_timer_init(int timer_group, int timer_idx, int ival)
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{
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{
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timer_config_t config;
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timer_config_t config;
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@ -55,38 +52,38 @@ static volatile int count[4]={0,0,0,0};
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static void timer_isr(void *arg)
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static void timer_isr(void *arg)
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{
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{
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int timer_idx = (int)arg;
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int timer_idx = (int)arg;
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count[timer_idx]++;
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count[timer_idx]++;
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if (timer_idx==0) {
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if (timer_idx==0) {
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TIMERG0.int_clr_timers.t0 = 1;
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TIMERG0.int_clr_timers.t0 = 1;
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TIMERG0.hw_timer[0].update=1;
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TIMERG0.hw_timer[0].update=1;
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TIMERG0.hw_timer[0].config.alarm_en = 1;
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TIMERG0.hw_timer[0].config.alarm_en = 1;
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}
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}
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if (timer_idx==1) {
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if (timer_idx==1) {
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TIMERG0.int_clr_timers.t1 = 1;
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TIMERG0.int_clr_timers.t1 = 1;
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TIMERG0.hw_timer[1].update=1;
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TIMERG0.hw_timer[1].update=1;
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TIMERG0.hw_timer[1].config.alarm_en = 1;
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TIMERG0.hw_timer[1].config.alarm_en = 1;
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}
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}
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if (timer_idx==2) {
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if (timer_idx==2) {
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TIMERG1.int_clr_timers.t0 = 1;
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TIMERG1.int_clr_timers.t0 = 1;
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TIMERG1.hw_timer[0].update=1;
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TIMERG1.hw_timer[0].update=1;
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TIMERG1.hw_timer[0].config.alarm_en = 1;
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TIMERG1.hw_timer[0].config.alarm_en = 1;
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}
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}
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if (timer_idx==3) {
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if (timer_idx==3) {
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TIMERG1.int_clr_timers.t1 = 1;
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TIMERG1.int_clr_timers.t1 = 1;
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TIMERG1.hw_timer[1].update=1;
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TIMERG1.hw_timer[1].update=1;
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TIMERG1.hw_timer[1].config.alarm_en = 1;
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TIMERG1.hw_timer[1].config.alarm_en = 1;
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}
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}
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// ets_printf("int %d\n", timer_idx);
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// ets_printf("int %d\n", timer_idx);
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}
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}
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static void timer_test(int flags) {
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static void timer_test(int flags) {
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int x;
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int x;
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timer_isr_handle_t inth[4];
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timer_isr_handle_t inth[4];
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my_timer_init(TIMER_GROUP_0, TIMER_0, 110000);
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my_timer_init(TIMER_GROUP_0, TIMER_0, 110000);
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my_timer_init(TIMER_GROUP_0, TIMER_1, 120000);
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my_timer_init(TIMER_GROUP_0, TIMER_1, 120000);
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my_timer_init(TIMER_GROUP_1, TIMER_0, 130000);
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my_timer_init(TIMER_GROUP_1, TIMER_0, 130000);
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my_timer_init(TIMER_GROUP_1, TIMER_1, 140000);
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my_timer_init(TIMER_GROUP_1, TIMER_1, 140000);
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timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_isr, (void*)0, flags|ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
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timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_isr, (void*)0, flags|ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
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timer_isr_register(TIMER_GROUP_0, TIMER_1, timer_isr, (void*)1, flags, &inth[1]);
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timer_isr_register(TIMER_GROUP_0, TIMER_1, timer_isr, (void*)1, flags, &inth[1]);
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timer_isr_register(TIMER_GROUP_1, TIMER_0, timer_isr, (void*)2, flags, &inth[2]);
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timer_isr_register(TIMER_GROUP_1, TIMER_0, timer_isr, (void*)2, flags, &inth[2]);
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@ -96,111 +93,111 @@ static void timer_test(int flags) {
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timer_start(TIMER_GROUP_1, TIMER_0);
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timer_start(TIMER_GROUP_1, TIMER_0);
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timer_start(TIMER_GROUP_1, TIMER_1);
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timer_start(TIMER_GROUP_1, TIMER_1);
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for (x=0; x<4; x++) count[x]=0;
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for (x=0; x<4; x++) count[x]=0;
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printf("Interrupts allocated: %d (dis) %d %d %d\n",
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printf("Interrupts allocated: %d (dis) %d %d %d\n",
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esp_intr_get_intno(inth[0]), esp_intr_get_intno(inth[1]),
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esp_intr_get_intno(inth[0]), esp_intr_get_intno(inth[1]),
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esp_intr_get_intno(inth[2]), esp_intr_get_intno(inth[3]));
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esp_intr_get_intno(inth[2]), esp_intr_get_intno(inth[3]));
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printf("Timer values on start: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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printf("Timer values on start: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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vTaskDelay(1000 / portTICK_RATE_MS);
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vTaskDelay(1000 / portTICK_RATE_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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TEST_ASSERT(count[0]==0);
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TEST_ASSERT(count[0]==0);
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TEST_ASSERT(count[1]!=0);
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TEST_ASSERT(count[1]!=0);
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TEST_ASSERT(count[2]!=0);
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TEST_ASSERT(count[2]!=0);
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TEST_ASSERT(count[3]!=0);
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TEST_ASSERT(count[3]!=0);
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printf("Disabling timers 1 and 2...\n");
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printf("Disabling timers 1 and 2...\n");
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esp_intr_enable(inth[0]);
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esp_intr_enable(inth[0]);
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esp_intr_disable(inth[1]);
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esp_intr_disable(inth[1]);
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esp_intr_disable(inth[2]);
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esp_intr_disable(inth[2]);
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for (x=0; x<4; x++) count[x]=0;
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for (x=0; x<4; x++) count[x]=0;
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vTaskDelay(1000 / portTICK_RATE_MS);
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vTaskDelay(1000 / portTICK_RATE_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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TEST_ASSERT(count[0]!=0);
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TEST_ASSERT(count[0]!=0);
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TEST_ASSERT(count[1]==0);
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TEST_ASSERT(count[1]==0);
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TEST_ASSERT(count[2]==0);
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TEST_ASSERT(count[2]==0);
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TEST_ASSERT(count[3]!=0);
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TEST_ASSERT(count[3]!=0);
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printf("Disabling other half...\n");
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printf("Disabling other half...\n");
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esp_intr_enable(inth[1]);
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esp_intr_enable(inth[1]);
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esp_intr_enable(inth[2]);
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esp_intr_enable(inth[2]);
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esp_intr_disable(inth[0]);
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esp_intr_disable(inth[0]);
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esp_intr_disable(inth[3]);
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esp_intr_disable(inth[3]);
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for (x=0; x<4; x++) count[x]=0;
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for (x=0; x<4; x++) count[x]=0;
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vTaskDelay(1000 / portTICK_RATE_MS);
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vTaskDelay(1000 / portTICK_RATE_MS);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
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printf("Timer values after 1 sec: %d %d %d %d\n", count[0], count[1], count[2], count[3]);
|
||||||
TEST_ASSERT(count[0]==0);
|
TEST_ASSERT(count[0]==0);
|
||||||
TEST_ASSERT(count[1]!=0);
|
TEST_ASSERT(count[1]!=0);
|
||||||
TEST_ASSERT(count[2]!=0);
|
TEST_ASSERT(count[2]!=0);
|
||||||
TEST_ASSERT(count[3]==0);
|
TEST_ASSERT(count[3]==0);
|
||||||
printf("Done.\n");
|
printf("Done.\n");
|
||||||
esp_intr_free(inth[0]);
|
esp_intr_free(inth[0]);
|
||||||
esp_intr_free(inth[1]);
|
esp_intr_free(inth[1]);
|
||||||
esp_intr_free(inth[2]);
|
esp_intr_free(inth[2]);
|
||||||
esp_intr_free(inth[3]);
|
esp_intr_free(inth[3]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static volatile int int_timer_ctr;
|
static volatile int int_timer_ctr;
|
||||||
|
|
||||||
|
|
||||||
void int_timer_handler(void *arg) {
|
void int_timer_handler(void *arg) {
|
||||||
xthal_set_ccompare(1, xthal_get_ccount()+8000000);
|
xthal_set_ccompare(1, xthal_get_ccount()+8000000);
|
||||||
int_timer_ctr++;
|
int_timer_ctr++;
|
||||||
}
|
}
|
||||||
|
|
||||||
void local_timer_test()
|
void local_timer_test()
|
||||||
{
|
{
|
||||||
intr_handle_t ih;
|
intr_handle_t ih;
|
||||||
esp_err_t r;
|
esp_err_t r;
|
||||||
r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
|
r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
|
||||||
TEST_ASSERT(r==ESP_OK);
|
TEST_ASSERT(r==ESP_OK);
|
||||||
printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
|
printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
|
||||||
xthal_set_ccompare(1, xthal_get_ccount()+8000000);
|
xthal_set_ccompare(1, xthal_get_ccount()+8000000);
|
||||||
int_timer_ctr=0;
|
int_timer_ctr=0;
|
||||||
vTaskDelay(1000 / portTICK_RATE_MS);
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
||||||
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
||||||
TEST_ASSERT(int_timer_ctr!=0);
|
TEST_ASSERT(int_timer_ctr!=0);
|
||||||
printf("Disabling int\n");
|
printf("Disabling int\n");
|
||||||
esp_intr_disable(ih);
|
esp_intr_disable(ih);
|
||||||
int_timer_ctr=0;
|
int_timer_ctr=0;
|
||||||
vTaskDelay(1000 / portTICK_RATE_MS);
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
||||||
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
||||||
TEST_ASSERT(int_timer_ctr==0);
|
TEST_ASSERT(int_timer_ctr==0);
|
||||||
printf("Re-enabling\n");
|
printf("Re-enabling\n");
|
||||||
esp_intr_enable(ih);
|
esp_intr_enable(ih);
|
||||||
vTaskDelay(1000 / portTICK_RATE_MS);
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
||||||
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
||||||
TEST_ASSERT(int_timer_ctr!=0);
|
TEST_ASSERT(int_timer_ctr!=0);
|
||||||
|
|
||||||
printf("Free int, re-alloc disabled\n");
|
printf("Free int, re-alloc disabled\n");
|
||||||
r=esp_intr_free(ih);
|
r=esp_intr_free(ih);
|
||||||
TEST_ASSERT(r==ESP_OK);
|
TEST_ASSERT(r==ESP_OK);
|
||||||
r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
|
r=esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
|
||||||
TEST_ASSERT(r==ESP_OK);
|
TEST_ASSERT(r==ESP_OK);
|
||||||
int_timer_ctr=0;
|
int_timer_ctr=0;
|
||||||
vTaskDelay(1000 / portTICK_RATE_MS);
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
||||||
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
||||||
TEST_ASSERT(int_timer_ctr==0);
|
TEST_ASSERT(int_timer_ctr==0);
|
||||||
printf("Re-enabling\n");
|
printf("Re-enabling\n");
|
||||||
esp_intr_enable(ih);
|
esp_intr_enable(ih);
|
||||||
vTaskDelay(1000 / portTICK_RATE_MS);
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
||||||
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
||||||
TEST_ASSERT(int_timer_ctr!=0);
|
TEST_ASSERT(int_timer_ctr!=0);
|
||||||
r=esp_intr_free(ih);
|
r=esp_intr_free(ih);
|
||||||
TEST_ASSERT(r==ESP_OK);
|
TEST_ASSERT(r==ESP_OK);
|
||||||
printf("Done.\n");
|
printf("Done.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
TEST_CASE("Intr_alloc test, CPU-local int source", "[esp32]")
|
TEST_CASE("Intr_alloc test, CPU-local int source", "[esp32]")
|
||||||
{
|
{
|
||||||
local_timer_test();
|
local_timer_test();
|
||||||
}
|
}
|
||||||
|
|
||||||
TEST_CASE("Intr_alloc test, private ints", "[esp32]")
|
TEST_CASE("Intr_alloc test, private ints", "[esp32]")
|
||||||
{
|
{
|
||||||
timer_test(0);
|
timer_test(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
TEST_CASE("Intr_alloc test, shared ints", "[esp32]")
|
TEST_CASE("Intr_alloc test, shared ints", "[esp32]")
|
||||||
{
|
{
|
||||||
timer_test(ESP_INTR_FLAG_SHARED);
|
timer_test(ESP_INTR_FLAG_SHARED);
|
||||||
}
|
}
|
||||||
|
@ -86,7 +86,9 @@ void IRAM_ATTR timer_group0_isr(void *para)
|
|||||||
/*Timer0 is an example that don't reload counter value*/
|
/*Timer0 is an example that don't reload counter value*/
|
||||||
TIMERG0.hw_timer[timer_idx].update = 1;
|
TIMERG0.hw_timer[timer_idx].update = 1;
|
||||||
|
|
||||||
/*We don't call a API here because they are not declared with IRAM_ATTR*/
|
/* We don't call a API here because they are not declared with IRAM_ATTR.
|
||||||
|
If we're okay with the timer irq not being serviced while SPI flash cache is disabled,
|
||||||
|
we can alloc this interrupt without the ESP_INTR_FLAG_IRAM flag and use the normal API. */
|
||||||
TIMERG0.int_clr_timers.t0 = 1;
|
TIMERG0.int_clr_timers.t0 = 1;
|
||||||
uint64_t timer_val = ((uint64_t) TIMERG0.hw_timer[timer_idx].cnt_high) << 32
|
uint64_t timer_val = ((uint64_t) TIMERG0.hw_timer[timer_idx].cnt_high) << 32
|
||||||
| TIMERG0.hw_timer[timer_idx].cnt_low;
|
| TIMERG0.hw_timer[timer_idx].cnt_low;
|
||||||
@ -155,7 +157,7 @@ void tg0_timer0_init()
|
|||||||
/*Enable timer interrupt*/
|
/*Enable timer interrupt*/
|
||||||
timer_enable_intr(timer_group, timer_idx);
|
timer_enable_intr(timer_group, timer_idx);
|
||||||
/*Set ISR handler*/
|
/*Set ISR handler*/
|
||||||
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, 0);
|
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM);
|
||||||
/*Start timer counter*/
|
/*Start timer counter*/
|
||||||
timer_start(timer_group, timer_idx);
|
timer_start(timer_group, timer_idx);
|
||||||
}
|
}
|
||||||
@ -185,7 +187,7 @@ void tg0_timer1_init()
|
|||||||
/*Enable timer interrupt*/
|
/*Enable timer interrupt*/
|
||||||
timer_enable_intr(timer_group, timer_idx);
|
timer_enable_intr(timer_group, timer_idx);
|
||||||
/*Set ISR handler*/
|
/*Set ISR handler*/
|
||||||
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, 0);
|
timer_isr_register(timer_group, timer_idx, timer_group0_isr, (void*) timer_idx, ESP_INTR_FLAG_IRAM);
|
||||||
/*Start timer counter*/
|
/*Start timer counter*/
|
||||||
timer_start(timer_group, timer_idx);
|
timer_start(timer_group, timer_idx);
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user