diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c
index 51bb15b99f..a560cd2990 100644
--- a/components/esp_hw_support/periph_ctrl.c
+++ b/components/esp_hw_support/periph_ctrl.c
@@ -92,7 +92,7 @@ IRAM_ATTR void wifi_bt_common_module_enable(void)
 #else
     portENTER_CRITICAL_SAFE(&periph_spinlock);
     if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
-        periph_ll_wifi_bt_module_enable_clk_clear_rst();
+        periph_ll_wifi_bt_module_enable_clk();
     }
     ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++;
     portEXIT_CRITICAL_SAFE(&periph_spinlock);
@@ -107,7 +107,7 @@ IRAM_ATTR void wifi_bt_common_module_disable(void)
     portENTER_CRITICAL_SAFE(&periph_spinlock);
     ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]--;
     if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
-        periph_ll_wifi_bt_module_disable_clk_set_rst();
+        periph_ll_wifi_bt_module_disable_clk();
     }
     portEXIT_CRITICAL_SAFE(&periph_spinlock);
 #endif
diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index e9c7fad554..f2584d9876 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -325,14 +325,18 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
     _lock_acquire(&s_wifi_bt_pd_controller.lock);
     if (s_wifi_bt_pd_controller.count++ == 0) {
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
-
-#if !CONFIG_IDF_TARGET_ESP32
+        esp_rom_delay_us(10);
+        wifi_bt_common_module_enable();
+#if CONFIG_IDF_TARGET_ESP32
+        DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
+#else
         // modem reset when power on
         SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
         CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
 #endif
-
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
+        wifi_bt_common_module_disable();
     }
     _lock_release(&s_wifi_bt_pd_controller.lock);
 #endif // !SOC_PMU_SUPPORTED
diff --git a/components/hal/esp32/include/hal/clk_gate_ll.h b/components/hal/esp32/include/hal/clk_gate_ll.h
index 4ab3a9aceb..951fa390bf 100644
--- a/components/hal/esp32/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32/include/hal/clk_gate_ll.h
@@ -230,16 +230,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
 {
     DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
 {
     DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/hal/esp32c2/include/hal/clk_gate_ll.h b/components/hal/esp32c2/include/hal/clk_gate_ll.h
index a832b86c9c..9e36fb4d14 100644
--- a/components/hal/esp32c2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32c2/include/hal/clk_gate_ll.h
@@ -180,16 +180,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
 {
     DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
 {
     DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/hal/esp32c3/include/hal/clk_gate_ll.h b/components/hal/esp32c3/include/hal/clk_gate_ll.h
index b76993c048..5765a5e57e 100644
--- a/components/hal/esp32c3/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32c3/include/hal/clk_gate_ll.h
@@ -229,16 +229,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
 {
     DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
 {
     DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h
index c0549ffdab..7447473e67 100644
--- a/components/hal/esp32h2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h
@@ -358,16 +358,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void periph_ll_wifi_bt_module_enable_clk(void)
 {
     // DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);// ESP32H2-TODO: IDF-6400
-    // DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
-static inline void periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void periph_ll_wifi_bt_module_disable_clk(void)
 {
     // DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);// ESP32H2-TODO: IDF-6400
-    // DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/hal/esp32s2/include/hal/clk_gate_ll.h b/components/hal/esp32s2/include/hal/clk_gate_ll.h
index 32ee2c457b..82725b9c59 100644
--- a/components/hal/esp32s2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32s2/include/hal/clk_gate_ll.h
@@ -243,16 +243,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
 {
     DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
 {
     DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/hal/esp32s3/include/hal/clk_gate_ll.h b/components/hal/esp32s3/include/hal/clk_gate_ll.h
index dfc15c868b..0d43fd4bb8 100644
--- a/components/hal/esp32s3/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32s3/include/hal/clk_gate_ll.h
@@ -264,16 +264,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
     DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
 {
     DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
-static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
+static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
 {
     DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
-    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
 static inline void periph_ll_reset(periph_module_t periph)
diff --git a/components/soc/esp32/include/soc/dport_reg.h b/components/soc/esp32/include/soc/dport_reg.h
index 3091138c39..74b87421df 100644
--- a/components/soc/esp32/include/soc/dport_reg.h
+++ b/components/soc/esp32/include/soc/dport_reg.h
@@ -1077,8 +1077,10 @@
 #define DPORT_RW_BTMAC_RST     BIT(9)
 #define DPORT_RW_BTLP_RST      BIT(10)
 
+//ESP32 should not reset FE in esp_wifi_bt_power_domain_on().
+//The FE of ESP32 is not in the WIFI PD power domain.
+//When turning off WIFI PD, the FE will not power down, so phy_wakeup_init() did not rewrite the FE register.
 #define MODEM_RESET_FIELD_WHEN_PU   (DPORT_WIFIBB_RST       | \
-                                     DPORT_FE_RST           | \
                                      DPORT_WIFIMAC_RST      | \
                                      DPORT_BTBB_RST         | \
                                      DPORT_BTMAC_RST        | \
diff --git a/components/soc/esp32s2/include/soc/syscon_reg.h b/components/soc/esp32s2/include/soc/syscon_reg.h
index 91d9e15375..62e031b55b 100644
--- a/components/soc/esp32s2/include/soc/syscon_reg.h
+++ b/components/soc/esp32s2/include/soc/syscon_reg.h
@@ -443,7 +443,8 @@ extern "C" {
 #define DPORT_WIFI_CLK_BT_EN_V  0x61
 #define DPORT_WIFI_CLK_BT_EN_S  11
 /* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
-#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
+#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
+#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M
 
 /* Digital team to check */
 //bluetooth baseband bit11