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Merge branch 'bugfix/s3_irom_addr_v5.0' into 'release/v5.0'

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soc: fix SOC_IROM_MASK_HIGH for esp32s3 (v5.0)

See merge request espressif/esp-idf!27137
This commit is contained in:
Jiang Jiang Jian 2023-11-22 13:58:47 +08:00
commit 293cf4d332
2 changed files with 2 additions and 2 deletions
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2
components/soc/esp32/include/soc/soc.h
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@ -175,7 +175,7 @@
#define SOC_IROM_LOW 0x400D0000
#define SOC_IROM_HIGH 0x40400000
#define SOC_IROM_MASK_LOW 0x40000000
#define SOC_IROM_MASK_HIGH 0x40064F00
#define SOC_IROM_MASK_HIGH 0x40070000
#define SOC_CACHE_PRO_LOW 0x40070000
#define SOC_CACHE_PRO_HIGH 0x40078000
#define SOC_CACHE_APP_LOW 0x40078000

2
components/soc/esp32s3/include/soc/soc.h
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@ -186,7 +186,7 @@
#define SOC_EXTRAM_DATA_LOW 0x3C000000
#define SOC_EXTRAM_DATA_HIGH 0x3E000000
#define SOC_IROM_MASK_LOW 0x40000000
#define SOC_IROM_MASK_HIGH 0x4001A100
#define SOC_IROM_MASK_HIGH 0x40060000
#define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW)
#define SOC_MAX_CONTIGUOUS_RAM_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) ///< Largest span of contiguous memory (DRAM or IRAM) in the address space