From 28f12230aec552de4c6e8034320b48aab104fe10 Mon Sep 17 00:00:00 2001 From: Linda Date: Wed, 10 Apr 2024 15:31:06 +0800 Subject: [PATCH] docs: update description of USB-JTAG GPIOs --- docs/en/api-reference/peripherals/gpio/esp32c3.inc | 7 +++---- docs/en/api-reference/peripherals/gpio/esp32c5.inc | 7 +++---- docs/en/api-reference/peripherals/gpio/esp32c6.inc | 4 ++-- docs/en/api-reference/peripherals/gpio/esp32p4.inc | 2 +- docs/en/api-reference/peripherals/gpio/esp32s3.inc | 4 ++-- docs/zh_CN/api-reference/peripherals/gpio/esp32c3.inc | 6 +++--- docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc | 10 ++++------ docs/zh_CN/api-reference/peripherals/gpio/esp32c6.inc | 8 +++----- docs/zh_CN/api-reference/peripherals/gpio/esp32p4.inc | 6 ++---- docs/zh_CN/api-reference/peripherals/gpio/esp32s3.inc | 4 ++-- 10 files changed, 25 insertions(+), 33 deletions(-) diff --git a/docs/en/api-reference/peripherals/gpio/esp32c3.inc b/docs/en/api-reference/peripherals/gpio/esp32c3.inc index e27a5dbc92..fc929fcc72 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32c3.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32c3.inc @@ -13,7 +13,6 @@ The {IDF_TARGET_NAME} chip features 22 physical GPIO pins (GPIO0 ~ GPIO21). Each The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions. - .. list-table:: :header-rows: 1 :widths: 12 12 22 @@ -113,8 +112,8 @@ The table below provides more information on pin usage, and please note the comm .. note:: - Strapping pin: GPIO2, GPIO8 and GPIO9 are strapping pins. For more information, please refer to `ESP32-C3 Datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`_. - - SPI0/1: GPIO12-17 are usually used for SPI flash and PSRAM and are not recommended for other uses. - - USB-JTAG: GPIO 18 and 19 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. - - RTC: GPIO0-5 can be used to wake up the chip from Deep-sleep mode. Other GPIOs can only wake up the chip from Light-sleep mode. For more information, please refer to Section :ref:`Wakeup Sources`. + - SPI0/1: GPIO12 ~ GPIO17 are usually used for SPI flash and PSRAM and are not recommended for other uses. + - USB-JTAG: GPIO18 and GPIO19 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled. + - RTC: GPIO0 ~ GPIO5 can be used to wake up the chip from Deep-sleep mode. Other GPIOs can only wake up the chip from Light-sleep mode. For more information, please refer to Section :ref:`Wakeup Sources`. --- diff --git a/docs/en/api-reference/peripherals/gpio/esp32c5.inc b/docs/en/api-reference/peripherals/gpio/esp32c5.inc index 6c053ef583..9a16e59dae 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32c5.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32c5.inc @@ -9,7 +9,7 @@ .. gpio-summary -Current GPIO is for {IDF_TARGET_NAME} beta3 version. {IDF_TARGET_NAME} MP version would have 2 more available IOs, and some pin functions are changed. The {IDF_TARGET_NAME} MP version will be updated later. +Current GPIOs are for {IDF_TARGET_NAME} beta3 version. {IDF_TARGET_NAME} MP version would have 2 more available IOs, and some pin functions are changed. The {IDF_TARGET_NAME} MP version will be updated later. The {IDF_TARGET_NAME} chip features 27 physical GPIO pins (GPIO0 ~ GPIO26). Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. @@ -159,11 +159,10 @@ The table below provides more information on pin usage, and please note the comm - - USB-JTAG - .. note:: - Strapping pin: GPIO2, GPIO3, GPIO6, and GPIO7 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__. - - SPI0/1: GPIO18-24 are usually used for SPI flash and not recommended for other uses. - - USB-JTAG: GPIO 25 and 26 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. + - SPI0/1: GPIO18 ~ GPIO24 are usually used for SPI flash and not recommended for other uses. + - USB-JTAG: GPIO25 and GPIO26 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled. --- diff --git a/docs/en/api-reference/peripherals/gpio/esp32c6.inc b/docs/en/api-reference/peripherals/gpio/esp32c6.inc index 7190c48df4..bf9f330c3a 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32c6.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32c6.inc @@ -180,8 +180,8 @@ The table below provides more information on pin usage, and please note the comm .. note:: - Strapping pin: GPIO4, GPIO5, GPIO8, GPIO9, and GPIO15 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__. - - SPI0/1: GPIO24-30 are usually used for SPI flash and not recommended for other uses. - - USB-JTAG: GPIO 12 and 13 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. + - SPI0/1: GPIO24 ~ GPIO30 are usually used for SPI flash and not recommended for other uses. + - USB-JTAG: GPIO12 and GPIO13 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled. - For chip variants with an SiP flash built in, GPIO24 ~ GPIO30 are dedicated to connecting the SiP flash; GPIO10 ~ GPIO11 are not led out to any chip pins; therefore, only the remaining 22 GPIO pins are available. - For chip variants without an in-package flash, GPIO14 is not led out to any chip pins. diff --git a/docs/en/api-reference/peripherals/gpio/esp32p4.inc b/docs/en/api-reference/peripherals/gpio/esp32p4.inc index bfe18dc86f..fe527ea951 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32p4.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32p4.inc @@ -300,6 +300,6 @@ The table below provides more information on pin usage, and please note the comm .. note:: - Strapping pin: GPIO34, GPIO35, GPIO36, GPIO37, and GPIO38 are strapping pins. For more information, please refer to `datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__. - - USB-JTAG: GPIO 24 and 25 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. + - USB-JTAG: GPIO24 and GPIO25 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled. --- diff --git a/docs/en/api-reference/peripherals/gpio/esp32s3.inc b/docs/en/api-reference/peripherals/gpio/esp32s3.inc index 8fa9867ad5..ca8fbdbf3e 100644 --- a/docs/en/api-reference/peripherals/gpio/esp32s3.inc +++ b/docs/en/api-reference/peripherals/gpio/esp32s3.inc @@ -250,7 +250,7 @@ The table below provides more information on pin usage, and please note the comm .. Note:: - Strapping pin: GPIO0, GPIO3, GPIO45 and GPIO46 are strapping pins. For more information, please refer to `ESP32-S3 datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`_. - - SPI0/1: GPIO26-32 are usually used for SPI flash and PSRAM and not recommended for other uses. When using Octal Flash or Octal PSRAM or both, GPIO33~37 are connected to SPIIO4 ~ SPIIO7 and SPIDQS. Therefore, on boards embedded with ESP32-S3R8 / ESP32-S3R8V chip, GPIO33~37 are also not recommended for other uses. - - USB-JTAG: GPIO 19 and 20 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. + - SPI0/1: GPIO26 ~ GPIO32 are usually used for SPI flash and PSRAM and not recommended for other uses. When using Octal flash or Octal PSRAM or both, GPIO33 ~ GPIO37 are connected to SPIIO4 ~ SPIIO7 and SPIDQS. Therefore, on boards embedded with ESP32-S3R8 / ESP32-S3R8V chip, GPIO33 ~ GPIO37 are also not recommended for other uses. + - USB-JTAG: GPIO19 and GPIO20 are used by USB-JTAG by default. If they are reconfigured to operate as normal GPIOs, USB-JTAG functionality will be disabled. --- diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32c3.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32c3.inc index 04acf15421..68f3857a55 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32c3.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32c3.inc @@ -112,8 +112,8 @@ .. note:: - Strapping 管脚：GPIO2、GPIO8、和 GPIO9 是 Strapping 管脚。更多信息请参考 `ESP32-C3 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - - SPI0/1：GPIO12-17 通常用于 SPI flash 和 PSRAM，不推荐用于其他用途。 - - USB-JTAG：GPIO18 和 GPIO19 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 - - RTC：GPIO0-5 可用于将芯片从 Deep-sleep 模式中唤醒，其他 GPIO 仅能将芯片从 Light-sleep 模式中唤醒。更多信息请参考 :ref:`唤醒源` 章节。 + - SPI0/1：GPIO12 ~ GPIO17 通常用于 SPI flash 和 PSRAM，不推荐用于其他用途。 + - USB-JTAG：GPIO18 和 GPIO19 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。 + - RTC：GPIO0 ~ GPIO5 可用于将芯片从 Deep-sleep 模式中唤醒，其他 GPIO 仅能将芯片从 Light-sleep 模式中唤醒。更多信息请参考 :ref:`唤醒源` 章节。 --- diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc index 69ed9dfdc2..78f87a207f 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32c5.inc @@ -9,11 +9,9 @@ .. gpio-summary -{IDF_TARGET_NAME} 芯片具有 27 个物理 GPIO 管脚（GPIO0 ~ GPIO26）。 +当前的 GPIO 适用于 {IDF_TARGET_NAME} beta3 版本。{IDF_TARGET_NAME} MP 版本将会增加 2 个可用的 IO，并且一些引脚功能将会改变。{IDF_TARGET_NAME} MP 版本将会在以后更新。 -当前的GPIO适用于{IDF_TARGET_NAME} beta3版本。{IDF_TARGET_NAME} MP版本将会增加2个可用的IO，并且一些引脚功能将会改变。{IDF_TARGET_NAME} MP版本将会在以后更新。 - -每个管脚都可用作一个通用 IO，或连接一个内部的外设 信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输 出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 +{IDF_TARGET_NAME} 芯片具有 27 个物理 GPIO 管脚（GPIO0 ~ GPIO26）。每个管脚都可用作一个通用 IO，或连接一个内部的外设信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 下表提供了各管脚的详细信息，部分 GPIO 具有特殊的使用限制，具体可参考表中的注释列。 @@ -164,7 +162,7 @@ .. note:: - Strapping 管脚：GPIO2、GPIO3、GPIO6 和 GPIO7 是 Strapping 管脚。更多信息请参考 `ESP32-C5 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - - SPI0/1：GPIO18-24 通常用于 SPI flash，不推荐用于其他用途。 - - USB-JTAG：GPIO25 和 GPIO26 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 + - SPI0/1：GPIO18 ~ GPIO24 通常用于 SPI flash，不推荐用于其他用途。 + - USB-JTAG：GPIO25 和 GPIO26 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。 --- diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32c6.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32c6.inc index 8398c16c32..a4a46d5dc0 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32c6.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32c6.inc @@ -9,9 +9,7 @@ .. gpio-summary -{IDF_TARGET_NAME} 芯片具有 31 个物理 GPIO 管脚（GPIO0 ~ GPIO30）。 - -每个管脚都可用作一个通用 IO，或连接一个内部的外设 信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输 出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 +{IDF_TARGET_NAME} 芯片具有 31 个物理 GPIO 管脚（GPIO0 ~ GPIO30）。每个管脚都可用作一个通用 IO，或连接一个内部的外设 信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输 出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 下表提供了各管脚的详细信息，部分 GPIO 具有特殊的使用限制，具体可参考表中的注释列。 @@ -182,8 +180,8 @@ .. note:: - Strapping 管脚：GPIO4、GPIO5、GPIO8、GPIO9 和 GPIO15 是 Strapping 管脚。更多信息请参考 `ESP32-C6 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - - SPI0/1：GPIO24-30 通常用于 SPI flash，不推荐用于其他用途。 - - USB-JTAG：GPIO12 和 GPIO13 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 + - SPI0/1：GPIO24 ～ GPIO30 通常用于 SPI flash，不推荐用于其他用途。 + - USB-JTAG：GPIO12 和 GPIO13 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。 - 对于内置 SiP flash 的芯片型号，GPIO24 ~ GPIO30 专门用于连接 SiP flash; 且 GPIO10 ~ GPIO11 未引出至芯片管脚。因此，对于这类芯片只有 22 个 GPIO 管脚可用。 - 对于无内置 SiP flash 的芯片型号，则 GPIO14 未引出至芯片管脚。 diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32p4.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32p4.inc index 229365e687..1ed0b9dc51 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32p4.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32p4.inc @@ -9,9 +9,7 @@ .. gpio-summary -{IDF_TARGET_NAME} 芯片具有 55 个物理 GPIO 管脚（GPIO0 ~ GPIO54）。 - -每个管脚都可用作一个通用 IO，或连接一个内部的外设信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 +{IDF_TARGET_NAME} 芯片具有 55 个物理 GPIO 管脚（GPIO0 ~ GPIO54）。每个管脚都可用作一个通用 IO，或连接一个内部的外设信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 下表提供了各管脚的详细信息，部分 GPIO 具有特殊的使用限制，具体可参考表中的注释列。 @@ -302,6 +300,6 @@ .. note:: - Strapping 管脚：GPIO34, GPIO35、GPIO36、GPIO37 和 GPIO38 是 Strapping 管脚。更多信息请参考 `ESP32-P4 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - - USB-JTAG：GPIO24 和 GPIO25 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 + - USB-JTAG：GPIO24 和 GPIO25 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。 --- diff --git a/docs/zh_CN/api-reference/peripherals/gpio/esp32s3.inc b/docs/zh_CN/api-reference/peripherals/gpio/esp32s3.inc index 6c2eda5538..52f0f8ea14 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio/esp32s3.inc +++ b/docs/zh_CN/api-reference/peripherals/gpio/esp32s3.inc @@ -250,7 +250,7 @@ .. Note:: - Strapping 管脚：GPIO0、GPIO3、GPIO45 和 GPIO46 是 Strapping 管脚。更多信息请参考 `ESP32-S3 技术规格书 <{IDF_TARGET_DATASHEET_CN_URL}>`_。 - - SPI0/1：GPIO26-32 通常用于 SPI flash 和 PSRAM，不推荐用于其他用途。当使用八线 flash 或八线 PSRAM 或同时使用两者时，GPIO33~37 会连接到 SPIIO4 ~ SPIIO7 和 SPIDQS。因此，对于内嵌 ESP32-S3R8 或 ESP32-S3R8V 芯片的开发板，GPIO33~37 也不推荐用于其他用途。 - - USB-JTAG：GPIO19 和 GPIO20 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 + - SPI0/1：GPIO26 ~ GPIO32 通常用于 SPI flash 和 PSRAM，不推荐用于其他用途。当使用八线 flash 或八线 PSRAM 或同时使用两者时，GPIO33 ~ GPIO37 会连接到 SPIIO4 ~ SPIIO7 和 SPIDQS。因此，对于内嵌 ESP32-S3R8 或 ESP32-S3R8V 芯片的开发板，GPIO33 ~ GPIO37 也不推荐用于其他用途。 + - USB-JTAG：GPIO19 和 GPIO20 默认用于 USB-JTAG。如果将它们配置为普通 GPIO，驱动程序将禁用 USB-JTAG 功能。 ---