diff --git a/components/esp32s3/include/esp32s3/spiram.h b/components/esp32s3/include/esp32s3/spiram.h index fdfc7b8c5c..abe2d05ecd 100644 --- a/components/esp32s3/include/esp32s3/spiram.h +++ b/components/esp32s3/include/esp32s3/spiram.h @@ -87,5 +87,52 @@ void esp_spiram_writeback_cache(void); */ esp_err_t esp_spiram_reserve_dma_pool(size_t size); +#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS + +extern int _instruction_reserved_start, _instruction_reserved_end; + +/** + * @brief Get the start page number of the instruction in SPI flash + * + * @return start page number + */ +uint32_t instruction_flash_start_page_get(void); +/** + * @brief Get the end page number of the instruction in SPI flash + * + * @return end page number + */ +uint32_t instruction_flash_end_page_get(void); +/** + * @brief Get the offset of instruction from SPI flash to SPI RAM + * + * @return instruction offset + */ +int instruction_flash2spiram_offset(void); +#endif + +#if CONFIG_SPIRAM_RODATA + +extern int _rodata_reserved_start, _rodata_reserved_end; + +/** + * @brief Get the start page number of the rodata in SPI flash + * + * @return start page number + */ +uint32_t rodata_flash_start_page_get(void); +/** + * @brief Get the end page number of the rodata in SPI flash + * + * @return end page number + */ +uint32_t rodata_flash_end_page_get(void); +/** + * @brief Get the offset number of rodata from SPI flash to SPI RAM + * + * @return rodata offset + */ +int rodata_flash2spiram_offset(void); +#endif #endif diff --git a/components/esp32s3/ld/esp32s3.project.ld.in b/components/esp32s3/ld/esp32s3.project.ld.in index b85c127ea0..aa241f6d04 100644 --- a/components/esp32s3/ld/esp32s3.project.ld.in +++ b/components/esp32s3/ld/esp32s3.project.ld.in @@ -284,6 +284,7 @@ SECTIONS .flash.text : { _stext = .; + _instruction_reserved_start = ABSOLUTE(.); _text_start = ABSOLUTE(.); mapping[flash_text] @@ -294,6 +295,7 @@ SECTIONS *(.fini) *(.gnu.version) _text_end = ABSOLUTE(.); + _instruction_reserved_end = ABSOLUTE(.); _etext = .; /** @@ -308,6 +310,7 @@ SECTIONS { . = SIZEOF(.flash.text); . = ALIGN(0x10000) + 0x20; + _rodata_reserved_start = .; } > drom0_0_seg /* When modifying the alignment, don't forget to update tls_section_alignment in pxPortInitialiseStack */ @@ -367,6 +370,7 @@ SECTIONS *(.tbss) *(.tbss.*) _thread_local_end = ABSOLUTE(.); + _rodata_reserved_end = ABSOLUTE(.); . = ALIGN(4); } > default_rodata_seg diff --git a/components/esp32s3/spiram.c b/components/esp32s3/spiram.c index f1711a5bff..c8a5609b1c 100644 --- a/components/esp32s3/spiram.c +++ b/components/esp32s3/spiram.c @@ -40,7 +40,7 @@ we add more types of external RAM memory, this can be made into a more intellige #if CONFIG_SPIRAM -static const char* TAG = "spiram"; +static const char *TAG = "spiram"; #if CONFIG_SPIRAM_SPEED_40M #define PSRAM_SPEED PSRAM_CACHE_S40M @@ -50,9 +50,7 @@ static const char* TAG = "spiram"; #define PSRAM_SPEED PSRAM_CACHE_S20M #endif -#define SPIRAM_SIZE esp_spiram_get_size() - -static bool spiram_inited=false; +static bool spiram_inited = false; /* @@ -62,31 +60,34 @@ static bool spiram_inited=false; */ bool esp_spiram_test(void) { - volatile int *spiram=(volatile int*)(SOC_EXTRAM_DATA_HIGH - SPIRAM_SIZE); + size_t spiram_size = esp_spiram_get_size(); + volatile int *spiram = (volatile int *)(SOC_EXTRAM_DATA_HIGH - spiram_size); size_t p; - size_t s=SPIRAM_SIZE; - int errct=0; - int initial_err=-1; + size_t s = spiram_size; + int errct = 0; + int initial_err = -1; - if ((SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) < SPIRAM_SIZE) { + if (SOC_EXTRAM_DATA_SIZE < spiram_size) { ESP_EARLY_LOGW(TAG, "Only test spiram from %08x to %08x\n", SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH); - spiram=(volatile int*)SOC_EXTRAM_DATA_LOW; + spiram = (volatile int *)SOC_EXTRAM_DATA_LOW; s = SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW; } - for (p=0; p<(s/sizeof(int)); p+=8) { - spiram[p]=p^0xAAAAAAAA; + for (p = 0; p < (s / sizeof(int)); p += 8) { + spiram[p] = p ^ 0xAAAAAAAA; } - for (p=0; p<(s/sizeof(int)); p+=8) { - if (spiram[p]!=(p^0xAAAAAAAA)) { + for (p = 0; p < (s / sizeof(int)); p += 8) { + if (spiram[p] != (p ^ 0xAAAAAAAA)) { errct++; - if (errct==1) initial_err=p*4; + if (errct == 1) { + initial_err = p * 4; + } if (errct < 4) { - ESP_EARLY_LOGE(TAG, "SPI SRAM error@%08x:%08x/%08x \n", &spiram[p], spiram[p], p^0xAAAAAAAA); + ESP_EARLY_LOGE(TAG, "SPI SRAM error@%08x:%08x/%08x \n", &spiram[p], spiram[p], p ^ 0xAAAAAAAA); } } } if (errct) { - ESP_EARLY_LOGE(TAG, "SPI SRAM memory test fail. %d/%d writes failed, first @ %X\n", errct, s/32, initial_err+SOC_EXTRAM_DATA_LOW); + ESP_EARLY_LOGE(TAG, "SPI SRAM memory test fail. %d/%d writes failed, first @ %X\n", errct, s / 32, initial_err + SOC_EXTRAM_DATA_LOW); return false; } else { ESP_EARLY_LOGI(TAG, "SPI SRAM memory test OK"); @@ -96,11 +97,12 @@ bool esp_spiram_test(void) void IRAM_ATTR esp_spiram_init_cache(void) { + size_t spiram_size = esp_spiram_get_size(); Cache_Suspend_DCache(); - if ((SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) >= SPIRAM_SIZE) { - Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SOC_EXTRAM_DATA_HIGH - SPIRAM_SIZE, 0, 64, SPIRAM_SIZE >> 16, 0); + if ((SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) >= spiram_size) { + Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SOC_EXTRAM_DATA_HIGH - spiram_size, 0, 64, spiram_size >> 16, 0); } else { - Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SOC_EXTRAM_DATA_HIGH - SPIRAM_SIZE, 0, 64, (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) >> 16, 0); + Cache_Dbus_MMU_Set(MMU_ACCESS_SPIRAM, SOC_EXTRAM_DATA_HIGH - spiram_size, 0, 64, (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) >> 16, 0); } REG_CLR_BIT(EXTMEM_DCACHE_CTRL1_REG, EXTMEM_DCACHE_SHUT_CORE0_BUS); #if !CONFIG_FREERTOS_UNICORE @@ -110,8 +112,6 @@ void IRAM_ATTR esp_spiram_init_cache(void) } static uint32_t pages_for_flash = 0; -static uint32_t page0_mapped = 0; -static uint32_t page0_page = INVALID_PHY_PAGE; static uint32_t instrcution_in_spiram = 0; static uint32_t rodata_in_spiram = 0; @@ -127,6 +127,11 @@ static uint32_t rodata_start_page = 0; static uint32_t rodata_end_page = 0; #endif +#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS || CONFIG_SPIRAM_RODATA +static uint32_t page0_mapped = 0; +static uint32_t page0_page = INVALID_PHY_PAGE; +#endif + uint32_t esp_spiram_instruction_access_enabled(void) { return instrcution_in_spiram; @@ -140,21 +145,18 @@ uint32_t esp_spiram_rodata_access_enabled(void) #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS esp_err_t esp_spiram_enable_instruction_access(void) { + size_t spiram_size = esp_spiram_get_size(); uint32_t pages_in_flash = 0; - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_IBUS0, &page0_mapped); - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_IBUS1, &page0_mapped); - if ((pages_in_flash + pages_for_flash) > (SPIRAM_SIZE >> 16)) { - ESP_EARLY_LOGE(TAG, "SPI RAM space not enough for the instructions, has %d pages, need %d pages.", (SPIRAM_SIZE >> 16), (pages_in_flash + pages_for_flash)); + pages_in_flash += Cache_Count_Flash_Pages(CACHE_IBUS, &page0_mapped); + if ((pages_in_flash + pages_for_flash) > (spiram_size >> 16)) { + ESP_EARLY_LOGE(TAG, "SPI RAM space not enough for the instructions, has %d pages, need %d pages.", (spiram_size >> 16), (pages_in_flash + pages_for_flash)); return ESP_FAIL; } ESP_EARLY_LOGI(TAG, "Instructions copied and mapped to SPIRAM"); - uint32_t instr_mmu_offset = ((uint32_t)&_instruction_reserved_start & 0xFFFFFF)/MMU_PAGE_SIZE; - uint32_t mmu_value = *(volatile uint32_t *)(DR_REG_MMU_TABLE + PRO_CACHE_IBUS0_MMU_START + instr_mmu_offset*sizeof(uint32_t)); - mmu_value &= MMU_ADDRESS_MASK; + uint32_t mmu_value = *(volatile uint32_t *)(DR_REG_MMU_TABLE + CACHE_IROM_MMU_START); instr_flash2spiram_offs = mmu_value - pages_for_flash; ESP_EARLY_LOGV(TAG, "Instructions from flash page%d copy to SPIRAM page%d, Offset: %d", mmu_value, pages_for_flash, instr_flash2spiram_offs); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_IBUS0, IRAM0_ADDRESS_LOW, pages_for_flash, &page0_page); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_IBUS1, IRAM1_ADDRESS_LOW, pages_for_flash, &page0_page); + pages_for_flash = Cache_Flash_To_SPIRAM_Copy(CACHE_IBUS, IRAM0_CACHE_ADDRESS_LOW, pages_for_flash, &page0_page); instrcution_in_spiram = 1; return ESP_OK; } @@ -163,27 +165,19 @@ esp_err_t esp_spiram_enable_instruction_access(void) #if CONFIG_SPIRAM_RODATA esp_err_t esp_spiram_enable_rodata_access(void) { + size_t spiram_size = esp_spiram_get_size(); uint32_t pages_in_flash = 0; - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_IBUS2, &page0_mapped); - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_DBUS0, &page0_mapped); - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_DBUS1, &page0_mapped); - pages_in_flash += Cache_Count_Flash_Pages(PRO_CACHE_DBUS2, &page0_mapped); + pages_in_flash += Cache_Count_Flash_Pages(CACHE_DBUS, &page0_mapped); - if ((pages_in_flash + pages_for_flash) > (SPIRAM_SIZE >> 16)) { + if ((pages_in_flash + pages_for_flash) > (spiram_size >> 16)) { ESP_EARLY_LOGE(TAG, "SPI RAM space not enough for the read only data."); return ESP_FAIL; } - ESP_EARLY_LOGI(TAG, "Read only data copied and mapped to SPIRAM"); - uint32_t rodata_mmu_offset = ((uint32_t)&_rodata_reserved_start & 0xFFFFFF)/MMU_PAGE_SIZE; - uint32_t mmu_value = *(volatile uint32_t *)(DR_REG_MMU_TABLE + PRO_CACHE_IBUS2_MMU_START + rodata_mmu_offset*sizeof(uint32_t)); - mmu_value &= MMU_ADDRESS_MASK; + uint32_t mmu_value = *(volatile uint32_t *)(DR_REG_MMU_TABLE + CACHE_DROM_MMU_START); rodata_flash2spiram_offs = mmu_value - pages_for_flash; ESP_EARLY_LOGV(TAG, "Rodata from flash page%d copy to SPIRAM page%d, Offset: %d", mmu_value, pages_for_flash, rodata_flash2spiram_offs); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_IBUS2, DROM0_ADDRESS_LOW, pages_for_flash, &page0_page); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_DBUS0, DRAM0_ADDRESS_LOW, pages_for_flash, &page0_page); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_DBUS1, DRAM1_ADDRESS_LOW, pages_for_flash, &page0_page); - pages_for_flash = Cache_Flash_To_SPIRAM_Copy(PRO_CACHE_DBUS2, DPORT_ADDRESS_LOW, pages_for_flash, &page0_page); + pages_for_flash = Cache_Flash_To_SPIRAM_Copy(CACHE_DBUS, DRAM0_CACHE_ADDRESS_LOW, pages_for_flash, &page0_page); rodata_in_spiram = 1; return ESP_OK; } @@ -192,10 +186,9 @@ esp_err_t esp_spiram_enable_rodata_access(void) #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS void instruction_flash_page_info_init(void) { - uint32_t instr_page_cnt = ((uint32_t)&_instruction_reserved_end - SOC_IROM_LOW + MMU_PAGE_SIZE - 1)/MMU_PAGE_SIZE; - uint32_t instr_mmu_offset = ((uint32_t)&_instruction_reserved_start & 0xFFFFFF)/MMU_PAGE_SIZE; + uint32_t instr_page_cnt = ((uint32_t)&_instruction_reserved_end - SOC_IROM_LOW + MMU_PAGE_SIZE - 1) / MMU_PAGE_SIZE; - instr_start_page = *(volatile uint32_t *)(DR_REG_MMU_TABLE + PRO_CACHE_IBUS0_MMU_START + instr_mmu_offset*sizeof(uint32_t)); + instr_start_page = *(volatile uint32_t *)(DR_REG_MMU_TABLE + CACHE_IROM_MMU_START); instr_start_page &= MMU_ADDRESS_MASK; instr_end_page = instr_start_page + instr_page_cnt - 1; } @@ -219,10 +212,9 @@ int IRAM_ATTR instruction_flash2spiram_offset(void) #if CONFIG_SPIRAM_RODATA void rodata_flash_page_info_init(void) { - uint32_t rodata_page_cnt = ((uint32_t)&_rodata_reserved_end - SOC_DROM_LOW + MMU_PAGE_SIZE - 1)/MMU_PAGE_SIZE; - uint32_t rodata_mmu_offset = ((uint32_t)&_rodata_reserved_start & 0xFFFFFF)/MMU_PAGE_SIZE; + uint32_t rodata_page_cnt = ((uint32_t)&_rodata_reserved_end - ((uint32_t)&_rodata_reserved_start & ~ (MMU_PAGE_SIZE - 1)) + MMU_PAGE_SIZE - 1) / MMU_PAGE_SIZE; - rodata_start_page = *(volatile uint32_t *)(DR_REG_MMU_TABLE + PRO_CACHE_IBUS2_MMU_START + rodata_mmu_offset*sizeof(uint32_t)); + rodata_start_page = *(volatile uint32_t *)(DR_REG_MMU_TABLE + CACHE_DROM_MMU_START); rodata_start_page &= MMU_ADDRESS_MASK; rodata_end_page = rodata_start_page + rodata_page_cnt - 1; } @@ -254,46 +246,52 @@ esp_err_t esp_spiram_init(void) return r; } - spiram_inited=true; + spiram_inited = true; #if (CONFIG_SPIRAM_SIZE != -1) - if (esp_spiram_get_size()!=CONFIG_SPIRAM_SIZE) { - ESP_EARLY_LOGE(TAG, "Expected %dKiB chip but found %dKiB chip. Bailing out..", CONFIG_SPIRAM_SIZE/1024, esp_spiram_get_size()/1024); + if (esp_spiram_get_size() != CONFIG_SPIRAM_SIZE) { + ESP_EARLY_LOGE(TAG, "Expected %dKiB chip but found %dKiB chip. Bailing out..", CONFIG_SPIRAM_SIZE / 1024, esp_spiram_get_size() / 1024); return ESP_ERR_INVALID_SIZE; } #endif ESP_EARLY_LOGI(TAG, "Found %dMBit SPI RAM device", - (esp_spiram_get_size()*8)/(1024*1024)); + (esp_spiram_get_size() * 8) / (1024 * 1024)); ESP_EARLY_LOGI(TAG, "SPI RAM mode: %s", PSRAM_SPEED == PSRAM_CACHE_S40M ? "sram 40m" : \ - PSRAM_SPEED == PSRAM_CACHE_S80M ? "sram 80m" : "sram 20m"); + PSRAM_SPEED == PSRAM_CACHE_S80M ? "sram 80m" : "sram 20m"); ESP_EARLY_LOGI(TAG, "PSRAM initialized, cache is in %s mode.", \ - (PSRAM_MODE==PSRAM_VADDR_MODE_EVENODD)?"even/odd (2-core)": \ - (PSRAM_MODE==PSRAM_VADDR_MODE_LOWHIGH)?"low/high (2-core)": \ - (PSRAM_MODE==PSRAM_VADDR_MODE_NORMAL)?"normal (1-core)":"ERROR"); + (PSRAM_MODE == PSRAM_VADDR_MODE_EVENODD) ? "even/odd (2-core)" : \ + (PSRAM_MODE == PSRAM_VADDR_MODE_LOWHIGH) ? "low/high (2-core)" : \ + (PSRAM_MODE == PSRAM_VADDR_MODE_NORMAL) ? "normal (1-core)" : "ERROR"); return ESP_OK; } esp_err_t esp_spiram_add_to_heapalloc(void) { + size_t spiram_size = esp_spiram_get_size(); uint32_t size_for_flash = (pages_for_flash << 16); - ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", (SPIRAM_SIZE - (pages_for_flash << 16))/1024); + ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", (spiram_size - (pages_for_flash << 16)) / 1024); //Add entire external RAM region to heap allocator. Heap allocator knows the capabilities of this type of memory, so there's //no need to explicitly specify them. - return heap_caps_add_region((intptr_t)SOC_EXTRAM_DATA_HIGH - SPIRAM_SIZE + size_for_flash, (intptr_t)SOC_EXTRAM_DATA_HIGH -1); + return heap_caps_add_region((intptr_t)SOC_EXTRAM_DATA_HIGH - spiram_size + size_for_flash, (intptr_t)SOC_EXTRAM_DATA_HIGH - 1); } static uint8_t *dma_heap; -esp_err_t esp_spiram_reserve_dma_pool(size_t size) { - if (size==0) return ESP_OK; //no-op - ESP_EARLY_LOGI(TAG, "Reserving pool of %dK of internal memory for DMA/internal allocations", size/1024); - dma_heap=heap_caps_malloc(size, MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL); - if (!dma_heap) return ESP_ERR_NO_MEM; - uint32_t caps[]={MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL, 0, MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}; - return heap_caps_add_region_with_caps(caps, (intptr_t) dma_heap, (intptr_t) dma_heap+size-1); +esp_err_t esp_spiram_reserve_dma_pool(size_t size) +{ + if (size == 0) { + return ESP_OK; //no-op + } + ESP_EARLY_LOGI(TAG, "Reserving pool of %dK of internal memory for DMA/internal allocations", size / 1024); + dma_heap = heap_caps_malloc(size, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL); + if (!dma_heap) { + return ESP_ERR_NO_MEM; + } + uint32_t caps[] = {MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL, 0, MALLOC_CAP_8BIT | MALLOC_CAP_32BIT}; + return heap_caps_add_region_with_caps(caps, (intptr_t) dma_heap, (intptr_t) dma_heap + size - 1); } size_t esp_spiram_get_size(void) @@ -303,11 +301,17 @@ size_t esp_spiram_get_size(void) abort(); } - psram_size_t size=psram_get_size(); - if (size==PSRAM_SIZE_16MBITS) return 2*1024*1024; - if (size==PSRAM_SIZE_32MBITS) return 4*1024*1024; - if (size==PSRAM_SIZE_64MBITS) return 8*1024*1024; - return SPIRAM_SIZE; + psram_size_t size = psram_get_size(); + if (size == PSRAM_SIZE_16MBITS) { + return 2 * 1024 * 1024; + } + if (size == PSRAM_SIZE_32MBITS) { + return 4 * 1024 * 1024; + } + if (size == PSRAM_SIZE_64MBITS) { + return 8 * 1024 * 1024; + } + return CONFIG_SPIRAM_SIZE; } /* diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index a104b396b5..d2de4bcf55 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -54,6 +54,7 @@ #include "esp32s3/dport_access.h" #include "esp32s3/memprot.h" #include "soc/assist_debug_reg.h" +#include "soc/cache_memory.h" #endif #include "bootloader_flash_config.h" @@ -299,6 +300,13 @@ void IRAM_ATTR call_start_cpu0(void) extern void rom_config_data_cache_mode(uint32_t cfg_cache_size, uint8_t cfg_cache_ways, uint8_t cfg_cache_line_size); rom_config_data_cache_mode(CONFIG_ESP32S3_DATA_CACHE_SIZE, CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS, CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE); Cache_Resume_DCache(0); + + /* Configure the Cache MMU size for instruction and rodata in flash. */ + extern uint32_t Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size); + extern int _rodata_reserved_start; + uint32_t rodata_reserved_start_align = (uint32_t)&_rodata_reserved_start & ~(MMU_PAGE_SIZE - 1); + uint32_t cache_mmu_irom_size = ((rodata_reserved_start_align - SOC_DROM_LOW) / MMU_PAGE_SIZE) * sizeof(uint32_t); + Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size); #endif bootloader_init_mem(); @@ -351,7 +359,7 @@ void IRAM_ATTR call_start_cpu0(void) } #endif -#if CONFIG_IDF_TARGET_ESP32S2 +#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS extern void instruction_flash_page_info_init(void); instruction_flash_page_info_init(); @@ -381,7 +389,7 @@ void IRAM_ATTR call_start_cpu0(void) extern void esp_enable_cache_wrap(uint32_t icache_wrap_enable, uint32_t dcache_wrap_enable); esp_enable_cache_wrap(icache_wrap_enable, dcache_wrap_enable); #endif -#endif // CONFIG_IDF_TARGET_ESP32S2 +#endif // CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY memset(&_ext_ram_bss_start, 0, (&_ext_ram_bss_end - &_ext_ram_bss_start) * sizeof(_ext_ram_bss_start)); diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c index 6020157e15..a6a24b4a23 100644 --- a/components/spi_flash/flash_mmap.c +++ b/components/spi_flash/flash_mmap.c @@ -65,6 +65,7 @@ #define MMU_ADDR_MASK DPORT_MMU_ADDRESS_MASK #define VADDR1_START_ADDR 0x40000000 #define PRO_IRAM0_FIRST_USABLE_PAGE ((VADDR1_FIRST_USABLE_ADDR - VADDR1_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE + IROM0_PAGES_START) +#define VADDR0_START_ADDR SOC_DROM_LOW #elif CONFIG_IDF_TARGET_ESP32S2 #define PAGES_PER_REGION 64 #define REGIONS_COUNT 6 @@ -76,27 +77,28 @@ #define INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL #define MMU_ADDR_MASK MMU_ADDRESS_MASK #define PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH) -#define VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW +#define VADDR1_START_ADDR 0x40000000 #define PRO_IRAM0_FIRST_USABLE_PAGE ((VADDR1_FIRST_USABLE_ADDR - VADDR1_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE + IROM0_PAGES_START) +#define VADDR0_START_ADDR SOC_DROM_LOW #elif CONFIG_IDF_TARGET_ESP32S3 #define REGIONS_COUNT 2 #define PAGES_PER_REGION 256 -#define IROM0_PAGES_START (CACHE_IBUS_MMU_START / sizeof(uint32_t)) -#define IROM0_PAGES_END (CACHE_IBUS_MMU_END / sizeof(uint32_t)) -#define DROM0_PAGES_START (CACHE_DBUS_MMU_START / sizeof(uint32_t)) -#define DROM0_PAGES_END (CACHE_DBUS_MMU_END / sizeof(uint32_t)) +#define IROM0_PAGES_START (CACHE_IROM_MMU_START / sizeof(uint32_t)) +#define IROM0_PAGES_END (CACHE_IROM_MMU_END / sizeof(uint32_t)) +#define DROM0_PAGES_START (CACHE_DROM_MMU_START / sizeof(uint32_t)) +#define DROM0_PAGES_END (CACHE_DROM_MMU_END / sizeof(uint32_t)) #define DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE #define INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL #define MMU_ADDR_MASK MMU_ADDRESS_MASK #define PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH) #define VADDR1_START_ADDR IRAM0_CACHE_ADDRESS_LOW #define PRO_IRAM0_FIRST_USABLE_PAGE (IROM0_PAGES_START) +#define VADDR0_START_ADDR (SOC_DROM_LOW + (DROM0_PAGES_START * SPI_FLASH_MMU_PAGE_SIZE)) #endif #define IROM0_PAGES_NUM (IROM0_PAGES_END - IROM0_PAGES_START) #define DROM0_PAGES_NUM (DROM0_PAGES_END - DROM0_PAGES_START) #define PAGES_LIMIT (IROM0_PAGES_END > DROM0_PAGES_END ? IROM0_PAGES_END:DROM0_PAGES_END) -#define VADDR0_START_ADDR SOC_DROM_LOW #define VADDR1_FIRST_USABLE_ADDR SOC_IROM_LOW typedef struct mmap_entry_{ diff --git a/components/spi_flash/test/test_mmap.c b/components/spi_flash/test/test_mmap.c index 4c38511f57..ab0772eceb 100644 --- a/components/spi_flash/test/test_mmap.c +++ b/components/spi_flash/test/test_mmap.c @@ -324,9 +324,8 @@ TEST_CASE("flash_mmap can mmap after get enough free MMU pages", "[spi_flash][mm } } uint32_t free_pages = spi_flash_mmap_get_free_pages(SPI_FLASH_MMAP_DATA); - if (spi_flash_get_chip_size() <= 0x200000) { - free_pages -= 0x200000/0x10000; - } + uint32_t flash_pages = spi_flash_get_chip_size() / SPI_FLASH_MMU_PAGE_SIZE; + free_pages = (free_pages > flash_pages) ? flash_pages : free_pages; printf("Mapping %x (+%x)\n", 0, free_pages * SPI_FLASH_MMU_PAGE_SIZE); const void *ptr2;