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https://github.com/espressif/esp-idf.git
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Merge branch 'bugfix/fix_a_wifi_rx_bug' into 'master'
esp_wifi: fix a WiFi receiving bug Closes WIFI-492 See merge request espressif/esp-idf!5834
This commit is contained in:
commit
2753dd2fc2
@ -561,6 +561,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs = {
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._dport_access_stall_other_cpu_end_wrap = esp_dport_access_stall_other_cpu_end_wrap,
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._dport_access_stall_other_cpu_end_wrap = esp_dport_access_stall_other_cpu_end_wrap,
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._phy_rf_deinit = esp_phy_rf_deinit,
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._phy_rf_deinit = esp_phy_rf_deinit,
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._phy_load_cal_and_init = esp_phy_load_cal_and_init,
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._phy_load_cal_and_init = esp_phy_load_cal_and_init,
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._phy_common_clock_enable = esp_phy_common_clock_enable,
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._phy_common_clock_disable = esp_phy_common_clock_disable,
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._read_mac = esp_read_mac,
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._read_mac = esp_read_mac,
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._timer_arm = timer_arm_wrapper,
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._timer_arm = timer_arm_wrapper,
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._timer_disarm = timer_disarm_wrapper,
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._timer_disarm = timer_disarm_wrapper,
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@ -202,6 +202,18 @@ esp_err_t esp_phy_rf_deinit(phy_rf_module_t module);
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*/
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*/
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void esp_phy_load_cal_and_init(phy_rf_module_t module);
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void esp_phy_load_cal_and_init(phy_rf_module_t module);
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/**
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* @brief Enable WiFi/BT common clock
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*
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*/
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void esp_phy_common_clock_enable(void);
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/**
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* @brief Disable WiFi/BT common clock
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*
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*/
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void esp_phy_common_clock_disable(void);
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/**
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/**
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* @brief Module requires to enter modem sleep
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* @brief Module requires to enter modem sleep
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*/
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*/
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@ -79,6 +79,8 @@ typedef struct {
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void (* _dport_access_stall_other_cpu_end_wrap)(void);
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void (* _dport_access_stall_other_cpu_end_wrap)(void);
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int32_t (* _phy_rf_deinit)(uint32_t module);
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int32_t (* _phy_rf_deinit)(uint32_t module);
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void (* _phy_load_cal_and_init)(uint32_t module);
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void (* _phy_load_cal_and_init)(uint32_t module);
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void (* _phy_common_clock_enable)(void);
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void (* _phy_common_clock_disable)(void);
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int32_t (* _read_mac)(uint8_t* mac, uint32_t type);
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int32_t (* _read_mac)(uint8_t* mac, uint32_t type);
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void (* _timer_arm)(void *timer, uint32_t tmout, bool repeat);
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void (* _timer_arm)(void *timer, uint32_t tmout, bool repeat);
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void (* _timer_disarm)(void *timer);
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void (* _timer_disarm)(void *timer);
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@ -1 +1 @@
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Subproject commit b64f976ee8cb345f686b345da35dfbbc72ae054e
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Subproject commit dcbca2f6b342049d78ec7790aaea77ccc3a4a69b
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@ -57,6 +57,12 @@ static uint32_t s_module_phy_rf_init = 0;
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/* Whether modem sleep is turned on */
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/* Whether modem sleep is turned on */
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static volatile bool s_is_phy_rf_en = false;
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static volatile bool s_is_phy_rf_en = false;
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/* Whether WiFi/BT common clock enabled reference */
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static volatile int32_t s_common_clock_enable_ref = 0;
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/* PHY spinlock mux */
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static portMUX_TYPE s_phy_spin_lock = portMUX_INITIALIZER_UNLOCKED;
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/* Bit mask of modules needing to enter modem sleep mode */
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/* Bit mask of modules needing to enter modem sleep mode */
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static uint32_t s_modem_sleep_module_enter = 0;
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static uint32_t s_modem_sleep_module_enter = 0;
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@ -124,6 +130,55 @@ static inline void phy_update_wifi_mac_time(bool en_clock_stopped, int64_t now)
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}
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}
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#endif
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#endif
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IRAM_ATTR static inline void phy_spin_lock(void)
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{
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if (xPortInIsrContext()) {
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portENTER_CRITICAL_ISR(&s_phy_spin_lock);
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} else {
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portENTER_CRITICAL(&s_phy_spin_lock);
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}
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}
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IRAM_ATTR static inline void phy_spin_unlock(void)
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{
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if (xPortInIsrContext()) {
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portEXIT_CRITICAL_ISR(&s_phy_spin_lock);
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} else {
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portEXIT_CRITICAL(&s_phy_spin_lock);
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}
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}
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IRAM_ATTR void esp_phy_common_clock_enable(void)
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{
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phy_spin_lock();
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if (s_common_clock_enable_ref == 0) {
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// Enable WiFi/BT common clock
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periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
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}
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s_common_clock_enable_ref++;
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phy_spin_unlock();
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}
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IRAM_ATTR void esp_phy_common_clock_disable(void)
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{
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phy_spin_lock();
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if (s_common_clock_enable_ref > 0) {
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s_common_clock_enable_ref --;
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if (s_common_clock_enable_ref == 0) {
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// Disable WiFi/BT common clock
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periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
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}
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} else {
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abort();
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}
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phy_spin_unlock();
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}
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esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibration_mode_t mode,
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esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibration_mode_t mode,
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esp_phy_calibration_data_t* calibration_data, phy_rf_module_t module)
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esp_phy_calibration_data_t* calibration_data, phy_rf_module_t module)
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{
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{
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@ -173,8 +228,7 @@ esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibrat
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// Update WiFi MAC time before WiFi/BT common clock is enabled
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// Update WiFi MAC time before WiFi/BT common clock is enabled
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phy_update_wifi_mac_time(false, s_phy_rf_en_ts);
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phy_update_wifi_mac_time(false, s_phy_rf_en_ts);
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#endif
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#endif
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// Enable WiFi/BT common peripheral clock
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esp_phy_common_clock_enable();
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periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
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phy_set_wifi_mode_only(0);
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phy_set_wifi_mode_only(0);
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#if CONFIG_IDF_TARGET_ESP32S2BETA
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#if CONFIG_IDF_TARGET_ESP32S2BETA
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@ -269,7 +323,7 @@ esp_err_t esp_phy_rf_deinit(phy_rf_module_t module)
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phy_update_wifi_mac_time(true, esp_timer_get_time());
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phy_update_wifi_mac_time(true, esp_timer_get_time());
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#endif
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#endif
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// Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
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// Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
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periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
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esp_phy_common_clock_disable();
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}
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}
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}
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}
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