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fix(gdma): fixed compilation failure of gdma

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This commit is contained in:
laokaiyao 2023-07-24 12:22:31 +08:00
parent 57c6c0a1a3
commit 274e1c0089
8 changed files with 27 additions and 15 deletions
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6
components/esp_hw_support/dma/gdma.c
View File

@ -755,14 +755,14 @@ void gdma_default_rx_isr(void *args)
need_yield |= rx_chan->cbs.on_descr_err(&rx_chan->base, NULL, rx_chan->user_data); need_yield |= rx_chan->cbs.on_descr_err(&rx_chan->base, NULL, rx_chan->user_data);
} }
if ((intr_status & GDMA_LL_EVENT_RX_SUC_EOF) && rx_chan->cbs.on_recv_eof) { if ((intr_status & GDMA_LL_EVENT_RX_SUC_EOF) && rx_chan->cbs.on_recv_eof) {
uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id); uint32_t eof_addr = gdma_hal_get_eof_desc_addr(&group->hal, pair->pair_id, GDMA_CHANNEL_DIRECTION_RX, true);
gdma_event_data_t suc_eof_data = { gdma_event_data_t suc_eof_data = {
.rx_eof_desc_addr = eof_addr, .rx_eof_desc_addr = eof_addr,
}; };
need_yield |= rx_chan->cbs.on_recv_eof(&rx_chan->base, &suc_eof_data, rx_chan->user_data); need_yield |= rx_chan->cbs.on_recv_eof(&rx_chan->base, &suc_eof_data, rx_chan->user_data);
} }
if ((intr_status & GDMA_LL_EVENT_RX_ERR_EOF) && rx_chan->cbs.on_recv_eof) { if ((intr_status & GDMA_LL_EVENT_RX_ERR_EOF) && rx_chan->cbs.on_recv_eof) {
uint32_t eof_addr = gdma_ll_rx_get_error_eof_desc_addr(group->hal.dev, pair->pair_id); uint32_t eof_addr = gdma_hal_get_eof_desc_addr(&group->hal, pair->pair_id, GDMA_CHANNEL_DIRECTION_RX, false);
gdma_event_data_t err_eof_data = { gdma_event_data_t err_eof_data = {
.rx_eof_desc_addr = eof_addr, .rx_eof_desc_addr = eof_addr,
.flags.abnormal_eof = true, .flags.abnormal_eof = true,
@ -788,7 +788,7 @@ void gdma_default_tx_isr(void *args)
gdma_hal_clear_intr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX, intr_status); gdma_hal_clear_intr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX, intr_status);
if ((intr_status & GDMA_LL_EVENT_TX_EOF) && tx_chan->cbs.on_trans_eof) { if ((intr_status & GDMA_LL_EVENT_TX_EOF) && tx_chan->cbs.on_trans_eof) {
uint32_t eof_addr = gdma_hal_get_eof_desc_addr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX); uint32_t eof_addr = gdma_hal_get_eof_desc_addr(hal, pair_id, GDMA_CHANNEL_DIRECTION_TX, true);
gdma_event_data_t edata = { gdma_event_data_t edata = {
.tx_eof_desc_addr = eof_addr, .tx_eof_desc_addr = eof_addr,
}; };

8
components/hal/gdma_hal_ahb_v1.c
View File

@ -148,11 +148,15 @@ uint32_t gdma_ahb_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id,
} }
} }
uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir) uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success)
{ {
if (dir == GDMA_CHANNEL_DIRECTION_RX) { if (dir == GDMA_CHANNEL_DIRECTION_RX) {
return gdma_ll_rx_get_success_eof_desc_addr(hal->dev, chan_id); if (is_success) {
return gdma_ll_rx_get_success_eof_desc_addr(hal->dev, chan_id);
}
return gdma_ll_rx_get_error_eof_desc_addr(hal->dev, chan_id);
} else { } else {
// The TX direction only has success EOF, parameter 'is_success' is ignored
return gdma_ll_tx_get_eof_desc_addr(hal->dev, chan_id); return gdma_ll_tx_get_eof_desc_addr(hal->dev, chan_id);
} }
} }

8
components/hal/gdma_hal_ahb_v2.c
View File

@ -137,11 +137,15 @@ uint32_t gdma_ahb_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id,
} }
} }
uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir) uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success)
{ {
if (dir == GDMA_CHANNEL_DIRECTION_RX) { if (dir == GDMA_CHANNEL_DIRECTION_RX) {
return ahb_dma_ll_rx_get_success_eof_desc_addr(hal->ahb_dma_dev, chan_id); if (is_success) {
return ahb_dma_ll_rx_get_success_eof_desc_addr(hal->ahb_dma_dev, chan_id);
}
return ahb_dma_ll_rx_get_error_eof_desc_addr(hal->ahb_dma_dev, chan_id);
} else { } else {
// The TX direction only has success EOF, parameter 'is_success' is ignored
return ahb_dma_ll_tx_get_eof_desc_addr(hal->ahb_dma_dev, chan_id); return ahb_dma_ll_tx_get_eof_desc_addr(hal->ahb_dma_dev, chan_id);
} }
} }

8
components/hal/gdma_hal_axi.c
View File

@ -137,11 +137,15 @@ uint32_t gdma_axi_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id,
} }
} }
uint32_t gdma_axi_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir) uint32_t gdma_axi_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success)
{ {
if (dir == GDMA_CHANNEL_DIRECTION_RX) { if (dir == GDMA_CHANNEL_DIRECTION_RX) {
return axi_dma_ll_rx_get_success_eof_desc_addr(hal->axi_dma_dev, chan_id); if (is_success) {
return axi_dma_ll_rx_get_success_eof_desc_addr(hal->axi_dma_dev, chan_id);
}
return axi_dma_ll_rx_get_error_eof_desc_addr(hal->axi_dma_dev, chan_id);
} else { } else {
// The TX direction only has success EOF, parameter 'is_success' is ignored
return axi_dma_ll_tx_get_eof_desc_addr(hal->axi_dma_dev, chan_id); return axi_dma_ll_tx_get_eof_desc_addr(hal->axi_dma_dev, chan_id);
} }
} }

4
components/hal/gdma_hal_top.c
View File

@ -85,7 +85,7 @@ uint32_t gdma_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma
return hal->get_intr_status_reg(hal, chan_id, dir); return hal->get_intr_status_reg(hal, chan_id, dir);
} }
uint32_t gdma_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir) uint32_t gdma_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success)
{ {
return hal->get_eof_desc_addr(hal, chan_id, dir); return hal->get_eof_desc_addr(hal, chan_id, dir, is_success);
} }

4
components/hal/include/hal/gdma_hal.h
View File

@ -79,7 +79,7 @@ struct gdma_hal_context_t {
void (*enable_intr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask, bool en_or_dis); /// Enable the channel interrupt void (*enable_intr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask, bool en_or_dis); /// Enable the channel interrupt
void (*clear_intr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask); /// Clear the channel interrupt void (*clear_intr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask); /// Clear the channel interrupt
uint32_t (*read_intr_status)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Read the channel interrupt status uint32_t (*read_intr_status)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Read the channel interrupt status
uint32_t (*get_eof_desc_addr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); /// Get the address of the descriptor with EOF flag set uint32_t (*get_eof_desc_addr)(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success); /// Get the address of the descriptor with success/error EOF flag set
}; };
void gdma_hal_deinit(gdma_hal_context_t *hal); void gdma_hal_deinit(gdma_hal_context_t *hal);
@ -112,7 +112,7 @@ uint32_t gdma_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma
uint32_t gdma_hal_read_intr_status(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_hal_read_intr_status(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
uint32_t gdma_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success);
#ifdef __cplusplus #ifdef __cplusplus
} }

2
components/hal/include/hal/gdma_hal_ahb.h
View File

@ -40,7 +40,7 @@ uint32_t gdma_ahb_hal_read_intr_status(gdma_hal_context_t *hal, int chan_id, gdm
uint32_t gdma_ahb_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_ahb_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_ahb_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success);
void gdma_ahb_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config); void gdma_ahb_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config);

2
components/hal/include/hal/gdma_hal_axi.h
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@ -40,7 +40,7 @@ uint32_t gdma_axi_hal_read_intr_status(gdma_hal_context_t *hal, int chan_id, gdm
uint32_t gdma_axi_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_axi_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir);
uint32_t gdma_axi_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir); uint32_t gdma_axi_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success);
void gdma_axi_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config); void gdma_axi_hal_init(gdma_hal_context_t *hal, const gdma_hal_config_t *config);