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uart: update ll layer with new register
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3c3e802048
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26c808610c
@ -879,7 +879,7 @@ FORCE_INLINE_ATTR void uart_ll_set_autobaud_en(uart_dev_t *hw, bool enable)
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*/
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FORCE_INLINE_ATTR uint32_t uart_ll_get_rxd_edge_cnt(uart_dev_t *hw)
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{
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return hw->rxd_cnt.edge_cnt;
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return hw->rxd_cnt.rxd_edge_cnt;
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}
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/**
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@ -889,7 +889,7 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_rxd_edge_cnt(uart_dev_t *hw)
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*/
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FORCE_INLINE_ATTR uint32_t uart_ll_get_pos_pulse_cnt(uart_dev_t *hw)
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{
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return hw->pospulse.min_cnt;
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return hw->pospulse.posedge_min_cnt;
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}
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/**
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@ -899,7 +899,7 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_pos_pulse_cnt(uart_dev_t *hw)
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*/
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FORCE_INLINE_ATTR uint32_t uart_ll_get_neg_pulse_cnt(uart_dev_t *hw)
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{
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return hw->negpulse.min_cnt;
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return hw->negpulse.negedge_min_cnt;
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}
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/**
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@ -909,7 +909,7 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_neg_pulse_cnt(uart_dev_t *hw)
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*/
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FORCE_INLINE_ATTR uint32_t uart_ll_get_high_pulse_cnt(uart_dev_t *hw)
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{
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return hw->highpulse.min_cnt;
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return hw->highpulse.highpulse_min_cnt;
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}
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/**
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@ -919,7 +919,7 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_high_pulse_cnt(uart_dev_t *hw)
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*/
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FORCE_INLINE_ATTR uint32_t uart_ll_get_low_pulse_cnt(uart_dev_t *hw)
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{
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return hw->lowpulse.min_cnt;
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return hw->lowpulse.lowpulse_min_cnt;
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}
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/**
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