Merge branch 'bugfix/idf_size_wrong_memory_calculations' into 'master'

Tools: Fix memory calculations of idf_size.py

Closes IDF-3246 and IDF-2434

See merge request espressif/esp-idf!14347
This commit is contained in:
Roland Dobai 2021-08-12 11:36:36 +00:00
commit 26bc4971ac
14 changed files with 64798 additions and 15421 deletions

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@ -46,7 +46,7 @@ MEMORY
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped instruction data */
iram0_2_seg (RX) : org = 0x42000020, len = 0x8000000-0x20
iram0_2_seg (RX) : org = 0x42000020, len = 0x800000-0x20
/**
* (0x20 offset above is a convenience for the app binary image generation.
@ -65,7 +65,7 @@ MEMORY
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped constant data */
drom0_0_seg (R) : org = 0x3C000020, len = 0x8000000-0x20
drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

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@ -21,15 +21,34 @@
#define ESP_BOOTLOADER_RESERVE_RTC 0
#endif
/*
* 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
* 3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000
*
* Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static
* memory, but can only be used after app starts.
*
* D cache use the memory from high address, so when it's configured to 16K/32K, the region
* 0x3FCF000 ~ (3FD00000 - DATA_CACHE_SIZE) should be available. This region is not used as
* static memory, leaving to the heap.
*/
#define SRAM_IRAM_START 0x40370000
#define SRAM_DRAM_START 0x3FC80000
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
#define SRAM_DRAM_END 0x403BA000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_DIRAM_I_START 0x40378000
#define SRAM_IRAM_END 0x403BA000
#define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START)
#define SRAM_DRAM_START 0x3FC88000
#define SRAM_DRAM_END (SRAM_IRAM_END - I_D_SRAM_OFFSET) /* 2nd stage bootloader iram_loader_seg start address */
#define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_START)
#define ICACHE_SIZE 0x8000
#define SRAM_IRAM_ORG (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_DRAM_ORG (SRAM_DRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define SRAM_IRAM_SIZE (I_D_SRAM_SIZE + ICACHE_SIZE - CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
#define I_D_SRAM_SIZE SRAM_DRAM_END - SRAM_DRAM_ORG
#define DCACHE_SIZE 0x10000
#define SRAM_DRAM_ORG (SRAM_DRAM_START)
#if CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE
ASSERT((CONFIG_ESP32S3_FIXED_STATIC_RAM_SIZE <= I_D_SRAM_SIZE), "Fixed static ram data does not fit.")
@ -47,11 +66,11 @@ MEMORY
*/
/* IRAM for PRO CPU. */
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = SRAM_IRAM_SIZE
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped instruction data */
iram0_2_seg (RX) : org = 0x42000020, len = 0x2000000-0x20
iram0_2_seg (RX) : org = 0x42000020, len = 0x800000-0x20
/**
* (0x20 offset above is a convenience for the app binary image generation.
@ -70,7 +89,7 @@ MEMORY
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
/* Flash mapped constant data */
drom0_0_seg (R) : org = 0x3C000020, len = 0x2000000-0x20
drom0_0_seg (R) : org = 0x3C000020, len = 0x800000-0x20
/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS

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@ -1,6 +1,8 @@
/* Default entry point */
ENTRY(call_start_cpu0);
_diram_i_start = 0x40378000;
SECTIONS
{
/**
@ -175,7 +177,7 @@ SECTIONS
*/
.dram0.dummy (NOLOAD):
{
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
} > dram0_0_seg
.dram0.data :

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@ -69,7 +69,9 @@ const soc_memory_region_t soc_memory_regions[] = {
{ 0x3FCC0000, 0x10000, 2, 0x403B0000}, //Level 6, IDRAM, can be used as trace memroy
{ 0x3FCD0000, 0x10000, 2, 0x403C0000}, //Level 7, IDRAM, can be used as trace memroy
{ 0x3FCE0000, 0x10000, 1, 0}, //Level 8, IDRAM, can be used as trace memroy, contains stacks used by startup flow, recycled by heap allocator in app_main task
#if CONFIG_ESP32S3_DATA_CACHE_32KB
#if CONFIG_ESP32S3_DATA_CACHE_16KB
{ 0x3FCF0000, 0xC000, 0, 0}, //Level 9, DRAM
#elif CONFIG_ESP32S3_DATA_CACHE_32KB
{ 0x3FCF0000, 0x8000, 0, 0}, //Level 9, DRAM
#endif
#ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
@ -93,11 +95,11 @@ SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start, dram_d
// ESP32S3 has a big D/IRAM region, the part used by code is reserved
// The address of the D/I bus are in the same order, directly shift IRAM address to get reserved DRAM address
#define I_D_OFFSET (SOC_DIRAM_IRAM_LOW - SOC_DIRAM_DRAM_LOW)
#if CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_start + 0x4000, iram_code_1);
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start + 0x4000 - I_D_OFFSET, (intptr_t)&_iram_end - I_D_OFFSET, iram_code_2);
#else
// .text region in diram. DRAM used by text (shared with IBUS).
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start - I_D_OFFSET, (intptr_t)&_iram_end - I_D_OFFSET, iram_code);
#if CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_end, iram_code_2);
#endif
#ifdef CONFIG_SPIRAM

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@ -230,7 +230,6 @@ tools/idf_py_actions/global_options.py
tools/idf_py_actions/serial_ext.py
tools/idf_py_actions/tools.py
tools/idf_py_actions/uf2_ext.py
tools/idf_size.py
tools/kconfig_new/confgen.py
tools/kconfig_new/confserver.py
tools/kconfig_new/esp-windows-curses/setup.py
@ -271,7 +270,6 @@ tools/test_idf_py/extra_path/some_ext.py
tools/test_idf_py/idf_ext.py
tools/test_idf_py/test_idf_extensions/test_ext/test_extension.py
tools/test_idf_py/test_idf_py.py
tools/test_idf_size/test_idf_size.py
tools/test_idf_tools/test_idf_tools.py
tools/test_mkdfu/test_mkdfu.py
tools/test_mkuf2/test_mkuf2.py

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@ -1,17 +1,32 @@
{
"dram_data": 9324,
"dram_bss": 8296,
"dram_rodata": 0,
"dram_other": 0,
"used_dram": 17620,
"available_dram": 163116,
"dram_total": 180736,
"used_dram_ratio": 0.09749026203966006,
"dram_remain": 163116,
"iram_vectors": 1024,
"iram_text": 37908,
"iram_other": 0,
"used_iram": 38932,
"available_iram": 92140,
"iram_total": 131072,
"used_iram_ratio": 0.297027587890625,
"used_diram": 0,
"available_diram": 0,
"used_diram_ratio": 0,
"iram_remain": 92140,
"diram_data": 9324,
"diram_bss": 8296,
"diram_text": 37908,
"diram_vectors": 1024,
"diram_rodata": 0,
"diram_other": 0,
"diram_total": 311808,
"used_diram": 56552,
"used_diram_ratio": 0.18136802134646962,
"diram_remain": 255256,
"flash_code": 146944,
"flash_rodata": 39580,
"total_size": 234780
"flash_other": 0,
"used_flash_non_ram": 186524,
"total_size": 283036
}

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@ -1,8 +1,16 @@
Total sizes:
DRAM .data size: 9324 bytes
DRAM .bss size: 8296 bytes
Used static DRAM: 17620 bytes ( 163116 available, 9.7% used)
Used static IRAM: 38932 bytes ( 92140 available, 29.7% used)
Flash code: 146944 bytes
Flash rodata: 39580 bytes
Total image size:~ 234780 bytes (.bin may be padded larger)
Used static DRAM: 17620 bytes ( 163116 remain, 9.7% used)
.data size: 9324 bytes
.bss size: 8296 bytes
Used static IRAM: 38932 bytes ( 92140 remain, 29.7% used)
.text size: 37908 bytes
.vectors size: 1024 bytes
Used stat D/IRAM: 56552 bytes ( 255256 remain, 18.1% used)
.data size: 9324 bytes
.bss size: 8296 bytes
.text size: 37908 bytes
.vectors size: 1024 bytes
Used Flash size : 186524 bytes
.text : 146944 bytes
.rodata : 39580 bytes
Total image size: 283036 bytes (.bin may be padded larger)

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@ -64,8 +64,36 @@
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s2 --archive_details libdriver.a app_esp32s2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py diff with another app (different target)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py app.map --diff app_esp32s2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py diff with another app (wrong target)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s2 app.map --diff app2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32h2..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 app_esp32h2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32h2 (target autodetected)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py app_esp32h2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archives for esp32h2..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --archives app_esp32h2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --files for esp32h2..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --files app_esp32h2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archive_details for esp32h2..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32h2 --archive_details libdriver.a app_esp32h2.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32c3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32c3 app_esp32c3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32c3 (target autodetected)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py app_esp32c3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archives for esp32c3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32c3 --archives app_esp32c3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --files for esp32c3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32c3 --files app_esp32c3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archive_details for esp32c3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32c3 --archive_details libdriver.a app_esp32c3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32s3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s3 app_esp32s3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py for esp32s3 (target autodetected)..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py app_esp32s3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archives for esp32s3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s3 --archives app_esp32s3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --files for esp32s3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s3 --files app_esp32s3.map &>> output \
&& echo -e "\n***\nRunning idf_size.py --archive_details for esp32s3..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --target esp32s3 --archive_details libdriver.a app_esp32s3.map &>> output \
&& echo -e "\n***\nProducing JSON output..." &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --json app.map &>> output \
&& coverage run -a $IDF_PATH/tools/idf_size.py --json --archives app.map &>> output \

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@ -16,8 +16,8 @@
from __future__ import print_function
import collections
import sys
from typing import Dict
try:
import idf_size
@ -35,16 +35,13 @@ if __name__ == '__main__':
# Should deliver a RuntimeError as there's no content under the heading
try:
idf_size.load_memory_config(['Memory Configuration'])
idf_size.load_segments(['Memory Configuration'])
pass
except RuntimeError as e:
assert 'End of file' in str(e)
# This used to crash with a division by zero error but now it just prints nan% due to
# zero lengths
MemRegNames = collections.namedtuple('MemRegNames', ['iram_names', 'dram_names', 'diram_names', 'used_iram_names',
'used_dram_names', 'used_diram_names'])
mem_reg = MemRegNames(set(), set(), set(), set(), set(), set())
segments = {'iram0_0_seg': {'origin': 0, 'length': 0},
'dram0_0_seg': {'origin': 0, 'length': 0}}
sections = {} # type: Dict
print(idf_size.get_summary('a.map', mem_reg, {'iram0_0_seg': {'origin':0,'length':0}, 'dram0_0_seg':
{'origin':0, 'length':0}}, {}), end='')
print(idf_size.get_summary('a.map', segments, sections, 'esp32'), end='')