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docs: Update gpio programming guide for esp32c2

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songruojing 2022-02-15 11:38:49 +08:00
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1
docs/docs_not_updated/esp32c2.txt
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@ -85,7 +85,6 @@ api-reference/storage/sdmmc
api-reference/storage/mass_mfg
api-reference/storage/index
api-reference/peripherals/adc
api-reference/peripherals/gpio
api-reference/peripherals/sdspi_host
api-reference/peripherals/spi_slave
api-reference/peripherals/lcd

113
docs/en/api-reference/peripherals/gpio.rst
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@ -6,7 +6,7 @@ Overview
.. only:: esp32
The {IDF_TARGET_NAME} chip features 34 physical GPIO pads. Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
The {IDF_TARGET_NAME} chip features 35 physical GPIO pads (GPIO0 ~ GPIO23, GPIO25 ~ GPIO27, and GPIO32 ~ GPIO39). Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__].
Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal. The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
@ -206,7 +206,7 @@ Overview
.. only:: esp32s2
The {IDF_TARGET_NAME} chip features 43 physical GPIO pads. Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The {IDF_TARGET_NAME} chip features 43 physical GPIO pads (GPIO0 ~ GPIO21 and GPIO26 ~ GPIO46). Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
@ -444,7 +444,7 @@ Overview
.. only:: esp32c3
The {IDF_TARGET_NAME} chip features 22 physical GPIO pads. Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The {IDF_TARGET_NAME} chip features 22 physical GPIO pads (GPIO0 ~ GPIO21). Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
@ -557,7 +557,7 @@ Overview
.. only:: esp32s3
The {IDF_TARGET_NAME} chip features 45 physical GPIO pads. Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The {IDF_TARGET_NAME} chip features 45 physical GPIO pads (GPIO0 ~ GPIO21 and GPIO26 ~ GPIO48). Some GPIO pads cannot be used or do not have the corresponding pin on the chip package. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
@ -801,6 +801,111 @@ Overview
- SPI0/1: GPIO26-32 are usually used for SPI flash and PSRAM and not recommended for other uses. When using Octal Flash or Octal PSRAM or both, GPIO33~37 are connected to SPIIO4 ~ SPIIO7 and SPIDQS. Therefore on ESP32-S3R8 / ESP32-S3R8V board GPIO33~37 are also not recommended for other uses.
- USB-JTAG: GPIO 19 and 20 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers.
.. only:: esp32c2
The {IDF_TARGET_NAME} chip features 21 physical GPIO pads (GPIO0 ~ GPIO20). For chip variants with an SiP flash built in, GPIO11 ~ GPIO17 are dedicated to connecting the SiP flash; therefore, only 14 GPIO pins are available. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. Each pad can be used as a general purpose I/O or can be connected to an internal peripheral signal.
The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.
.. list-table::
:header-rows: 1
:widths: 12 12 22
* - GPIO
- Analog Function
- Comment
* - GPIO0
- ADC1_CH0
- RTC
* - GPIO1
- ADC1_CH1
- RTC
* - GPIO2
- ADC1_CH2
- RTC
* - GPIO3
- ADC1_CH3
- RTC
* - GPIO4
- ADC1_CH4
- RTC
* - GPIO5
-
- RTC
* - GPIO6
-
-
* - GPIO7
-
-
* - GPIO8
-
- Strapping pin
* - GPIO9
-
- Strapping pin
* - GPIO10
-
-
* - GPIO11
-
-
* - GPIO12
-
- SPI0/1
* - GPIO13
-
- SPI0/1
* - GPIO14
-
- SPI0/1
* - GPIO15
-
- SPI0/1
* - GPIO16
-
- SPI0/1
* - GPIO17
-
- SPI0/1
* - GPIO18
-
-
* - GPIO19
-
-
* - GPIO20
-
-
.. note::
- Strapping pin: GPIO8 and GPIO9 are strapping pins. For more infomation, please refer to `ESP32-C2 datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-c2_datasheet_en.pdf>`_.
- SPI0/1: GPIO12-17 are usually used for SPI flash and not recommended for other uses.
- RTC: GPIO0-5 can be used when in deep sleep.
.. only:: SOC_RTCIO_INPUT_OUTPUT_SUPPORTED