From 2657d8f3079c1668a3444945b45cdc110e15e8cc Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Fri, 19 May 2023 16:26:58 +0800 Subject: [PATCH] Power Management: change the IO hold interface for esp32c6 --- components/esp_hw_support/Kconfig | 7 ++++--- components/esp_hw_support/sleep_modes.c | 8 ++++++-- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig index 328d6e708f..ec7038736e 100644 --- a/components/esp_hw_support/Kconfig +++ b/components/esp_hw_support/Kconfig @@ -76,11 +76,12 @@ menu "Hardware Settings" config ESP_SLEEP_GPIO_RESET_WORKAROUND bool "light sleep GPIO reset workaround" - default y if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C6 + default y if IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || \ + IDF_TARGET_ESP32C6 || IDF_TARGET_ESP32H2 select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE help - esp32c2, esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic - pulse during light sleep, with specific condition + esp32c2, esp32c3, esp32s3, esp32c6 and esp32h2 will reset at wake-up if GPIO is received + a small electrostatic pulse during light sleep, with specific condition - GPIO needs to be configured as input-mode only - The pin receives a small electrostatic pulse, and reset occurs when the pulse diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index c573890955..1a09e0e5b9 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -86,6 +86,7 @@ #include "esp_private/esp_pmu.h" #include "esp_private/sleep_sys_periph.h" #include "esp_private/sleep_clock.h" +#include "hal/gpio_ll.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp_private/sleep_retention.h" #include "esp32h2/rom/rtc.h" @@ -722,8 +723,9 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m /* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode. In order to avoid the leakage of the SPI cs pin, hold it here */ #if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND) +#if !CONFIG_IDF_TARGET_ESP32H2 // ESP32H2 TODO IDF-7359: related rtcio ll func not supported yet if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) { - rtcio_ll_force_hold_enable(SPI_CS0_GPIO_NUM); + gpio_ll_hold_en(&GPIO, SPI_CS0_GPIO_NUM); } #endif #endif @@ -742,9 +744,11 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m /* Unhold the SPI CS pin */ #if (CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND) +#if !CONFIG_IDF_TARGET_ESP32H2 // ESP32H2 TODO IDF-7359: related rtcio ll func not supported yet if(!(pd_flags & PMU_SLEEP_PD_VDDSDIO)) { - rtcio_ll_force_hold_disable(SPI_CS0_GPIO_NUM); + gpio_ll_hold_dis(&GPIO, SPI_CS0_GPIO_NUM); } +#endif #endif }