mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
mspi: support auto detect octal flash vendor
This commit is contained in:
Armando
parent
a5ba1ac395
commit
2655a506c9
@ -27,7 +27,7 @@
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#if CONFIG_SPIRAM_MODE_OCT
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#include "soc/rtc.h"
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#include "spi_flash_private.h"
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#include "esp_private/spi_flash_os.h"
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#define OPI_PSRAM_SYNC_READ 0x0000
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#define OPI_PSRAM_SYNC_WRITE 0x8080
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@ -153,7 +153,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
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int dummy = OCT_PSRAM_RD_DUMMY_BITLEN;
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int data_bit_len = 16;
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//Read MR0 register
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//Read MR0~1 register
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esp_rom_opiflash_exec_cmd(spi_num, mode,
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OPI_PSRAM_REG_READ, cmd_len,
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0x0, addr_bit_len,
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@ -162,7 +162,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
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&out_reg->mr0.val, data_bit_len,
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BIT(1),
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false);
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//Read MR2 register
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//Read MR2~3 register
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esp_rom_opiflash_exec_cmd(spi_num, mode,
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OPI_PSRAM_REG_READ, cmd_len,
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0x2, addr_bit_len,
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@ -171,6 +171,7 @@ static void IRAM_ATTR s_get_psram_mode_reg(int spi_num, opi_psram_mode_reg_t *ou
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&out_reg->mr2.val, data_bit_len,
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BIT(1),
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false);
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data_bit_len = 8;
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//Read MR4 register
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esp_rom_opiflash_exec_cmd(spi_num, mode,
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OPI_PSRAM_REG_READ, cmd_len,
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@ -244,9 +245,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
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//set to variable dummy mode
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SET_PERI_REG_MASK(SPI_MEM_DDR_REG(1), SPI_MEM_SPI_FMEM_VAR_DUMMY);
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#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC && CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
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esp_rom_spi_set_dtr_swap_mode(1, false, false);
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#endif
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//Set PSRAM read latency and drive strength
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static DRAM_ATTR opi_psram_mode_reg_t mode_reg = {0};
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@ -262,12 +261,9 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
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mode_reg.mr2.density == 0x5 ? PSRAM_SIZE_128MBITS :
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mode_reg.mr2.density == 0x7 ? PSRAM_SIZE_256MBITS : 0;
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#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC && CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
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esp_rom_spi_set_dtr_swap_mode(1, true, true);
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#endif
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//Do PSRAM timing tuning, we use SPI1 to do the tuning, and set the SPI0 PSRAM timing related registers accordingly
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spi_timing_psram_tuning();
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////Back to the high speed mode. Flash/PSRAM clocks are set to the clock that user selected. SPI0/1 registers are all set correctly
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//Back to the high speed mode. Flash/PSRAM clocks are set to the clock that user selected. SPI0/1 registers are all set correctly
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spi_timing_enter_mspi_high_speed_mode(true);
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/**
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@ -275,6 +271,8 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
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* This function is to restore SPI1 init state.
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*/
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spi_flash_set_rom_required_regs();
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//Flash chip requires MSPI specifically, call this function to set them
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spi_flash_set_vendor_required_regs();
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s_config_psram_spi_phases();
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return ESP_OK;
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@ -39,7 +39,7 @@
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#if CONFIG_SPIRAM_MODE_QUAD
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#include "soc/rtc.h"
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#include "spi_flash_private.h"
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#include "esp_private/spi_flash_os.h"
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static const char* TAG = "psram";
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@ -1,16 +1,8 @@
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// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <string.h>
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@ -64,7 +56,7 @@
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#include "esp32h2/memprot.h"
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#endif
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#include "spi_flash_private.h"
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#include "esp_private/spi_flash_os.h"
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#include "bootloader_flash_config.h"
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#include "bootloader_flash.h"
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#include "esp_private/crosscore_int.h"
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@ -371,18 +363,25 @@ void IRAM_ATTR call_start_cpu0(void)
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Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
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#endif // CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
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esp_mspi_pin_init();
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// For Octal flash, it's hard to implement a read_id function in OPI mode for all vendors.
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// So we have to read it here in SPI mode, before entering the OPI mode.
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bootloader_flash_update_id();
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#if CONFIG_ESPTOOLPY_OCT_FLASH
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bool efuse_opflash_en = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA3_REG, EFUSE_FLASH_TYPE);
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if (!efuse_opflash_en) {
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ESP_EARLY_LOGE(TAG, "Octal Flash option selected, but EFUSE not configured!");
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abort();
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}
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esp_opiflash_init();
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#endif
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esp_mspi_pin_init();
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// For Octal flash, it's hard to implement a read_id function in OPI mode for all vendors.
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// So we have to read it here in SPI mode, before entering the OPI mode.
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bootloader_flash_update_id();
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/**
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* This function initialise the Flash chip to the user-defined settings.
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*
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* In bootloader, we only init Flash (and MSPI) to a preliminary state, for being flexible to
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* different chips.
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* In this stage, we re-configure the Flash (and MSPI) to required configuration
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*/
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spi_flash_init_chip_state();
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#if CONFIG_IDF_TARGET_ESP32S3
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//On other chips, this feature is not provided by HW, or hasn't been tested yet.
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spi_timing_flash_tuning();
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@ -66,15 +66,6 @@ menu "Serial flasher config"
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bool "Enable Octal Flash"
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default n
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choice ESPTOOLPY_FLASH_VENDOR
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depends on ESPTOOLPY_OCT_FLASH
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prompt "Select OPI Flash Vendor"
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default ESPTOOLPY_FLASH_VENDOR_MXIC
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config ESPTOOLPY_FLASH_VENDOR_MXIC
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bool "MXIC OPI FLASH(MX25UM25645G)"
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endchoice
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choice ESPTOOLPY_FLASHMODE
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prompt "Flash SPI mode"
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default ESPTOOLPY_FLASHMODE_DIO
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@ -100,17 +91,16 @@ menu "Serial flasher config"
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bool "OPI"
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endchoice
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choice ESPTOOLPY_FLASHMODE_OCT
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depends on ESPTOOLPY_FLASHMODE_OPI
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prompt "Flash OPI mode"
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default ESPTOOLPY_FLASHMODE_OPI_DTR
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choice ESPTOOLPY_FLASH_SAMPLE_MODE
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prompt "Flash Sampling Mode"
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default ESPTOOLPY_FLASH_SAMPLE_MODE_DTR if ESPTOOLPY_OCT_FLASH
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default ESPTOOLPY_FLASH_SAMPLE_MODE_STR if !ESPTOOLPY_OCT_FLASH
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config ESPTOOLPY_FLASHMODE_OPI_STR
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depends on ESPTOOLPY_FLASH_VENDOR_MXIC
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bool "OPI_STR"
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config ESPTOOLPY_FLASHMODE_OPI_DTR
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depends on ESPTOOLPY_FLASH_VENDOR_MXIC
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bool "OPI_DTR"
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config ESPTOOLPY_FLASH_SAMPLE_MODE_STR
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bool "STR Mode"
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config ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
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depends on ESPTOOLPY_OCT_FLASH
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bool "DTR Mode"
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endchoice
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# Note: we use esptool.py to flash bootloader in
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@ -136,7 +126,7 @@ menu "Serial flasher config"
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The SPI flash frequency to be used.
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config ESPTOOLPY_FLASHFREQ_120M
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depends on ESPTOOLPY_FLASHMODE_OPI_STR || !ESPTOOLPY_OCT_FLASH
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depends on ESPTOOLPY_FLASH_SAMPLE_MODE_STR
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bool "120 MHz"
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config ESPTOOLPY_FLASHFREQ_80M
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bool "80 MHz"
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@ -4,9 +4,9 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC
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#if CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR
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#define OPI_CMD_FORMAT() { \
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#if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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#if CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
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#define OPI_CMD_FORMAT_MXIC() { \
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.rdid = { \
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.mode = ESP_ROM_SPIFLASH_OPI_STR_MODE, \
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.cmd_bit_len = 16, \
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@ -93,8 +93,8 @@
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} \
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}
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#elif CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
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#define OPI_CMD_FORMAT() { \
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#elif CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
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#define OPI_CMD_FORMAT_MXIC() { \
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.rdid = { \
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.mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE, \
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.cmd_bit_len = 16, \
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@ -180,5 +180,5 @@
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.var_dummy_en = 1, \
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} \
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}
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#endif
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#endif
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#endif // DTR / STR
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#endif // #if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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36
components/spi_flash/esp32s3/opi_flash_private.h
Normal file
36
components/spi_flash/esp32s3/opi_flash_private.h
Normal file
@ -0,0 +1,36 @@
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/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* System level OPI Flash APIs (private)
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Register ROM functions and init flash device registers to make use of octal flash
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*
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* @param chip_id Full device ID read via RDID command
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*/
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esp_err_t esp_opiflash_init(uint32_t chip_id);
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/**
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* @brief Set Octal Flash chip specifically required MSPI register settings here
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*/
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void esp_opiflash_set_required_regs(void);
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#ifdef __cplusplus
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}
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#endif
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@ -5,27 +5,33 @@
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*/
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#include "sdkconfig.h"
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#include "esp_log.h"
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#include "esp_err.h"
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#include "esp_rom_gpio.h"
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#include "esp32s3/rom/gpio.h"
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#include "esp32s3/rom/spi_flash.h"
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#include "esp32s3/rom/opi_flash.h"
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#include "spi_flash_private.h"
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#include "esp_private/spi_flash_os.h"
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#include "opi_flash_private.h"
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#include "soc/spi_mem_reg.h"
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#include "soc/io_mux_reg.h"
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#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC
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#include "opi_flash_cmd_format_mxic.h"
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#endif
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#define SPI_FLASH_SPI_CMD_WRCR2 0x72
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#define SPI_FLASH_SPI_CMD_RDSR 0x05
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#define SPI_FLASH_SPI_CMD_RDCR 0x15
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#define SPI_FLASH_SPI_CMD_WRSRCR 0x01
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/**
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* Supported Flash chip vendor id
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*/
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#define ESP_FLASH_CHIP_MXIC_OCT 0xC2
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const static char *TAG = "Octal Flash";
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// default value is rom_default_spiflash_legacy_flash_func
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extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
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extern int SPI_write_enable(void *spi);
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DRAM_ATTR const esp_rom_opiflash_def_t opiflash_cmd_def = OPI_CMD_FORMAT();
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static uint32_t s_vendor_id;
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static void s_register_rom_function(void)
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@ -46,7 +52,24 @@ static void s_register_rom_function(void)
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rom_spiflash_legacy_funcs = &rom_func;
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}
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#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC
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#if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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/*----------------------------------------------------------------------------------------------------
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MXIC Specific Functions
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-----------------------------------------------------------------------------------------------------*/
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static esp_err_t s_probe_mxic_chip(uint32_t chip_id, uint8_t *out_vendor_id)
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{
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if (chip_id >> 16 != ESP_FLASH_CHIP_MXIC_OCT) {
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return ESP_ERR_NOT_FOUND;
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}
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if (((chip_id >> 8) & 0xff) != 0x80) {
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ESP_EARLY_LOGE(TAG, "Detected MXIC Flash, but memory type is not Octal");
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return ESP_ERR_NOT_FOUND;
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}
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*out_vendor_id = ESP_FLASH_CHIP_MXIC_OCT;
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return ESP_OK;
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}
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// 0x00: SPI; 0x01: STR OPI; 0x02: DTR OPI
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static void s_set_flash_dtr_str_opi_mode(int spi_num, uint8_t val)
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{
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@ -127,7 +150,8 @@ static void s_set_pin_drive_capability(uint8_t drv)
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static void s_flash_init_mxic(esp_rom_spiflash_read_mode_t mode)
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{
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esp_rom_opiflash_legacy_driver_init(&opiflash_cmd_def);
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static const esp_rom_opiflash_def_t opiflash_cmd_def_mxic = OPI_CMD_FORMAT_MXIC();
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esp_rom_opiflash_legacy_driver_init(&opiflash_cmd_def_mxic);
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esp_rom_spiflash_wait_idle(&g_rom_flashchip);
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// increase flash output driver strength
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@ -135,13 +159,13 @@ static void s_flash_init_mxic(esp_rom_spiflash_read_mode_t mode)
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// STR/DTR specific setting
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esp_rom_spiflash_wait_idle(&g_rom_flashchip);
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#if CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR
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#if CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
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s_set_pin_drive_capability(3);
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s_set_flash_dtr_str_opi_mode(1, 0x1);
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esp_rom_opiflash_cache_mode_config(mode, &rom_opiflash_cmd_def->cache_rd_cmd);
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esp_rom_spi_set_dtr_swap_mode(0, false, false);
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esp_rom_spi_set_dtr_swap_mode(1, false, false);
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#else //CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
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#else //CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
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s_set_pin_drive_capability(3);
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s_set_flash_dtr_str_opi_mode(1, 0x2);
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esp_rom_opiflash_cache_mode_config(mode, &rom_opiflash_cmd_def->cache_rd_cmd);
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@ -149,26 +173,82 @@ static void s_flash_init_mxic(esp_rom_spiflash_read_mode_t mode)
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esp_rom_spi_set_dtr_swap_mode(1, true, true);
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#endif
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s_register_rom_function();
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esp_rom_opiflash_wait_idle();
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}
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#endif // #if CONFIG_FLASH_VENDOR_XXX
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#endif // #if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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esp_err_t esp_opiflash_init(void)
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/*----------------------------------------------------------------------------------------------------
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General Functions
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-----------------------------------------------------------------------------------------------------*/
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typedef struct opi_flash_func_t {
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esp_err_t (*probe)(uint32_t flash_id, uint8_t *out_vendor_id); //Function pointer for detecting Flash chip vendor
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void (*init)(esp_rom_spiflash_read_mode_t mode); //Function pointer for initialising certain Flash chips
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} opi_flash_func_t;
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#if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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static const opi_flash_func_t opi_flash_func_mxic = {
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.probe = &s_probe_mxic_chip,
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.init = &s_flash_init_mxic
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};
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#endif
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static const opi_flash_func_t *registered_chip_funcs[] = {
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#if CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP
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&opi_flash_func_mxic,
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#endif
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NULL,
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};
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esp_err_t esp_opiflash_init(uint32_t chip_id)
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{
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esp_err_t ret = ESP_FAIL;
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esp_rom_spiflash_read_mode_t mode;
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#if CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR
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#if CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
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mode = ESP_ROM_SPIFLASH_OPI_STR_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
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#elif CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
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mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE;
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||||
#else
|
||||
mode = ESP_ROM_SPIFLASH_FASTRD_MODE;
|
||||
#endif
|
||||
|
||||
#if CONFIG_ESPTOOLPY_FLASH_VENDOR_MXIC
|
||||
s_flash_init_mxic(mode);
|
||||
#else
|
||||
abort();
|
||||
#endif
|
||||
//To check which Flash chip is used
|
||||
const opi_flash_func_t **chip_func = ®istered_chip_funcs[0];
|
||||
|
||||
uint8_t vendor_id = 0;
|
||||
while (*chip_func) {
|
||||
ret = (*chip_func)->probe(chip_id, &vendor_id);
|
||||
if (ret == ESP_OK) {
|
||||
// Detect this is the supported chip type
|
||||
(*chip_func)->init(mode);
|
||||
s_vendor_id = vendor_id;
|
||||
s_register_rom_function();
|
||||
break;
|
||||
}
|
||||
chip_func++;
|
||||
}
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_EARLY_LOGE(TAG, "No detected Flash chip, please check the menuconfig to see if the chip is supported");
|
||||
abort();
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* Add Flash chip specifically required MSPI register settings here
|
||||
*/
|
||||
void esp_opiflash_set_required_regs(void)
|
||||
{
|
||||
bool is_swap = false;
|
||||
#if CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
|
||||
if (s_vendor_id == ESP_FLASH_CHIP_MXIC_OCT) {
|
||||
is_swap = true;
|
||||
}
|
||||
#else
|
||||
//STR mode does not need to enable ddr_swap registers
|
||||
#endif
|
||||
esp_rom_spi_set_dtr_swap_mode(0, is_swap, is_swap);
|
||||
esp_rom_spi_set_dtr_swap_mode(1, is_swap, is_swap);
|
||||
}
|
||||
|
||||
@ -44,8 +44,8 @@ extern "C" {
|
||||
* 2. DDR mode requires the core clock divider (core_clk / div = module_clk) to be power of 2.
|
||||
*/
|
||||
//--------------------------------------FLASH Sampling Mode --------------------------------------//
|
||||
#define SPI_TIMING_FLASH_DTR_MODE (CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR || CONFIG_ESPTOOLPY_FLASHMODE_OIO_DTR)
|
||||
#define SPI_TIMING_FLASH_STR_MODE (CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR || !CONFIG_ESPTOOLPY_OCT_FLASH)
|
||||
#define SPI_TIMING_FLASH_DTR_MODE CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
|
||||
#define SPI_TIMING_FLASH_STR_MODE CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
|
||||
//--------------------------------------FLASH Module Clock --------------------------------------//
|
||||
#if CONFIG_ESPTOOLPY_FLASHFREQ_20M
|
||||
#define SPI_TIMING_FLASH_MODULE_CLOCK 20
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_flash.h"
|
||||
@ -27,7 +19,7 @@
|
||||
#include "hal/gpio_hal.h"
|
||||
#include "esp_flash_internal.h"
|
||||
#include "esp_rom_gpio.h"
|
||||
#include "spi_flash_private.h"
|
||||
#include "esp_private/spi_flash_os.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/spi_flash.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
@ -71,9 +63,9 @@ esp_flash_t *esp_flash_default_chip = NULL;
|
||||
#define DEFAULT_FLASH_MODE SPI_FLASH_DIO
|
||||
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DOUT)
|
||||
#define DEFAULT_FLASH_MODE SPI_FLASH_DOUT
|
||||
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR)
|
||||
#elif defined(CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR)
|
||||
#define DEFAULT_FLASH_MODE SPI_FLASH_OPI_STR
|
||||
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR)
|
||||
#elif defined(CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR)
|
||||
#define DEFAULT_FLASH_MODE SPI_FLASH_OPI_DTR
|
||||
#else
|
||||
#define DEFAULT_FLASH_MODE SPI_FLASH_FASTRD
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <assert.h>
|
||||
@ -28,6 +20,7 @@
|
||||
#include "esp_spi_flash.h"
|
||||
#include "esp_log.h"
|
||||
#include "esp_private/system_internal.h"
|
||||
#include "esp_private/spi_flash_os.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/cache.h"
|
||||
#include "esp32/rom/spi_flash.h"
|
||||
@ -43,6 +36,7 @@
|
||||
#include "esp32s3/rom/cache.h"
|
||||
#include "esp32s3/clk.h"
|
||||
#include "esp32s3/clk.h"
|
||||
#include "esp32s3/opi_flash_private.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32C3
|
||||
#include "esp32c3/rom/cache.h"
|
||||
#include "esp32c3/rom/spi_flash.h"
|
||||
@ -175,6 +169,16 @@ void IRAM_ATTR esp_mspi_pin_init(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
esp_err_t IRAM_ATTR spi_flash_init_chip_state(void)
|
||||
{
|
||||
#if CONFIG_ESPTOOLPY_OCT_FLASH
|
||||
return esp_opiflash_init(rom_spiflash_legacy_data->chip.device_id);
|
||||
#else
|
||||
//currently we don't need other setup for initialising Quad Flash
|
||||
return ESP_OK;
|
||||
#endif
|
||||
}
|
||||
|
||||
void spi_flash_init(void)
|
||||
{
|
||||
spi_flash_init_lock();
|
||||
@ -906,3 +910,13 @@ void IRAM_ATTR spi_flash_set_rom_required_regs(void)
|
||||
*/
|
||||
#endif
|
||||
}
|
||||
|
||||
void IRAM_ATTR spi_flash_set_vendor_required_regs(void)
|
||||
{
|
||||
#if CONFIG_ESPTOOLPY_OCT_FLASH
|
||||
//Flash chip requires MSPI specifically, call this function to set them
|
||||
esp_opiflash_set_required_regs();
|
||||
#else
|
||||
//currently we don't need to set other MSPI registers for Quad Flash
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -4,7 +4,9 @@
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* System level MSPI APIs (private)
|
||||
*/
|
||||
/**
|
||||
* Currently the MSPI timing tuning related APIs are designed to be private.
|
||||
* Because:
|
||||
@ -17,6 +19,10 @@
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_err.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/spi_flash.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
@ -34,9 +40,9 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Register ROM functions and init flash device registers to make use of octal flash
|
||||
* @brief To setup Flash chip
|
||||
*/
|
||||
esp_err_t esp_opiflash_init(void);
|
||||
esp_err_t spi_flash_init_chip_state(void);
|
||||
|
||||
/**
|
||||
* @brief Make MSPI work under 20Mhz
|
||||
@ -88,6 +94,12 @@ void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing
|
||||
*/
|
||||
bool spi_timine_config_flash_is_tuned(void);
|
||||
|
||||
/**
|
||||
* @brief Set Flash chip specifically required MSPI register settings here
|
||||
*/
|
||||
void spi_flash_set_vendor_required_regs(void);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -1,43 +1,45 @@
|
||||
SOURCE_FILES := \
|
||||
SpiFlash.cpp \
|
||||
flash_mock.cpp \
|
||||
flash_mock_util.c \
|
||||
$(addprefix ../, \
|
||||
partition.c \
|
||||
flash_ops.c \
|
||||
esp32/flash_ops_esp32.c \
|
||||
) \
|
||||
SpiFlash.cpp \
|
||||
flash_mock.cpp \
|
||||
flash_mock_util.c \
|
||||
$(addprefix ../, \
|
||||
partition.c \
|
||||
flash_ops.c \
|
||||
esp32/flash_ops_esp32.c \
|
||||
) \
|
||||
|
||||
INCLUDE_DIRS := \
|
||||
. \
|
||||
../ \
|
||||
../include \
|
||||
../private_include \
|
||||
$(addprefix stubs/, \
|
||||
app_update/include \
|
||||
driver/include \
|
||||
esp_timer/include \
|
||||
freertos/include \
|
||||
log/include \
|
||||
newlib/include \
|
||||
sdmmc/include \
|
||||
vfs/include \
|
||||
) \
|
||||
$(addprefix ../../../components/, \
|
||||
esp_rom/include \
|
||||
esp_common/include \
|
||||
esp_hw_support/include \
|
||||
esp_hw_support/include/soc \
|
||||
esp_system/include \
|
||||
xtensa/include \
|
||||
xtensa/esp32/include \
|
||||
soc/esp32/include \
|
||||
heap/include \
|
||||
soc/include \
|
||||
esp32/include \
|
||||
esp_timer/include \
|
||||
bootloader_support/include \
|
||||
app_update/include \
|
||||
hal/include \
|
||||
spi_flash/include \
|
||||
)
|
||||
. \
|
||||
../ \
|
||||
../include \
|
||||
../private_include \
|
||||
$(addprefix stubs/, \
|
||||
app_update/include \
|
||||
driver/include \
|
||||
esp_timer/include \
|
||||
freertos/include \
|
||||
log/include \
|
||||
newlib/include \
|
||||
sdmmc/include \
|
||||
vfs/include \
|
||||
) \
|
||||
$(addprefix ../../../components/, \
|
||||
esp_rom/include \
|
||||
esp_common/include \
|
||||
esp_hw_support/include \
|
||||
esp_hw_support/include/soc \
|
||||
esp_system/include \
|
||||
xtensa/include \
|
||||
xtensa/esp32/include \
|
||||
soc/esp32/include \
|
||||
heap/include \
|
||||
soc/include \
|
||||
esp32/include \
|
||||
esp_timer/include \
|
||||
bootloader_support/include \
|
||||
app_update/include \
|
||||
hal/include \
|
||||
hal/esp32/include \
|
||||
hal/platform_port/include \
|
||||
spi_flash/include \
|
||||
)
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
#include "esp_log.h"
|
||||
#include "soc/spi_mem_reg.h"
|
||||
#include "soc/io_mux_reg.h"
|
||||
#include "spi_flash_private.h"
|
||||
#include "esp_private/spi_flash_os.h"
|
||||
#include "soc/soc.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32S3
|
||||
#include "esp32s3/spi_timing_config.h"
|
||||
@ -235,14 +235,14 @@ static void select_best_tuning_config(spi_timing_config_t *config, uint32_t cons
|
||||
if (is_flash) {
|
||||
#if SPI_TIMING_FLASH_DTR_MODE
|
||||
best_point = select_best_tuning_config_dtr(config, consecutive_length, end);
|
||||
#else //#if SPI_TIMING_FLASH_STR_MODE
|
||||
#elif SPI_TIMING_FLASH_STR_MODE
|
||||
best_point = select_best_tuning_config_str(config, consecutive_length, end);
|
||||
#endif
|
||||
s_flash_best_timing_tuning_config = config->tuning_config_table[best_point];
|
||||
} else {
|
||||
#if SPI_TIMING_PSRAM_DTR_MODE
|
||||
best_point = select_best_tuning_config_dtr(config, consecutive_length, end);
|
||||
#else //#if SPI_TIMING_PSRAM_STR_MODE
|
||||
#elif SPI_TIMING_PSRAM_STR_MODE
|
||||
best_point = select_best_tuning_config_str(config, consecutive_length, end);
|
||||
#endif
|
||||
s_psram_best_timing_tuning_config = config->tuning_config_table[best_point];
|
||||
|
||||
@ -1,16 +1,8 @@
|
||||
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
// Test for spi_flash_{read,write}.
|
||||
|
||||
@ -197,9 +189,9 @@ static void IRAM_ATTR fix_rom_func(void)
|
||||
read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
|
||||
#elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT
|
||||
read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
|
||||
#elif CONFIG_ESPTOOLPY_FLASHMODE_OPI_STR
|
||||
#elif CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
|
||||
read_mode = ESP_ROM_SPIFLASH_OPI_STR_MODE;
|
||||
#elif CONFIG_ESPTOOLPY_FLASHMODE_OPI_DTR
|
||||
#elif CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
|
||||
read_mode = ESP_ROM_SPIFLASH_OPI_DTR_MODE;
|
||||
#endif
|
||||
|
||||
|
||||
@ -1142,7 +1142,6 @@ components/esp_system/port/arch/xtensa/expression_with_stack.c
|
||||
components/esp_system/port/arch/xtensa/panic_arch.c
|
||||
components/esp_system/port/arch/xtensa/trax.c
|
||||
components/esp_system/port/brownout.c
|
||||
components/esp_system/port/cpu_start.c
|
||||
components/esp_system/port/include/esp_clk_internal.h
|
||||
components/esp_system/port/include/port/panic_funcs.h
|
||||
components/esp_system/port/include/riscv/eh_frame_parser_impl.h
|
||||
@ -2785,9 +2784,7 @@ components/spi_flash/esp32s2/flash_ops_esp32s2.c
|
||||
components/spi_flash/esp32s2/spi_flash_rom_patch.c
|
||||
components/spi_flash/esp32s3/flash_ops_esp32s3.c
|
||||
components/spi_flash/esp_flash_api.c
|
||||
components/spi_flash/esp_flash_spi_init.c
|
||||
components/spi_flash/flash_mmap.c
|
||||
components/spi_flash/flash_ops.c
|
||||
components/spi_flash/include/esp_flash.h
|
||||
components/spi_flash/include/esp_flash_internal.h
|
||||
components/spi_flash/include/esp_flash_spi_init.h
|
||||
@ -2828,7 +2825,6 @@ components/spi_flash/test/test_mmap.c
|
||||
components/spi_flash/test/test_out_of_bounds_write.c
|
||||
components/spi_flash/test/test_partition_ext.c
|
||||
components/spi_flash/test/test_partitions.c
|
||||
components/spi_flash/test/test_read_write.c
|
||||
components/spi_flash/test/test_spi_flash.c
|
||||
components/spiffs/esp_spiffs.c
|
||||
components/spiffs/include/esp_spiffs.h
|
||||
|
||||
@ -148,4 +148,3 @@ components/ulp/include/esp32s2/ulp_riscv.h
|
||||
components/lwip/include/apps/sntp/sntp.h
|
||||
components/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h
|
||||
components/wifi_provisioning/include/wifi_provisioning/scheme_softap.h
|
||||
components/spi_flash/include/spi_flash_private.h
|
||||
|
||||
Loading…
Reference in New Issue
Block a user