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synced 2024-10-05 20:47:46 -04:00
change(ulp): change some hal(ll) function name to new ones
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d9d1c87e56
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@ -58,7 +58,7 @@ static void lp_core_i2c_format_cmd(uint32_t cmd_idx, uint8_t op_code, uint8_t ac
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};
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/* Write new command to cmd register */
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i2c_ll_write_cmd_reg(dev, hw_cmd, cmd_idx);
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i2c_ll_master_write_cmd_reg(dev, hw_cmd, cmd_idx);
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}
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static inline esp_err_t lp_core_i2c_wait_for_interrupt(uint32_t intr_mask, int32_t ticks_to_wait)
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@ -210,7 +210,7 @@ esp_err_t lp_core_i2c_master_read_from_device(i2c_port_t lp_i2c_num, uint16_t de
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/* Initiate I2C transfer */
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i2c_ll_update(dev);
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i2c_ll_trans_start(dev);
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i2c_ll_master_trans_start(dev);
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/* Wait for the transfer to complete */
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ret = lp_core_i2c_wait_for_interrupt(intr_mask, ticks_to_wait);
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@ -301,7 +301,7 @@ esp_err_t lp_core_i2c_master_write_to_device(i2c_port_t lp_i2c_num, uint16_t dev
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/* Initiate I2C transfer */
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i2c_ll_update(dev);
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i2c_ll_trans_start(dev);
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i2c_ll_master_trans_start(dev);
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/* Wait for the transfer to complete */
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ret = lp_core_i2c_wait_for_interrupt(intr_mask, ticks_to_wait);
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@ -388,7 +388,7 @@ esp_err_t lp_core_i2c_master_write_read_device(i2c_port_t lp_i2c_num, uint16_t d
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/* Initiate I2C transfer */
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i2c_ll_update(dev);
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i2c_ll_trans_start(dev);
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i2c_ll_master_trans_start(dev);
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/* Wait for the transfer to complete */
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ret = lp_core_i2c_wait_for_interrupt(intr_mask, ticks_to_wait);
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@ -457,7 +457,7 @@ esp_err_t lp_core_i2c_master_write_read_device(i2c_port_t lp_i2c_num, uint16_t d
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/* Initiate I2C transfer */
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i2c_ll_update(dev);
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i2c_ll_trans_start(dev);
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i2c_ll_master_trans_start(dev);
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/* Wait for the transfer to complete */
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ret = lp_core_i2c_wait_for_interrupt(intr_mask, ticks_to_wait);
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@ -141,7 +141,7 @@ esp_err_t lp_core_i2c_master_init(i2c_port_t lp_i2c_num, const lp_core_i2c_cfg_t
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ESP_RETURN_ON_ERROR(lp_i2c_config_clk(cfg), LPI2C_TAG, "Failed to configure LP I2C source clock");
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/* Enable SDA and SCL filtering. This configuration matches the HP I2C filter config */
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i2c_ll_set_filter(i2c_hal.dev, LP_I2C_FILTER_CYC_NUM_DEF);
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i2c_ll_master_set_filter(i2c_hal.dev, LP_I2C_FILTER_CYC_NUM_DEF);
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/* Configure the I2C master to send a NACK when the Rx FIFO count is full */
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i2c_ll_master_rx_full_ack_level(i2c_hal.dev, 1);
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