Merge branch 'refactor/panic_handler_follow_ups' into 'master'

Panic handler follow ups

See merge request espressif/esp-idf!7732
This commit is contained in:
Angus Gratton 2020-07-15 08:21:09 +08:00
commit 24e49cc21d

View File

@ -111,7 +111,7 @@ static void print_debug_exception_details(const void *f)
#if CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK
int core = 0;
#if !CONFIG_FREERTOS_UNICORE
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
if (f == xt_exc_frames[1]) {
core = 1;
}
@ -209,11 +209,11 @@ static void print_registers(const void *f, int core)
// If the core which triggers the interrupt watchpoint was in ISR context, dump the epc registers.
if (xPortInterruptedFromISRContext()
#if !CONFIG_FREERTOS_UNICORE
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
&& ((core == 0 && frame->exccause == PANIC_RSN_INTWDT_CPU0) ||
(core == 1 && frame->exccause == PANIC_RSN_INTWDT_CPU1))
#endif //!CONFIG_FREERTOS_UNICORE
) {
#endif //!CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
) {
panic_print_str("\r\n");
@ -251,7 +251,7 @@ static void print_state_for_core(const void *f, int core)
static void print_state(const void *f)
{
#if !CONFIG_FREERTOS_UNICORE
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
int err_core = f == xt_exc_frames[0] ? 0 : 1;
#else
int err_core = 0;
@ -261,7 +261,7 @@ static void print_state(const void *f)
panic_print_str("\r\n");
#if !CONFIG_FREERTOS_UNICORE
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
// If there are other frame info, print them as well
for (int i = 0; i < SOC_CPU_CORES_NUM; i++) {
// `f` is the frame for the offending core, see note above.
@ -478,7 +478,7 @@ static void panic_handler(XtExcFrame *frame, bool pseudo_excause)
// If multiple cores arrive at panic handler, save frames for all of them
xt_exc_frames[core_id] = frame;
#if !CONFIG_FREERTOS_UNICORE
#if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
// These are cases where both CPUs both go into panic handler. The following code ensures
// only one core proceeds to the system panic handler.
if (pseudo_excause) {