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codeclean: add sleep_mode args to esp_sleep_start()

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This commit is contained in:
wuzhenghui 2023-02-01 16:58:42 +08:00
parent aec3f6db1d
commit 248aa6109d
2 changed files with 24 additions and 14 deletions
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8
components/esp_hw_support/include/esp_sleep.h
View File

@ -98,6 +98,14 @@ typedef enum {
ESP_SLEEP_WAKEUP_BT, //!< Wakeup caused by BT (light sleep only)
} esp_sleep_source_t;
/**
* @brief Sleep mode
*/
typedef enum {
ESP_SLEEP_MODE_LIGHT_SLEEP, //!< light sleep mode
ESP_SLEEP_MODE_DEEP_SLEEP //!< deep sleep mode
} esp_sleep_mode_t;
/* Leave this type define for compatibility */
typedef esp_sleep_source_t esp_sleep_wakeup_cause_t;

30
components/esp_hw_support/sleep_modes.c
View File

@ -394,22 +394,24 @@ inline static void IRAM_ATTR misc_modules_wake_prepare(void)
inline static uint32_t call_rtc_sleep_start(uint32_t reject_triggers, uint32_t lslp_mem_inf_fpu, bool dslp);
inline static bool is_light_sleep(uint32_t pd_flags)
{
return (pd_flags & RTC_SLEEP_PD_DIG) == 0;
}
static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mode)
{
// Stop UART output so that output is not lost due to APB frequency change.
// For light sleep, suspend UART output — it will resume after wakeup.
// For deep sleep, wait for the contents of UART FIFO to be sent.
bool deep_sleep = pd_flags & RTC_SLEEP_PD_DIG;
bool deep_sleep = (mode == ESP_SLEEP_MODE_DEEP_SLEEP);
if (deep_sleep) {
flush_uarts();
} else {
suspend_uarts();
#if SOC_PM_SUPPORT_TOP_PD
if (pd_flags & PMU_SLEEP_PD_TOP) {
flush_uarts();
} else
#endif
{
suspend_uarts();
}
}
#if SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
@ -484,7 +486,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
#endif
uint32_t reject_triggers = 0;
if (is_light_sleep(pd_flags)) {
if (!deep_sleep) {
/* Light sleep, enable sleep reject for faster return from this function,
* in case the wakeup is already triggerred.
*/
@ -544,14 +546,14 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
size_t rtc_fast_length = (size_t)_rtc_force_fast_end - (size_t)_rtc_text_start;
#endif
esp_rom_set_rtc_wake_addr((esp_rom_wake_func_t)esp_wake_stub_entry, rtc_fast_length);
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, 0);
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
#else
#if !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
/* If not possible stack is in RTC FAST memory, use the ROM function to calculate the CRC and save ~140 bytes IRAM */
#if SOC_RTC_FAST_MEM_SUPPORTED
set_rtc_memory_crc();
#endif
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, 0);
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
#else
/* Otherwise, need to call the dedicated soc function for this */
result = rtc_deep_sleep_start(s_config.wakeup_triggers, reject_triggers);
@ -569,7 +571,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
result = call_rtc_sleep_start(reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
}
#else
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, 0);
result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
#endif
}
@ -643,7 +645,7 @@ void IRAM_ATTR esp_deep_sleep_start(void)
#endif
// Enter sleep
esp_sleep_start(force_pd_flags | pd_flags);
esp_sleep_start(force_pd_flags | pd_flags, ESP_SLEEP_MODE_DEEP_SLEEP);
// Because RTC is in a slower clock domain than the CPU, it
// can take several CPU cycles for the sleep mode to start.
@ -666,7 +668,7 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
uint32_t flash_enable_time_us)
{
// Enter sleep
uint32_t reject = esp_sleep_start(pd_flags);
uint32_t reject = esp_sleep_start(pd_flags, ESP_SLEEP_MODE_LIGHT_SLEEP);
#if SOC_CONFIGURABLE_VDDSDIO_SUPPORTED
rtc_vddsdio_config_t vddsdio_config = rtc_vddsdio_get_config();