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espcoredump: remove ESP32 prefix from config options

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- This component is applicable for ESP32 and ESP32-S2, hence the change
- Backward compatibility is maintained using `sdkconfig.rename` file
This commit is contained in:
Mahavir Jain 2020-09-29 20:57:28 +05:30
parent c34c961910
commit 237087a5ca
10 changed files with 95 additions and 79 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
components/espcoredump/Kconfig
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@ -1,8 +1,8 @@
menu "Core dump" menu "Core dump"
choice ESP32_COREDUMP_TO_FLASH_OR_UART choice ESP_COREDUMP_TO_FLASH_OR_UART
prompt "Data destination" prompt "Data destination"
default ESP32_ENABLE_COREDUMP_TO_NONE default ESP_COREDUMP_ENABLE_TO_NONE
help help
Select place to store core dump: flash, uart or none (to disable core dumps generation). Select place to store core dump: flash, uart or none (to disable core dumps generation).
@ -12,66 +12,66 @@ menu "Core dump"
corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
in the components/partition_table directory. in the components/partition_table directory.
config ESP32_ENABLE_COREDUMP_TO_FLASH config ESP_COREDUMP_ENABLE_TO_FLASH
bool "Flash" bool "Flash"
depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
select ESP32_ENABLE_COREDUMP select ESP_COREDUMP_ENABLE
config ESP32_ENABLE_COREDUMP_TO_UART config ESP_COREDUMP_ENABLE_TO_UART
bool "UART" bool "UART"
select ESP32_ENABLE_COREDUMP select ESP_COREDUMP_ENABLE
config ESP32_ENABLE_COREDUMP_TO_NONE config ESP_COREDUMP_ENABLE_TO_NONE
bool "None" bool "None"
endchoice endchoice
choice ESP32_COREDUMP_DATA_FORMAT choice ESP_COREDUMP_DATA_FORMAT
prompt "Core dump data format" prompt "Core dump data format"
default ESP32_COREDUMP_DATA_FORMAT_ELF default ESP_COREDUMP_DATA_FORMAT_ELF
depends on !ESP32_ENABLE_COREDUMP_TO_NONE depends on !ESP_COREDUMP_ENABLE_TO_NONE
help help
Select the data format for core dump. Select the data format for core dump.
config ESP32_COREDUMP_DATA_FORMAT_BIN config ESP_COREDUMP_DATA_FORMAT_BIN
bool "Binary format" bool "Binary format"
config ESP32_COREDUMP_DATA_FORMAT_ELF config ESP_COREDUMP_DATA_FORMAT_ELF
bool "ELF format" bool "ELF format"
endchoice endchoice
choice ESP32_COREDUMP_CHECKSUM choice ESP_COREDUMP_CHECKSUM
prompt "Core dump data integrity check" prompt "Core dump data integrity check"
default ESP32_COREDUMP_CHECKSUM_CRC32 default ESP_COREDUMP_CHECKSUM_CRC32
depends on !ESP32_ENABLE_COREDUMP_TO_NONE depends on !ESP_COREDUMP_ENABLE_TO_NONE
help help
Select the integrity check for the core dump. Select the integrity check for the core dump.
config ESP32_COREDUMP_CHECKSUM_CRC32 config ESP_COREDUMP_CHECKSUM_CRC32
bool "Use CRC32 for integrity verification" bool "Use CRC32 for integrity verification"
config ESP32_COREDUMP_CHECKSUM_SHA256 config ESP_COREDUMP_CHECKSUM_SHA256
bool "Use SHA256 for integrity verification" bool "Use SHA256 for integrity verification"
depends on ESP32_COREDUMP_DATA_FORMAT_ELF && IDF_TARGET_ESP32 depends on ESP_COREDUMP_DATA_FORMAT_ELF && IDF_TARGET_ESP32
endchoice endchoice
config ESP32_ENABLE_COREDUMP config ESP_COREDUMP_ENABLE
bool bool
default F default F
help help
Enables/disable core dump module. Enables/disable core dump module.
config ESP32_CORE_DUMP_MAX_TASKS_NUM config ESP_COREDUMP_MAX_TASKS_NUM
int "Maximum number of tasks" int "Maximum number of tasks"
depends on ESP32_ENABLE_COREDUMP depends on ESP_COREDUMP_ENABLE
default 64 default 64
help help
Maximum number of tasks snapshots in core dump. Maximum number of tasks snapshots in core dump.
config ESP32_CORE_DUMP_UART_DELAY config ESP_COREDUMP_UART_DELAY
int "Delay before print to UART" int "Delay before print to UART"
depends on ESP32_ENABLE_COREDUMP_TO_UART depends on ESP_COREDUMP_ENABLE_TO_UART
default 0 default 0
help help
Config delay (in ms) before printing core dump to UART. Config delay (in ms) before printing core dump to UART.
Delay can be interrupted by pressing Enter key. Delay can be interrupted by pressing Enter key.
config ESP32_CORE_DUMP_STACK_SIZE config ESP_COREDUMP_STACK_SIZE
int "Reserved stack size" int "Reserved stack size"
depends on ESP32_ENABLE_COREDUMP depends on ESP_COREDUMP_ENABLE
default 0 default 0
help help
Size of the memory to be reserved for core dump stack. If 0 core dump process will run on Size of the memory to be reserved for core dump stack. If 0 core dump process will run on
@ -79,19 +79,19 @@ menu "Core dump"
To ensure that core dump itself will not overflow task/ISR stack set this to the value above 800. To ensure that core dump itself will not overflow task/ISR stack set this to the value above 800.
NOTE: It eats DRAM. NOTE: It eats DRAM.
choice ESP32_CORE_DUMP_DECODE choice ESP_COREDUMP_DECODE
prompt "Handling of UART core dumps in IDF Monitor" prompt "Handling of UART core dumps in IDF Monitor"
depends on ESP32_ENABLE_COREDUMP_TO_UART depends on ESP_COREDUMP_ENABLE_TO_UART
config ESP32_CORE_DUMP_DECODE_INFO config ESP_COREDUMP_DECODE_INFO
bool "Decode and show summary (info_corefile)" bool "Decode and show summary (info_corefile)"
config ESP32_CORE_DUMP_DECODE_DISABLE config ESP_COREDUMP_DECODE_DISABLE
bool "Don't decode" bool "Don't decode"
endchoice endchoice
config ESP32_CORE_DUMP_DECODE config ESP_COREDUMP_DECODE
string string
default "disable" if ESP32_CORE_DUMP_DECODE_DISABLE default "disable" if ESP_COREDUMP_DECODE_DISABLE
default "info" if ESP32_CORE_DUMP_DECODE_INFO default "info" if ESP_COREDUMP_DECODE_INFO
endmenu endmenu

18
components/espcoredump/include_core_dump/esp_core_dump_port.h
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@ -15,9 +15,9 @@
#define ESP_CORE_DUMP_PORT_H_ #define ESP_CORE_DUMP_PORT_H_
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
#include "esp_rom_crc.h" #include "esp_rom_crc.h"
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
#include "mbedtls/sha256.h" #include "mbedtls/sha256.h"
#endif #endif
#include "esp_core_dump_priv.h" #include "esp_core_dump_priv.h"
@ -74,7 +74,7 @@ void esp_core_dump_checksum_init(core_dump_write_data_t* wr_data);
void esp_core_dump_checksum_update(core_dump_write_data_t* wr_data, void* data, size_t data_len); void esp_core_dump_checksum_update(core_dump_write_data_t* wr_data, void* data, size_t data_len);
size_t esp_core_dump_checksum_finish(core_dump_write_data_t* wr_data, void** chs_ptr); size_t esp_core_dump_checksum_finish(core_dump_write_data_t* wr_data, void** chs_ptr);
#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #if CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
void esp_core_dump_print_sha256(const char* msg, const uint8_t* sha_output); void esp_core_dump_print_sha256(const char* msg, const uint8_t* sha_output);
int esp_core_dump_sha(mbedtls_sha256_context *ctx, int esp_core_dump_sha(mbedtls_sha256_context *ctx,
const unsigned char *input, size_t ilen, unsigned char output[32]); const unsigned char *input, size_t ilen, unsigned char output[32]);
@ -83,32 +83,32 @@ int esp_core_dump_sha(mbedtls_sha256_context *ctx,
#define esp_core_dump_in_isr_context() xPortInterruptedFromISRContext() #define esp_core_dump_in_isr_context() xPortInterruptedFromISRContext()
uint32_t esp_core_dump_get_isr_stack_end(void); uint32_t esp_core_dump_get_isr_stack_end(void);
#if CONFIG_ESP32_CORE_DUMP_STACK_SIZE > 0 #if CONFIG_ESP_COREDUMP_STACK_SIZE > 0
#if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG #if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
// increase stack size in verbose mode // increase stack size in verbose mode
#define ESP32_CORE_DUMP_STACK_SIZE (CONFIG_ESP32_CORE_DUMP_STACK_SIZE+100) #define ESP_COREDUMP_STACK_SIZE (CONFIG_ESP_COREDUMP_STACK_SIZE+100)
#else #else
#define ESP32_CORE_DUMP_STACK_SIZE CONFIG_ESP32_CORE_DUMP_STACK_SIZE #define ESP_COREDUMP_STACK_SIZE CONFIG_ESP_COREDUMP_STACK_SIZE
#endif #endif
#endif #endif
void esp_core_dump_report_stack_usage(void); void esp_core_dump_report_stack_usage(void);
#if ESP32_CORE_DUMP_STACK_SIZE > 0 #if ESP_COREDUMP_STACK_SIZE > 0
#define COREDUMP_STACK_FILL_BYTE (0xa5U) #define COREDUMP_STACK_FILL_BYTE (0xa5U)
extern uint8_t s_coredump_stack[]; extern uint8_t s_coredump_stack[];
extern uint8_t *s_core_dump_sp; extern uint8_t *s_core_dump_sp;
#if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG #if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
#define esp_core_dump_fill_stack() \ #define esp_core_dump_fill_stack() \
memset(s_coredump_stack, COREDUMP_STACK_FILL_BYTE, ESP32_CORE_DUMP_STACK_SIZE) memset(s_coredump_stack, COREDUMP_STACK_FILL_BYTE, ESP_COREDUMP_STACK_SIZE)
#else #else
#define esp_core_dump_fill_stack() #define esp_core_dump_fill_stack()
#endif #endif
#define esp_core_dump_setup_stack() \ #define esp_core_dump_setup_stack() \
{ \ { \
s_core_dump_sp = (uint8_t *)((uint32_t)(s_coredump_stack + ESP32_CORE_DUMP_STACK_SIZE - 1) & ~0xf); \ s_core_dump_sp = (uint8_t *)((uint32_t)(s_coredump_stack + ESP_COREDUMP_STACK_SIZE - 1) & ~0xf); \
esp_core_dump_fill_stack(); \ esp_core_dump_fill_stack(); \
/* watchpoint 1 can be used for task stack overflow detection, re-use it, it is no more necessary */ \ /* watchpoint 1 can be used for task stack overflow detection, re-use it, it is no more necessary */ \
esp_clear_watchpoint(1); \ esp_clear_watchpoint(1); \

14
components/espcoredump/include_core_dump/esp_core_dump_priv.h
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@ -24,7 +24,7 @@ extern "C" {
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "sdkconfig.h" #include "sdkconfig.h"
#include "esp_private/panic_internal.h" #include "esp_private/panic_internal.h"
#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #if CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
// TODO: move this to portable part of the code // TODO: move this to portable part of the code
#include "mbedtls/sha256.h" #include "mbedtls/sha256.h"
#endif #endif
@ -36,7 +36,7 @@ extern "C" {
#define ESP_COREDUMP_LOGD( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_DEBUG, LOG_FORMAT(D, format), ##__VA_ARGS__) #define ESP_COREDUMP_LOGD( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_DEBUG, LOG_FORMAT(D, format), ##__VA_ARGS__)
#define ESP_COREDUMP_LOGV( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_VERBOSE, LOG_FORMAT(V, format), ##__VA_ARGS__) #define ESP_COREDUMP_LOGV( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_VERBOSE, LOG_FORMAT(V, format), ##__VA_ARGS__)
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH #if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH
#define ESP_COREDUMP_LOG_PROCESS( format, ... ) ESP_COREDUMP_LOGD(format, ##__VA_ARGS__) #define ESP_COREDUMP_LOG_PROCESS( format, ... ) ESP_COREDUMP_LOGD(format, ##__VA_ARGS__)
#else #else
#define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0) #define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0)
@ -55,10 +55,10 @@ extern "C" {
#define COREDUMP_CURR_TASK_MARKER 0xDEADBEEF #define COREDUMP_CURR_TASK_MARKER 0xDEADBEEF
#define COREDUMP_CURR_TASK_NOT_FOUND -1 #define COREDUMP_CURR_TASK_NOT_FOUND -1
#if CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF #if CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
#define COREDUMP_VERSION COREDUMP_VERSION_ELF_CRC32 #define COREDUMP_VERSION COREDUMP_VERSION_ELF_CRC32
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
#define COREDUMP_VERSION COREDUMP_VERSION_ELF_SHA256 #define COREDUMP_VERSION COREDUMP_VERSION_ELF_SHA256
#define COREDUMP_SHA256_LEN 32 #define COREDUMP_SHA256_LEN 32
#endif #endif
@ -83,11 +83,11 @@ typedef struct _core_dump_write_data_t
uint32_t data32; uint32_t data32;
} cached_data; } cached_data;
uint8_t cached_bytes; uint8_t cached_bytes;
#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #if CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
// TODO: move this to portable part of the code // TODO: move this to portable part of the code
mbedtls_sha256_context ctx; mbedtls_sha256_context ctx;
char sha_output[COREDUMP_SHA256_LEN]; char sha_output[COREDUMP_SHA256_LEN];
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #elif CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
core_dump_crc_t crc; // CRC of dumped data core_dump_crc_t crc; // CRC of dumped data
#endif #endif
} core_dump_write_data_t; } core_dump_write_data_t;

4
components/espcoredump/linker.lf
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@ -13,7 +13,7 @@ entries:
[mapping:spi_flash_override] [mapping:spi_flash_override]
archive: libspi_flash.a archive: libspi_flash.a
entries: entries:
if ESP_PANIC_HANDLER_IRAM = y && ESP32_ENABLE_COREDUMP_TO_FLASH = y: if ESP_PANIC_HANDLER_IRAM = y && ESP_COREDUMP_ENABLE_TO_FLASH = y:
esp_flash_api (noflash_text) esp_flash_api (noflash_text)
esp_flash_spi_init (noflash_text) esp_flash_spi_init (noflash_text)
else: else:
@ -22,7 +22,7 @@ entries:
[mapping:mbedtls] [mapping:mbedtls]
archive: libmbedtls.a archive: libmbedtls.a
entries: entries:
if ESP32_COREDUMP_CHECKSUM_SHA256 = y : if ESP_COREDUMP_CHECKSUM_SHA256 = y :
if MBEDTLS_HARDWARE_SHA = n: if MBEDTLS_HARDWARE_SHA = n:
sha256 (noflash_text) sha256 (noflash_text)
else: else:

16
components/espcoredump/sdkconfig.rename Normal file
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@ -0,0 +1,16 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH
CONFIG_ESP32_ENABLE_COREDUMP_TO_UART CONFIG_ESP_COREDUMP_ENABLE_TO_UART
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
CONFIG_ESP32_COREDUMP_DATA_FORMAT_BIN CONFIG_ESP_COREDUMP_DATA_FORMAT_BIN
CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
CONFIG_ESP32_ENABLE_COREDUMP CONFIG_ESP_COREDUMP_ENABLE
CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM CONFIG_ESP_COREDUMP_MAX_TASKS_NUM
CONFIG_ESP32_CORE_DUMP_UART_DELAY CONFIG_ESP_COREDUMP_UART_DELAY
CONFIG_ESP32_CORE_DUMP_STACK_SIZE CONFIG_ESP_COREDUMP_STACK_SIZE
CONFIG_ESP32_CORE_DUMP_DECODE_INFO CONFIG_ESP_COREDUMP_DECODE_INFO
CONFIG_ESP32_CORE_DUMP_DECODE_DISABLE CONFIG_ESP_COREDUMP_DECODE_DISABLE
CONFIG_ESP32_CORE_DUMP_DECODE CONFIG_ESP_COREDUMP_DECODE

12
components/espcoredump/src/core_dump_common.c
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@ -18,7 +18,7 @@
const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_common"; const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_common";
#if CONFIG_ESP32_COREDUMP_DATA_FORMAT_BIN #if CONFIG_ESP_COREDUMP_DATA_FORMAT_BIN
static inline uint32_t esp_core_dump_get_tcb_len(void) static inline uint32_t esp_core_dump_get_tcb_len(void)
{ {
@ -102,14 +102,14 @@ static esp_err_t esp_core_dump_save_mem_segment(core_dump_write_config_t* write_
static esp_err_t esp_core_dump_write_binary(panic_info_t *info, core_dump_write_config_t *write_cfg) static esp_err_t esp_core_dump_write_binary(panic_info_t *info, core_dump_write_config_t *write_cfg)
{ {
esp_err_t err; esp_err_t err;
static core_dump_task_header_t *tasks[CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM]; static core_dump_task_header_t *tasks[CONFIG_ESP_COREDUMP_MAX_TASKS_NUM];
uint32_t task_num, tcb_sz = esp_core_dump_get_tcb_len(); uint32_t task_num, tcb_sz = esp_core_dump_get_tcb_len();
uint32_t data_len = 0, task_id; uint32_t data_len = 0, task_id;
int curr_task_index = COREDUMP_CURR_TASK_NOT_FOUND; int curr_task_index = COREDUMP_CURR_TASK_NOT_FOUND;
core_dump_header_t hdr; core_dump_header_t hdr;
core_dump_mem_seg_header_t interrupted_task_stack; core_dump_mem_seg_header_t interrupted_task_stack;
task_num = esp_core_dump_get_tasks_snapshot(tasks, CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM); task_num = esp_core_dump_get_tasks_snapshot(tasks, CONFIG_ESP_COREDUMP_MAX_TASKS_NUM);
ESP_COREDUMP_LOGI("Found tasks: %d!", task_num); ESP_COREDUMP_LOGI("Found tasks: %d!", task_num);
// Verifies all tasks in the snapshot // Verifies all tasks in the snapshot
@ -282,11 +282,11 @@ inline void esp_core_dump_write(panic_info_t *info, core_dump_write_config_t *wr
{ {
esp_core_dump_setup_stack(); esp_core_dump_setup_stack();
#ifndef CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE #ifndef CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
esp_err_t err = ESP_ERR_NOT_SUPPORTED; esp_err_t err = ESP_ERR_NOT_SUPPORTED;
#if CONFIG_ESP32_COREDUMP_DATA_FORMAT_BIN #if CONFIG_ESP_COREDUMP_DATA_FORMAT_BIN
err = esp_core_dump_write_binary(info, write_cfg); err = esp_core_dump_write_binary(info, write_cfg);
#elif CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF #elif CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
err = esp_core_dump_write_elf(info, write_cfg); err = esp_core_dump_write_elf(info, write_cfg);
#endif #endif
if (err != ESP_OK) { if (err != ESP_OK) {

8
components/espcoredump/src/core_dump_elf.c
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@ -89,7 +89,7 @@ typedef struct _core_dump_elf_t
#define ALIGN(b, var) var = align(b, var) #define ALIGN(b, var) var = align(b, var)
#if CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF #if CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
static inline uint32_t align(uint32_t width, uint32_t in) static inline uint32_t align(uint32_t width, uint32_t in)
{ {
@ -607,7 +607,7 @@ static int esp_core_dump_do_write_elf_pass(core_dump_elf_t *self, panic_info_t *
esp_err_t esp_core_dump_write_elf(panic_info_t *info, core_dump_write_config_t *write_cfg) esp_err_t esp_core_dump_write_elf(panic_info_t *info, core_dump_write_config_t *write_cfg)
{ {
esp_err_t err = ESP_OK; esp_err_t err = ESP_OK;
static core_dump_task_header_t *tasks[CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM]; static core_dump_task_header_t *tasks[CONFIG_ESP_COREDUMP_MAX_TASKS_NUM];
static core_dump_elf_t self; static core_dump_elf_t self;
core_dump_header_t dump_hdr; core_dump_header_t dump_hdr;
uint32_t tcb_sz = COREDUMP_TCB_SIZE, task_num; uint32_t tcb_sz = COREDUMP_TCB_SIZE, task_num;
@ -616,7 +616,7 @@ esp_err_t esp_core_dump_write_elf(panic_info_t *info, core_dump_write_config_t *
ELF_CHECK_ERR((info && write_cfg), ESP_ERR_INVALID_ARG, "Invalid input data."); ELF_CHECK_ERR((info && write_cfg), ESP_ERR_INVALID_ARG, "Invalid input data.");
task_num = esp_core_dump_get_tasks_snapshot(tasks, CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM); task_num = esp_core_dump_get_tasks_snapshot(tasks, CONFIG_ESP_COREDUMP_MAX_TASKS_NUM);
ESP_COREDUMP_LOGI("Found tasks: %d", task_num); ESP_COREDUMP_LOGI("Found tasks: %d", task_num);
self.write_cfg = write_cfg; self.write_cfg = write_cfg;
@ -700,4 +700,4 @@ esp_err_t esp_core_dump_write_elf(panic_info_t *info, core_dump_write_config_t *
return err; return err;
} }
#endif //CONFIG_ESP32_COREDUMP_DATA_FORMAT_ELF #endif //CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF

6
components/espcoredump/src/core_dump_flash.c
View File

@ -20,7 +20,7 @@
const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_flash"; const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_flash";
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH #if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH
typedef struct _core_dump_partition_t typedef struct _core_dump_partition_t
{ {
@ -313,7 +313,7 @@ esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size)
return err; return err;
} }
// TODO: check CRC or SHA basing on the version of coredump image stored in flash // TODO: check CRC or SHA basing on the version of coredump image stored in flash
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
uint32_t *crc = (uint32_t *)(((uint8_t *)core_data) + *out_size); uint32_t *crc = (uint32_t *)(((uint8_t *)core_data) + *out_size);
crc--; // Point to CRC field crc--; // Point to CRC field
@ -326,7 +326,7 @@ esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size)
spi_flash_munmap(core_data_handle); spi_flash_munmap(core_data_handle);
return ESP_ERR_INVALID_CRC; return ESP_ERR_INVALID_CRC;
} }
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
uint8_t* sha256_ptr = (uint8_t*)(((uint8_t *)core_data) + *out_size); uint8_t* sha256_ptr = (uint8_t*)(((uint8_t *)core_data) + *out_size);
sha256_ptr -= COREDUMP_SHA256_LEN; sha256_ptr -= COREDUMP_SHA256_LEN;
ESP_LOGD(TAG, "Core dump data offset, size: %d, %u!", ESP_LOGD(TAG, "Core dump data offset, size: %d, %u!",

26
components/espcoredump/src/core_dump_port.c
View File

@ -126,7 +126,7 @@ typedef struct
extern uint8_t port_IntStack; extern uint8_t port_IntStack;
#if CONFIG_ESP32_ENABLE_COREDUMP #if CONFIG_ESP_COREDUMP_ENABLE
static uint32_t s_total_length = 0; static uint32_t s_total_length = 0;
@ -142,8 +142,8 @@ static uint32_t s_fake_stacks_num;
static xtensa_extra_info_t s_extra_info; static xtensa_extra_info_t s_extra_info;
#if ESP32_CORE_DUMP_STACK_SIZE > 0 #if ESP_COREDUMP_STACK_SIZE > 0
uint8_t s_coredump_stack[ESP32_CORE_DUMP_STACK_SIZE]; uint8_t s_coredump_stack[ESP_COREDUMP_STACK_SIZE];
uint8_t *s_core_dump_sp; uint8_t *s_core_dump_sp;
static uint32_t esp_core_dump_free_stack_space(const uint8_t *pucStackByte) static uint32_t esp_core_dump_free_stack_space(const uint8_t *pucStackByte)
@ -160,14 +160,14 @@ static uint32_t esp_core_dump_free_stack_space(const uint8_t *pucStackByte)
void esp_core_dump_report_stack_usage(void) void esp_core_dump_report_stack_usage(void)
{ {
#if ESP32_CORE_DUMP_STACK_SIZE > 0 #if ESP_COREDUMP_STACK_SIZE > 0
uint32_t bytes_free = esp_core_dump_free_stack_space(s_coredump_stack); uint32_t bytes_free = esp_core_dump_free_stack_space(s_coredump_stack);
ESP_COREDUMP_LOGD("Core dump used %u bytes on stack. %u bytes left free.", ESP_COREDUMP_LOGD("Core dump used %u bytes on stack. %u bytes left free.",
s_core_dump_sp - s_coredump_stack - bytes_free, bytes_free); s_core_dump_sp - s_coredump_stack - bytes_free, bytes_free);
#endif #endif
} }
#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #if CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
// function to calculate SHA256 for solid data array // function to calculate SHA256 for solid data array
int esp_core_dump_sha(mbedtls_sha256_context *ctx, int esp_core_dump_sha(mbedtls_sha256_context *ctx,
@ -204,9 +204,9 @@ void esp_core_dump_print_sha256(const char* msg, const uint8_t* sha_output)
void esp_core_dump_checksum_init(core_dump_write_data_t* wr_data) void esp_core_dump_checksum_init(core_dump_write_data_t* wr_data)
{ {
if (wr_data) { if (wr_data) {
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
wr_data->crc = 0; wr_data->crc = 0;
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
mbedtls_sha256_init(&wr_data->ctx); mbedtls_sha256_init(&wr_data->ctx);
(void)mbedtls_sha256_starts_ret(&wr_data->ctx, 0); (void)mbedtls_sha256_starts_ret(&wr_data->ctx, 0);
#endif #endif
@ -217,9 +217,9 @@ void esp_core_dump_checksum_init(core_dump_write_data_t* wr_data)
void esp_core_dump_checksum_update(core_dump_write_data_t* wr_data, void* data, size_t data_len) void esp_core_dump_checksum_update(core_dump_write_data_t* wr_data, void* data, size_t data_len)
{ {
if (wr_data && data) { if (wr_data && data) {
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
wr_data->crc = esp_rom_crc32_le(wr_data->crc, data, data_len); wr_data->crc = esp_rom_crc32_le(wr_data->crc, data, data_len);
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
#if CONFIG_MBEDTLS_HARDWARE_SHA #if CONFIG_MBEDTLS_HARDWARE_SHA
// set software mode of SHA calculation // set software mode of SHA calculation
wr_data->ctx.mode = ESP_MBEDTLS_SHA256_SOFTWARE; wr_data->ctx.mode = ESP_MBEDTLS_SHA256_SOFTWARE;
@ -236,14 +236,14 @@ uint32_t esp_core_dump_checksum_finish(core_dump_write_data_t* wr_data, void** c
{ {
// get core dump checksum // get core dump checksum
uint32_t chs_len = 0; uint32_t chs_len = 0;
#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32 #if CONFIG_ESP_COREDUMP_CHECKSUM_CRC32
if (chs_ptr) { if (chs_ptr) {
wr_data->crc = wr_data->crc; wr_data->crc = wr_data->crc;
*chs_ptr = (void*)&wr_data->crc; *chs_ptr = (void*)&wr_data->crc;
ESP_COREDUMP_LOG_PROCESS("Dump data CRC = 0x%x, offset = 0x%x", wr_data->crc, wr_data->off); ESP_COREDUMP_LOG_PROCESS("Dump data CRC = 0x%x, offset = 0x%x", wr_data->crc, wr_data->off);
} }
chs_len = sizeof(wr_data->crc); chs_len = sizeof(wr_data->crc);
#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #elif CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
if (chs_ptr) { if (chs_ptr) {
ESP_COREDUMP_LOG_PROCESS("Dump data offset = %d", wr_data->off); ESP_COREDUMP_LOG_PROCESS("Dump data offset = %d", wr_data->off);
(void)mbedtls_sha256_finish_ret(&wr_data->ctx, (uint8_t*)&wr_data->sha_output); (void)mbedtls_sha256_finish_ret(&wr_data->ctx, (uint8_t*)&wr_data->sha_output);
@ -287,7 +287,7 @@ inline bool esp_core_dump_tcb_addr_is_sane(uint32_t addr)
uint32_t esp_core_dump_get_tasks_snapshot(core_dump_task_header_t** const tasks, uint32_t esp_core_dump_get_tasks_snapshot(core_dump_task_header_t** const tasks,
const uint32_t snapshot_size) const uint32_t snapshot_size)
{ {
static TaskSnapshot_t s_tasks_snapshots[CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM]; static TaskSnapshot_t s_tasks_snapshots[CONFIG_ESP_COREDUMP_MAX_TASKS_NUM];
uint32_t tcb_sz; // unused uint32_t tcb_sz; // unused
/* implying that TaskSnapshot_t extends core_dump_task_header_t by adding extra fields */ /* implying that TaskSnapshot_t extends core_dump_task_header_t by adding extra fields */
@ -521,7 +521,7 @@ bool esp_core_dump_check_task(panic_info_t *info,
task_frame->a0, task_frame->a0,
task_frame->a1); task_frame->a1);
} else { } else {
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH #if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH
XtExcFrame *task_frame2 = (XtExcFrame *)task->stack_start; XtExcFrame *task_frame2 = (XtExcFrame *)task->stack_start;
task_frame2->exccause = COREDUMP_INVALID_CAUSE_VALUE; task_frame2->exccause = COREDUMP_INVALID_CAUSE_VALUE;
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x) EXIT/PC/PS/A0/SP %x %x %x %x %x", ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x) EXIT/PC/PS/A0/SP %x %x %x %x %x",

6
components/espcoredump/src/core_dump_uart.c
View File

@ -26,7 +26,7 @@
const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_uart"; const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_uart";
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART #if CONFIG_ESP_COREDUMP_ENABLE_TO_UART
static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) { static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) {
const static DRAM_ATTR char b64[] = const static DRAM_ATTR char b64[] =
@ -84,7 +84,7 @@ static esp_err_t esp_core_dump_uart_write_end(void *priv)
esp_rom_printf(DRAM_STR("%s\r\n"), buf); esp_rom_printf(DRAM_STR("%s\r\n"), buf);
} }
esp_rom_printf(DRAM_STR("================= CORE DUMP END =================\r\n")); esp_rom_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256 #if CONFIG_ESP_COREDUMP_CHECKSUM_SHA256
if (cs_addr) { if (cs_addr) {
esp_core_dump_print_sha256(DRAM_STR("Coredump SHA256"), (uint8_t*)(cs_addr)); esp_core_dump_print_sha256(DRAM_STR("Coredump SHA256"), (uint8_t*)(cs_addr));
} }
@ -152,7 +152,7 @@ void esp_core_dump_to_uart(panic_info_t *info)
ESP_COREDUMP_LOGI("Press Enter to print core dump to UART..."); ESP_COREDUMP_LOGI("Press Enter to print core dump to UART...");
const int cpu_ticks_per_ms = esp_clk_cpu_freq() / 1000; const int cpu_ticks_per_ms = esp_clk_cpu_freq() / 1000;
tm_end = xthal_get_ccount() / cpu_ticks_per_ms + CONFIG_ESP32_CORE_DUMP_UART_DELAY; tm_end = xthal_get_ccount() / cpu_ticks_per_ms + CONFIG_ESP_COREDUMP_UART_DELAY;
ch = esp_core_dump_uart_get_char(); ch = esp_core_dump_uart_get_char();
while (!(ch == '\n' || ch == '\r')) { while (!(ch == '\n' || ch == '\r')) {
tm_cur = xthal_get_ccount() / cpu_ticks_per_ms; tm_cur = xthal_get_ccount() / cpu_ticks_per_ms;