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bugfix(adc): missing ranges of ADC codes in ESP32

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This commit is contained in:
fuzhibo 2021-03-24 15:02:29 +08:00 committed by bot
parent 47a5ef0b56
commit 21150d9286
3 changed files with 8 additions and 5 deletions
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3
components/driver/adc.c
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@ -34,7 +34,6 @@
#define ADC_MAX_MEAS_NUM_DEFAULT (255)
#define ADC_MEAS_NUM_LIM_DEFAULT (1)
#define SAR_ADC_CLK_DIV_DEFUALT (2)
#define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIG_FORMAT_12BIT)
#define DIG_ADC_ATTEN_DEFUALT (ADC_ATTEN_DB_11)
@ -234,7 +233,7 @@ esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
adc_hal_dig_config_t dig_cfg = {
.conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
.conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
.clk_div = SAR_ADC_CLK_DIV_DEFUALT,
.clk_div = SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT,
.format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
.conv_mode = (adc_ll_convert_mode_t)adc_unit,
};

6
components/soc/esp32/include/soc/adc_caps.h
View File

@ -10,7 +10,7 @@
#define SOC_ADC2_DATA_INVERT_DEFAULT (1)
#define SOC_ADC_FSM_RSTB_WAIT_DEFAULT (8)
#define SOC_ADC_FSM_START_WAIT_DEFAULT (5)
#define SOC_ADC_FSM_START_WAIT_DEFAULT (SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT * 2)
#define SOC_ADC_FSM_STANDBY_WAIT_DEFAULT (100)
#define ADC_FSM_SAMPLE_CYCLE_DEFAULT (2)
@ -22,4 +22,6 @@
*/
#define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) ((PERIPH_NUM==0)? 1: 0)
#define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (16)

4
components/soc/esp32s2beta/include/soc/adc_caps.h
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@ -22,4 +22,6 @@
*/
#define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) ((PERIPH_NUM==0)? 1: 0)
#define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_PWDET_CCT_DEFAULT (4)
#define SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT (2)