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Merge branch 'bugfix/rtc_wdt_timeout' into 'feature/esp32s2beta'

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soc: Fix setting timeout for RTC_WDT

See merge request espressif/esp-idf!6172
This commit is contained in:
Angus Gratton 2019-10-08 09:57:07 +08:00
commit 20456e697c
3 changed files with 8 additions and 4 deletions
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4
components/esp32s2beta/clk.c
View File

@ -66,10 +66,10 @@ void esp_clk_init(void)
#ifdef CONFIG_BOOTLOADER_WDT_ENABLE
// WDT uses a SLOW_CLK clock source. After a function select_rtc_slow_clk a frequency of this source can changed.
// If the frequency changes from 150kHz to 32kHz, then the timeout set for the WDT will increase 4.6 times.
// If the frequency changes from 90kHz to 32kHz, then the timeout set for the WDT will increase 2.8 times.
// Therefore, for the time of frequency change, set a new lower timeout value (1.6 sec).
// This prevents excessive delay before resetting in case the supply voltage is drawdown.
// (If frequency is changed from 150kHz to 32kHz then WDT timeout will increased to 1.6sec * 150/32 = 7.5 sec).
// (If frequency is changed from 90kHz to 32kHz then WDT timeout will increased to 1.6sec * 90/32 = 4.5 sec).
rtc_wdt_protect_off();
rtc_wdt_feed();
rtc_wdt_set_time(RTC_WDT_STAGE0, 1600);

4
components/soc/esp32s2beta/rtc_clk.c
View File

@ -37,7 +37,7 @@
/* Frequency of the 8M oscillator is 8.5MHz +/- 5%, at the default DCAP setting */
#define RTC_FAST_CLK_FREQ_8M 8500000
#define RTC_SLOW_CLK_FREQ_150K 150000
#define RTC_SLOW_CLK_FREQ_90K 90000
#define RTC_SLOW_CLK_FREQ_8MD256 (RTC_FAST_CLK_FREQ_8M / 256)
#define RTC_SLOW_CLK_FREQ_32K 32768
@ -314,7 +314,7 @@ rtc_slow_freq_t rtc_clk_slow_freq_get(void)
uint32_t rtc_clk_slow_freq_get_hz(void)
{
switch(rtc_clk_slow_freq_get()) {
case RTC_SLOW_FREQ_RTC: return RTC_SLOW_CLK_FREQ_150K;
case RTC_SLOW_FREQ_RTC: return RTC_SLOW_CLK_FREQ_90K;
case RTC_SLOW_FREQ_32K_XTAL: return RTC_SLOW_CLK_FREQ_32K;
case RTC_SLOW_FREQ_8MD256: return RTC_SLOW_CLK_FREQ_8MD256;
}

4
components/soc/esp32s2beta/rtc_wdt.c
View File

@ -14,6 +14,7 @@
#include "soc/rtc_wdt.h"
#include "soc/rtc.h"
#include "soc/efuse_periph.h"
bool rtc_wdt_get_protect_status(void)
@ -94,6 +95,9 @@ esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
return ESP_ERR_INVALID_ARG;
}
uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000);
if (stage == RTC_WDT_STAGE0) {
timeout = timeout >> (1 + REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_WDT_DELAY_SEL));
}
WRITE_PERI_REG(get_addr_reg(stage), timeout);
return ESP_OK;
}