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Merge branch 'bugfix/reset_log_uart_port_v3.2' into 'release/v3.2'

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esp32: Add reset CONSOLE_UART port (v3.2)

See merge request idf/esp-idf!5121
This commit is contained in:
Angus Gratton 2019-06-06 16:19:22 +08:00
commit 1ffaf8aad9
2 changed files with 5 additions and 1 deletions
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4
components/bootloader_support/src/bootloader_init.c
View File

@ -440,6 +440,7 @@ static void uart_console_configure(void)
// (arrays should be optimized away by the compiler)
const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX };
const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX };
const uint32_t uart_reset[3] = { DPORT_UART_RST, DPORT_UART1_RST, DPORT_UART2_RST };
const uint32_t tx_idx = tx_idx_list[uart_num];
const uint32_t rx_idx = rx_idx_list[uart_num];
@ -448,6 +449,9 @@ static void uart_console_configure(void)
gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0);
gpio_matrix_in(uart_rx_gpio, rx_idx, 0);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
}
#endif // CONFIG_CONSOLE_UART_CUSTOM

2
components/esp32/system_api.c
View File

@ -329,7 +329,7 @@ void IRAM_ATTR esp_restart_noos()
// Reset timer/spi/uart
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_UART_RST);
DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_UART_RST | DPORT_UART1_RST | DPORT_UART2_RST);
DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
// Set CPU back to XTAL source, no PLL, same as hard reset