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esp_lcd: check edma buffer alignment properly

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This commit is contained in:
morris 2023-03-31 14:24:29 +08:00
parent 1e7f9c8f72
commit 1fed9badf1
3 changed files with 8 additions and 15 deletions
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6
components/esp_lcd/CMakeLists.txt
View File

@ -7,7 +7,7 @@ set(srcs "src/esp_lcd_common.c"
"src/esp_lcd_panel_st7789.c"
"src/esp_lcd_panel_ops.c")
set(includes "include" "interface")
set(priv_requires "driver" "esp_mm")
set(priv_requires "driver" "esp_mm" "esp_psram")
if(CONFIG_SOC_I2S_LCD_I80_VARIANT)
list(APPEND srcs "src/esp_lcd_panel_io_i2s.c")
@ -21,7 +21,3 @@ idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
PRIV_REQUIRES ${priv_requires}
LDFRAGMENTS linker.lf)
if(CONFIG_SPIRAM)
idf_component_optional_requires(PRIVATE esp_psram)
endif()

7
components/esp_lcd/src/esp_lcd_panel_io_i80.c
View File

@ -36,6 +36,7 @@
#include "soc/lcd_periph.h"
#include "hal/lcd_ll.h"
#include "hal/lcd_hal.h"
#include "esp_cache.h"
static const char *TAG = "lcd_panel.io.i80";
@ -43,9 +44,6 @@ typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t;
typedef struct lcd_panel_io_i80_t lcd_panel_io_i80_t;
typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t;
// This function is located in ROM (also see esp_rom/${target}/ld/${target}.rom.ld)
extern int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size);
static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io);
@ -472,7 +470,8 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
if (esp_ptr_external_ram(color)) {
// flush frame buffer from cache to the physical PSRAM
Cache_WriteBack_Addr((uint32_t)color, color_size);
// note the esp_cache_msync function will check the alignment of the address and size, and error out if either of them is not matched
ESP_RETURN_ON_ERROR(esp_cache_msync((void *)color, color_size, 0), TAG, "flush cache buffer failed");
}
// send transaction to trans_queue

8
components/esp_lcd/src/esp_lcd_panel_rgb.c
View File

@ -33,9 +33,7 @@
#include "driver/gpio.h"
#include "esp_bit_defs.h"
#include "esp_private/periph_ctrl.h"
#if CONFIG_SPIRAM
#include "esp_psram.h"
#endif
#include "esp_lcd_common.h"
#include "soc/lcd_periph.h"
#include "hal/lcd_hal.h"
@ -593,7 +591,7 @@ static esp_err_t rgb_panel_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int
int pixels_per_line = rgb_panel->timings.h_res;
uint32_t bytes_per_line = bytes_per_pixel * pixels_per_line;
uint8_t *fb = rgb_panel->fbs[rgb_panel->cur_fb_index];
uint32_t bytes_to_flush = v_res * h_res * bytes_per_pixel;
size_t bytes_to_flush = v_res * h_res * bytes_per_pixel;
uint8_t *flush_ptr = fb;
if (do_copy) {
@ -796,10 +794,10 @@ static esp_err_t rgb_panel_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int
}
// Note that if we use a bounce buffer, the data gets read by the CPU as well so no need to write back
if (rgb_panel->flags.fb_in_psram && !rgb_panel->bb_size) {
// CPU writes data to PSRAM through DCache, data in PSRAM might not get updated, so write back
// Note that if we use a bounce buffer, the data gets read by the CPU as well so no need to write back
esp_cache_msync((void *)(flush_ptr), (size_t)bytes_to_flush, 0);
ESP_RETURN_ON_ERROR(esp_cache_msync(flush_ptr, bytes_to_flush, 0), TAG, "flush cache buffer failed");
}
if (!rgb_panel->bb_size) {