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Merge branch 'feat/xip_psram_example_p4' into 'master'
xip_psram: support xip psram example on p4 See merge request espressif/esp-idf!32333
This commit is contained in:
Armando (Dou Yiwen)
commit
1f5cae8e79
@ -394,6 +394,3 @@ examples/system/xip_from_psram:
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disable:
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- if: IDF_TARGET == "esp32"
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reason: target esp32 doesn't support this feature.
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: not supported on p4 #TODO: IDF-7556
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@ -5,4 +5,8 @@
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cmake_minimum_required(VERSION 3.16)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
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set(COMPONENTS main)
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project(xip_from_psram)
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@ -1,5 +1,5 @@
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| Supported Targets | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- |
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| Supported Targets | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- |
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# XIP (Execute-In-Place) From PSRAM Example
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@ -10,14 +10,14 @@ This example illustrates a typical usage of XIP (Execute-In-Place) From PSRAM. W
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## Overview
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Here we define two sets of operations related to external memory:
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SET1: Operations where CPU fetches data and instructions from external memory.
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SET1: Operations where CPU fetches data and instructions from external memory.
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SET2: `ESP Flash` driver operations and other operations from drivers based on `ESP Flash` (NVS, Partition drivers, etc.).
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By default, during `SET2` operations, concurrent access requests to the Flash and PSRAM (`SET1` operations) will be disabled otherwise both the `SET1` and `SET2` operations are not guaranteed to be safe (this is an undefined behaviour).
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Only ISRs in internal RAM will get executed during `SET2` operations. Besides, if any functions or data are accessed in these ISRs (usually this happens in ISR callbacks), they need to be placed into internal RAM as well. For interrupt handlers which need to execute when the cache is disabled (e.g., for low latency operations), you need to set the ESP_INTR_FLAG_IRAM flag when the interrupt handler is registered.
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When **CONFIG_SPIRAM_FETCH_INSTRUCTIONS** and **CONFIG_SPIRAM_RODATA** are both enabled, the `flash.text` sections (for instructions) and the `.rodata` section (read only data) will be moved to PSRAM. Corresponding virtual memory range will be re-mapped to PSRAM. Under this condition, ESP-IDF won't disable concurrent accesses to external memory (`SET1` operations) anymore.
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When **CONFIG_SPIRAM_XIP_FROM_PSRAM** is enabled, the `flash.text` sections (for instructions) and the `.rodata` section (read only data) will be moved to PSRAM. Corresponding virtual memory range will be mapped to PSRAM. Under this condition, ESP-IDF won't disable concurrent accesses to external memory (`SET1` operations) anymore.
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By using this feature, during `SET2` operations, placement of ISRs, ISR callbacks, and related data are no longer limited to internal RAM.
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@ -27,17 +27,17 @@ To show this feature, in this example we go through the following steps:
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`General Steps`:
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1. Create a partition for Flash Erase Operation
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2. Create an esp_timer in one-shot mode
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2. Create an esp_timer in one-shot mode
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`PSRAM Steps`:
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3. Do a Flash erase operation, and start the timer
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4. ESP-Timer callback is dispatched and it calls a function in PSRAM during the flash erase operation
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4. ESP-Timer callback is dispatched and it calls a function in PSRAM during the flash erase operation
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5. The Flash erase operation finishes
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6. Show the result about the callback(in PSRAM) response and execute time
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`IRAM Steps`:
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7. Do a Flash erase operation, and start the timer
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8. ESP-Timer callback is dispatched and it calls a function in IRAM during the flash erase operation
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8. ESP-Timer callback is dispatched and it calls a function in IRAM during the flash erase operation
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9. The flash erase operation finishes
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10. Show the result about the callback(in IRAM) response and execute time
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@ -46,28 +46,28 @@ To show this feature, in this example we go through the following steps:
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Initialization and config -> Flash erase start -> ESP-Timer callback(in PSRAM) appear -> Flash erase finish -> Flash erase start -> ESP-Timer callback(in IRAM) appear -> Flash erase finish
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ISR CPU
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| * <----flash operation starts
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| * <----flash operation starts
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| *
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callback starts * --------> *
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(in PSRAM) * *
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callback finishes * <-------- *
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callback starts * --------> *
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(in PSRAM) * *
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callback finishes * <-------- *
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| *
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| *
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| * <----flash operation finishes
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| * <----flash operation starts
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| * <----flash operation starts
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| *
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callback starts * --------> *
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(in IRAM) * *
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callback finishes * <-------- *
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callback starts * --------> *
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(in IRAM) * *
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callback finishes * <-------- *
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| *
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| *
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| * <----flash operation finishes
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@ -1,2 +1,3 @@
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idf_component_register(SRCS "xip_from_psram_example_main.c"
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INCLUDE_DIRS ".")
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INCLUDE_DIRS "."
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REQUIRES esp_psram esp_partition spi_flash esp_timer)
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@ -1,12 +1,12 @@
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# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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from pytest_embedded.dut import Dut
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@pytest.mark.esp32s2
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@pytest.mark.esp32s3
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@pytest.mark.esp32p4
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@pytest.mark.generic
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# in order to build the default sdkconfig(the CI won't build the sdkconfig.defaults if there is a sdkconfig.ci.xx)
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@pytest.mark.parametrize(
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@ -47,3 +47,24 @@ def test_xip_from_psram_example_f4r8(dut: Dut) -> None:
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res = dut.expect(r'callback\(in IRAM\) response time: (\d{1,3}) us')
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response_time = res.group(1).decode('utf8')
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assert float(response_time) <= 12
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@pytest.mark.esp32p4
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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[
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'esp32p4_200m',
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],
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indirect=True,
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)
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def test_xip_from_psram_example_p4_200m(dut: Dut) -> None:
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dut.expect_exact('found partition')
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res = dut.expect(r'callback\(in PSRAM\) response time: (\d{1,3}) us')
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response_time = res.group(1).decode('utf8')
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assert float(response_time) <= 10
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res = dut.expect(r'callback\(in IRAM\) response time: (\d{1,3}) us')
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response_time = res.group(1).decode('utf8')
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assert float(response_time) <= 10
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@ -3,5 +3,4 @@ CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
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CONFIG_SPIRAM_RODATA=y
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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3
examples/system/xip_from_psram/sdkconfig.esp32p4_200m
Normal file
3
examples/system/xip_from_psram/sdkconfig.esp32p4_200m
Normal file
@ -0,0 +1,3 @@
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CONFIG_IDF_TARGET="esp32p4"
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CONFIG_IDF_EXPERIMENTAL_FEATURES=y
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CONFIG_SPIRAM_SPEED_200M=y
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