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lp_timer: lp_timer register address mapping structure redefinition

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Li Shuai 2021-12-23 17:20:52 +08:00 committed by wuzhenghui
parent 59cf87fe7d
commit 1eb08db0df
1 changed files with 70 additions and 317 deletions
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387
components/soc/esp32c6/include/soc/lp_timer_struct.h
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@ -1,5 +1,5 @@
/** /**
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -10,346 +10,99 @@
extern "C" { extern "C" {
#endif #endif
/** Group: configure_register */ typedef struct {
/** Type of tar0_low register union {
* need_des struct {
*/ uint32_t target_lo: 32;
typedef union { };
struct { uint32_t val;
/** main_timer_tar_low0 : R/W; bitpos: [31:0]; default: 0; } lo;
* need_des union {
*/ struct {
uint32_t main_timer_tar_low0:32; uint32_t target_hi: 16;
}; uint32_t reserved0: 15;
uint32_t val; uint32_t enable : 1;
} lp_timer_tar0_low_reg_t; };
uint32_t val;
} hi;
} lp_timer_target_reg_t;
/** Type of tar0_high register
* need_des
*/
typedef union { typedef union {
struct { struct {
/** main_timer_tar_high0 : R/W; bitpos: [15:0]; default: 0; uint32_t reserved0: 28;
* need_des uint32_t update : 1;
*/ uint32_t xtal_off : 1;
uint32_t main_timer_tar_high0:16; uint32_t sys_stall: 1;
uint32_t reserved_16:15; uint32_t sys_rst : 1;
/** main_timer_tar_en0 : WT; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_tar_en0:1;
};
uint32_t val;
} lp_timer_tar0_high_reg_t;
/** Type of tar1_low register
* need_des
*/
typedef union {
struct {
/** main_timer_tar_low1 : R/W; bitpos: [31:0]; default: 0;
* need_des
*/
uint32_t main_timer_tar_low1:32;
};
uint32_t val;
} lp_timer_tar1_low_reg_t;
/** Type of tar1_high register
* need_des
*/
typedef union {
struct {
/** main_timer_tar_high1 : R/W; bitpos: [15:0]; default: 0;
* need_des
*/
uint32_t main_timer_tar_high1:16;
uint32_t reserved_16:15;
/** main_timer_tar_en1 : WT; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_tar_en1:1;
};
uint32_t val;
} lp_timer_tar1_high_reg_t;
/** Type of update register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:28;
/** main_timer_update : WT; bitpos: [28]; default: 0;
* need_des
*/
uint32_t main_timer_update:1;
/** main_timer_xtal_off : R/W; bitpos: [29]; default: 0;
* need_des
*/
uint32_t main_timer_xtal_off:1;
/** main_timer_sys_stall : R/W; bitpos: [30]; default: 0;
* need_des
*/
uint32_t main_timer_sys_stall:1;
/** main_timer_sys_rst : R/W; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_sys_rst:1;
}; };
uint32_t val; uint32_t val;
} lp_timer_update_reg_t; } lp_timer_update_reg_t;
/** Type of main_buf0_low register typedef struct {
* need_des union {
*/ struct {
uint32_t counter_lo: 32;
};
uint32_t val;
} lo;
union {
struct {
uint32_t counter_hi: 16;
uint32_t reserved0 : 16;
};
uint32_t val;
} hi;
} lp_timer_counter_reg_t;
typedef union { typedef union {
struct { struct {
/** main_timer_buf0_low : RO; bitpos: [31:0]; default: 0; uint32_t reserved0: 31;
* need_des uint32_t trigger : 1;
*/
uint32_t main_timer_buf0_low:32;
}; };
uint32_t val; uint32_t val;
} lp_timer_main_buf0_low_reg_t; } lp_timer_overflow_reg_t;
/** Type of main_buf0_high register
* need_des
*/
typedef union { typedef union {
struct { struct {
/** main_timer_buf0_high : RO; bitpos: [15:0]; default: 0; uint32_t reserved0: 30;
* need_des uint32_t overflow : 1;
*/ uint32_t alarm : 1;
uint32_t main_timer_buf0_high:16;
uint32_t reserved_16:16;
}; };
uint32_t val; uint32_t val;
} lp_timer_main_buf0_high_reg_t; } lp_timer_intr_reg_t;
/** Type of main_buf1_low register
* need_des
*/
typedef union { typedef union {
struct { struct {
/** main_timer_buf1_low : RO; bitpos: [31:0]; default: 0; uint32_t reserved0: 30;
* need_des uint32_t overflow : 1;
*/ uint32_t alarm : 1;
uint32_t main_timer_buf1_low:32;
}; };
uint32_t val; uint32_t val;
} lp_timer_main_buf1_low_reg_t; } lp_timer_lp_intr_reg_t;
/** Type of main_buf1_high register typedef volatile struct lp_timer_dev_t{
* need_des lp_timer_target_reg_t target[2];
*/ lp_timer_update_reg_t update;
typedef union { lp_timer_counter_reg_t counter[2];
struct { lp_timer_overflow_reg_t overflow;
/** main_timer_buf1_high : RO; bitpos: [15:0]; default: 0; lp_timer_intr_reg_t int_raw;
* need_des lp_timer_intr_reg_t int_st;
*/ lp_timer_intr_reg_t int_en;
uint32_t main_timer_buf1_high:16; lp_timer_intr_reg_t int_clr;
uint32_t reserved_16:16; lp_timer_lp_intr_reg_t lp_int_raw;
}; lp_timer_lp_intr_reg_t lp_int_st;
uint32_t val; lp_timer_lp_intr_reg_t lp_int_en;
} lp_timer_main_buf1_high_reg_t; lp_timer_lp_intr_reg_t lp_int_clr;
/** Type of main_overflow register uint32_t reserved[237];
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:31;
/** main_timer_alarm_load : WT; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_alarm_load:1;
};
uint32_t val;
} lp_timer_main_overflow_reg_t;
/** Type of int_raw register union {
* need_des struct {
*/ uint32_t date : 31;
typedef union { uint32_t clk_en: 1;
struct { };
uint32_t reserved_0:30; uint32_t val;
/** overflow_raw : R/WTC/SS; bitpos: [30]; default: 0; } date;
* need_des
*/
uint32_t overflow_raw:1;
/** soc_wakeup_int_raw : R/WTC/SS; bitpos: [31]; default: 0;
* need_des
*/
uint32_t soc_wakeup_int_raw:1;
};
uint32_t val;
} lp_timer_int_raw_reg_t;
/** Type of int_st register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** overflow_st : RO; bitpos: [30]; default: 0;
* need_des
*/
uint32_t overflow_st:1;
/** soc_wakeup_int_st : RO; bitpos: [31]; default: 0;
* need_des
*/
uint32_t soc_wakeup_int_st:1;
};
uint32_t val;
} lp_timer_int_st_reg_t;
/** Type of int_ena register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** overflow_ena : R/W; bitpos: [30]; default: 0;
* need_des
*/
uint32_t overflow_ena:1;
/** soc_wakeup_int_ena : R/W; bitpos: [31]; default: 0;
* need_des
*/
uint32_t soc_wakeup_int_ena:1;
};
uint32_t val;
} lp_timer_int_ena_reg_t;
/** Type of int_clr register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** overflow_clr : WT; bitpos: [30]; default: 0;
* need_des
*/
uint32_t overflow_clr:1;
/** soc_wakeup_int_clr : WT; bitpos: [31]; default: 0;
* need_des
*/
uint32_t soc_wakeup_int_clr:1;
};
uint32_t val;
} lp_timer_int_clr_reg_t;
/** Type of lp_int_raw register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** main_timer_overflow_lp_int_raw : R/WTC/SS; bitpos: [30]; default: 0;
* need_des
*/
uint32_t main_timer_overflow_lp_int_raw:1;
/** main_timer_lp_int_raw : R/WTC/SS; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_lp_int_raw:1;
};
uint32_t val;
} lp_timer_lp_int_raw_reg_t;
/** Type of lp_int_st register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** main_timer_overflow_lp_int_st : RO; bitpos: [30]; default: 0;
* need_des
*/
uint32_t main_timer_overflow_lp_int_st:1;
/** main_timer_lp_int_st : RO; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_lp_int_st:1;
};
uint32_t val;
} lp_timer_lp_int_st_reg_t;
/** Type of lp_int_ena register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** main_timer_overflow_lp_int_ena : R/W; bitpos: [30]; default: 0;
* need_des
*/
uint32_t main_timer_overflow_lp_int_ena:1;
/** main_timer_lp_int_ena : R/W; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_lp_int_ena:1;
};
uint32_t val;
} lp_timer_lp_int_ena_reg_t;
/** Type of lp_int_clr register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:30;
/** main_timer_overflow_lp_int_clr : WT; bitpos: [30]; default: 0;
* need_des
*/
uint32_t main_timer_overflow_lp_int_clr:1;
/** main_timer_lp_int_clr : WT; bitpos: [31]; default: 0;
* need_des
*/
uint32_t main_timer_lp_int_clr:1;
};
uint32_t val;
} lp_timer_lp_int_clr_reg_t;
/** Type of date register
* need_des
*/
typedef union {
struct {
/** date : R/W; bitpos: [30:0]; default: 34672976;
* need_des
*/
uint32_t date:31;
/** clk_en : R/W; bitpos: [31]; default: 0;
* need_des
*/
uint32_t clk_en:1;
};
uint32_t val;
} lp_timer_date_reg_t;
typedef struct lp_timer_dev_t {
volatile lp_timer_tar0_low_reg_t tar0_low;
volatile lp_timer_tar0_high_reg_t tar0_high;
volatile lp_timer_tar1_low_reg_t tar1_low;
volatile lp_timer_tar1_high_reg_t tar1_high;
volatile lp_timer_update_reg_t update;
volatile lp_timer_main_buf0_low_reg_t main_buf0_low;
volatile lp_timer_main_buf0_high_reg_t main_buf0_high;
volatile lp_timer_main_buf1_low_reg_t main_buf1_low;
volatile lp_timer_main_buf1_high_reg_t main_buf1_high;
volatile lp_timer_main_overflow_reg_t main_overflow;
volatile lp_timer_int_raw_reg_t int_raw;
volatile lp_timer_int_st_reg_t int_st;
volatile lp_timer_int_ena_reg_t int_ena;
volatile lp_timer_int_clr_reg_t int_clr;
volatile lp_timer_lp_int_raw_reg_t lp_int_raw;
volatile lp_timer_lp_int_st_reg_t lp_int_st;
volatile lp_timer_lp_int_ena_reg_t lp_int_ena;
volatile lp_timer_lp_int_clr_reg_t lp_int_clr;
uint32_t reserved_048[237];
volatile lp_timer_date_reg_t date;
} lp_timer_dev_t; } lp_timer_dev_t;
extern lp_timer_dev_t LP_TIMER; extern lp_timer_dev_t LP_TIMER;