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esp32: Add KConfig option to disable ROM Console fallback on first boot
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@ -48,6 +48,16 @@ void esp_efuse_burn_new_values(void);
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*/
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*/
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void esp_efuse_reset(void);
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void esp_efuse_reset(void);
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/* @brief Disable BASIC ROM Console via efuse
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*
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* By default, if booting from flash fails the ESP32 will boot a
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* BASIC console in ROM.
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*
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* Call this function (from bootloader or app) to permanently
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* disable the console on this chip.
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*/
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void esp_efuse_disable_basic_rom_console(void);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -12,6 +12,7 @@
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// See the License for the specific language governing permissions and
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// limitations under the License.
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#include "esp_efuse.h"
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#include "esp_efuse.h"
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#include "esp_log.h"
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#define EFUSE_CONF_WRITE 0x5A5A /* efuse_pgm_op_ena, force no rd/wr disable */
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#define EFUSE_CONF_WRITE 0x5A5A /* efuse_pgm_op_ena, force no rd/wr disable */
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#define EFUSE_CONF_READ 0x5AA5 /* efuse_read_op_ena, release force */
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#define EFUSE_CONF_READ 0x5AA5 /* efuse_read_op_ena, release force */
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@ -19,6 +20,8 @@
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#define EFUSE_CMD_PGM 0x02
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#define EFUSE_CMD_PGM 0x02
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#define EFUSE_CMD_READ 0x01
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#define EFUSE_CMD_READ 0x01
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static const char *TAG = "efuse";
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void esp_efuse_burn_new_values(void)
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void esp_efuse_burn_new_values(void)
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{
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{
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REG_WRITE(EFUSE_CONF_REG, EFUSE_CONF_WRITE);
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REG_WRITE(EFUSE_CONF_REG, EFUSE_CONF_WRITE);
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@ -45,3 +48,13 @@ void esp_efuse_reset(void)
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}
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}
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}
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}
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}
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}
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void esp_efuse_disable_basic_rom_console(void)
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{
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if ((REG_READ(EFUSE_BLK0_RDATA6_REG) & EFUSE_RD_CONSOLE_DEBUG_DISABLE) == 0) {
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ESP_EARLY_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
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esp_efuse_reset();
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REG_WRITE(EFUSE_BLK0_WDATA6_REG, EFUSE_RD_CONSOLE_DEBUG_DISABLE);
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esp_efuse_burn_new_values();
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}
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}
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@ -604,6 +604,18 @@ config ESP32_XTAL_FREQ
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default 40 if ESP32_XTAL_FREQ_40
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default 40 if ESP32_XTAL_FREQ_40
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default 26 if ESP32_XTAL_FREQ_26
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default 26 if ESP32_XTAL_FREQ_26
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config DISABLE_BASIC_ROM_CONSOLE
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bool "Permanently disable BASIC ROM Console"
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default n
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help
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If set, the first time the app boots it will disable the BASIC ROM Console
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permanently (by burning an efuse).
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Otherwise, the BASIC ROM Console starts on reset if no valid bootloader is
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read from the flash.
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(Enabling secure boot also disables the BASIC ROM Console by default.)
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config NO_BLOBS
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config NO_BLOBS
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bool "No Binary Blobs"
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bool "No Binary Blobs"
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depends on !BT_ENABLED
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depends on !BT_ENABLED
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@ -624,7 +636,7 @@ config ESP_TIMER_PROFILING
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used for timer storage, and should only be used for debugging/testing
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used for timer storage, and should only be used for debugging/testing
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purposes.
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purposes.
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endmenu
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endmenu # ESP32-Specific
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menu Wi-Fi
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menu Wi-Fi
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@ -748,10 +760,10 @@ config ESP32_WIFI_NVS_ENABLED
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help
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help
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Select this option to enable WiFi NVS flash
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Select this option to enable WiFi NVS flash
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endmenu
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endmenu # Wi-Fi
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menu Phy
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menu Phy
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config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
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config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
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bool "Do phy calibration and store calibration data in NVS"
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bool "Do phy calibration and store calibration data in NVS"
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default y
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default y
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@ -790,4 +802,4 @@ config ESP32_PHY_MAX_TX_POWER
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int
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int
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default ESP32_PHY_MAX_WIFI_TX_POWER
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default ESP32_PHY_MAX_WIFI_TX_POWER
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endmenu
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endmenu # PHY
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@ -62,6 +62,7 @@
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#include "esp_panic.h"
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#include "esp_panic.h"
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#include "esp_core_dump.h"
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#include "esp_core_dump.h"
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#include "esp_app_trace.h"
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#include "esp_app_trace.h"
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#include "esp_efuse.h"
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#include "esp_clk.h"
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#include "esp_clk.h"
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#include "esp_timer.h"
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#include "esp_timer.h"
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#include "trax.h"
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#include "trax.h"
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@ -244,6 +245,9 @@ void start_cpu0_default(void)
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#endif
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#endif
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#if CONFIG_BROWNOUT_DET
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#if CONFIG_BROWNOUT_DET
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esp_brownout_init();
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esp_brownout_init();
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#endif
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#if CONFIG_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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#endif
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rtc_gpio_force_hold_dis_all();
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rtc_gpio_force_hold_dis_all();
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esp_vfs_dev_uart_register();
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esp_vfs_dev_uart_register();
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