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Merge branch 'feat/add_dedic_gpio_support_on_c61' into 'master'
feat(dedic_gpio): support dedic gpio on esp32c61 Closes IDF-9321 See merge request espressif/esp-idf!32688
This commit is contained in:
commit
1b0fb462b6
@ -1,2 +1,2 @@
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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55
components/hal/esp32c61/include/hal/dedic_gpio_cpu_ll.h
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55
components/hal/esp32c61/include/hal/dedic_gpio_cpu_ll.h
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "riscv/csr.h"
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/*fast gpio*/
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#define CSR_GPIO_OEN_USER 0x803
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#define CSR_GPIO_IN_USER 0x804
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#define CSR_GPIO_OUT_USER 0x805
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#ifdef __cplusplus
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extern "C" {
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#endif
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__attribute__((always_inline))
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static inline void dedic_gpio_cpu_ll_enable_output(uint32_t mask)
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{
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RV_WRITE_CSR(CSR_GPIO_OEN_USER, mask);
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}
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static inline void dedic_gpio_cpu_ll_write_all(uint32_t value)
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{
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RV_WRITE_CSR(CSR_GPIO_OUT_USER, value);
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}
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__attribute__((always_inline))
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static inline uint32_t dedic_gpio_cpu_ll_read_in(void)
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{
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uint32_t value = RV_READ_CSR(CSR_GPIO_IN_USER);
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return value;
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}
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__attribute__((always_inline))
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static inline uint32_t dedic_gpio_cpu_ll_read_out(void)
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{
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uint32_t value = RV_READ_CSR(CSR_GPIO_OUT_USER);
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return value;
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}
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__attribute__((always_inline))
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static inline void dedic_gpio_cpu_ll_write_mask(uint32_t mask, uint32_t value)
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{
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RV_SET_CSR(CSR_GPIO_OUT_USER, mask & value);
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RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value));
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}
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#ifdef __cplusplus
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}
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#endif
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36
components/soc/esp32c61/dedic_gpio_periph.c
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36
components/soc/esp32c61/dedic_gpio_periph.c
Normal file
@ -0,0 +1,36 @@
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/gpio_sig_map.h"
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#include "soc/dedic_gpio_periph.h"
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const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = {
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.irq = -1,
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.cores = {
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[0] = {
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.in_sig_per_channel = {
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[0] = CPU_GPIO_IN0_IDX,
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[1] = CPU_GPIO_IN1_IDX,
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[2] = CPU_GPIO_IN2_IDX,
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[3] = CPU_GPIO_IN3_IDX,
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[4] = CPU_GPIO_IN4_IDX,
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[5] = CPU_GPIO_IN5_IDX,
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[6] = CPU_GPIO_IN6_IDX,
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[7] = CPU_GPIO_IN7_IDX,
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},
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.out_sig_per_channel = {
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[0] = CPU_GPIO_OUT0_IDX,
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[1] = CPU_GPIO_OUT1_IDX,
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[2] = CPU_GPIO_OUT2_IDX,
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[3] = CPU_GPIO_OUT3_IDX,
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[4] = CPU_GPIO_OUT4_IDX,
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[5] = CPU_GPIO_OUT5_IDX,
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[6] = CPU_GPIO_OUT6_IDX,
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[7] = CPU_GPIO_OUT7_IDX,
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}
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},
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},
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};
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@ -3,6 +3,10 @@
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# using gen_soc_caps_kconfig.py, do not edit manually
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#####################################################
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config SOC_DEDICATED_GPIO_SUPPORTED
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bool
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default y
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config SOC_UART_SUPPORTED
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bool
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default y
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@ -18,7 +18,7 @@
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/*-------------------------- COMMON CAPS ---------------------------------------*/
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// \#define SOC_ADC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304
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// \#define SOC_DEDICATED_GPIO_SUPPORTED 1 //TODO: [ESP32C61] IDF-9321
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#define SOC_DEDICATED_GPIO_SUPPORTED 1
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#define SOC_UART_SUPPORTED 1
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// \#define SOC_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
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// \#define SOC_AHB_GDMA_SUPPORTED 1 //TODO: [ESP32C61] IDF-9310, IDF-9311
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@ -79,11 +79,9 @@ api-reference/peripherals/spi_flash/spi_flash_override_driver.rst
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api-reference/peripherals/spi_flash/spi_flash_optional_feature.rst
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api-reference/peripherals/spi_flash/spi_flash_idf_vs_rom.rst
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api-reference/peripherals/spi_flash/index.rst
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api-reference/peripherals/sdm.rst
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api-reference/peripherals/touch_pad.rst
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api-reference/peripherals/adc_calibration.rst
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api-reference/peripherals/spi_slave_hd.rst
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api-reference/peripherals/dedic_gpio.rst
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api-reference/peripherals/sd_pullup_requirements.rst
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api-reference/peripherals/spi_master.rst
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api-reference/peripherals/index.rst
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@ -1,5 +1,5 @@
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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# Example: Software I2C Master via Dedicated/Fast GPIOs
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 |
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| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 |
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| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- |
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# Example: SPI software emulation using dedicated/fast GPIOs
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |
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# Example: UART software emulation using dedicated/fast GPIOs
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