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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'bugfix/clear_lp_sw_trigger_int_before_sleep_v5.2' into 'release/v5.2'
feat(ulp): add api to get lp_cpu wakeup cause and clear wakeup source at startup(v5.2) See merge request espressif/esp-idf!28146
This commit is contained in:
commit
194343e056
@ -11,6 +11,7 @@
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#include <stdbool.h>
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#include "hal/assert.h"
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#include "hal/misc.h"
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#include "hal/lp_aon_ll.h"
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#include "soc/soc_etm_struct.h"
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#include "soc/pcr_struct.h"
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@ -112,6 +113,10 @@ static inline void etm_ll_channel_set_task(soc_etm_dev_t *hw, uint32_t chan, uin
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hw->channel[chan].task_id.task_id = task;
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}
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#define etm_ll_is_lpcore_wakeup_triggered() lp_aon_ll_get_lpcore_etm_wakeup_flag()
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#define etm_ll_clear_lpcore_wakeup_status() lp_aon_ll_clear_lpcore_etm_wakeup_flag()
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#ifdef __cplusplus
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}
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#endif
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@ -85,6 +85,24 @@ static inline void lp_aon_ll_inform_wakeup_type(bool dslp)
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}
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}
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/**
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* @brief Get the flag that marks whether LP CPU is awakened by ETM
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*
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* @return Return true if lpcore is woken up by soc_etm
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*/
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static inline bool lp_aon_ll_get_lpcore_etm_wakeup_flag(void)
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{
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return REG_GET_BIT(LP_AON_LPCORE_REG, LP_AON_LPCORE_ETM_WAKEUP_FLAG);
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}
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/**
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* @brief Clear the flag that marks whether LP CPU is awakened by soc_etm
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*/
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static inline void lp_aon_ll_clear_lpcore_etm_wakeup_flag(void)
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{
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REG_SET_BIT(LP_AON_LPCORE_REG, LP_AON_LPCORE_ETM_WAKEUP_FLAG_CLR);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -12,6 +12,7 @@
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#include "soc/soc.h"
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#include "soc/rtc.h"
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#include "soc/lp_timer_struct.h"
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#include "soc/lp_timer_reg.h"
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#include "soc/lp_aon_reg.h"
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#include "hal/lp_timer_types.h"
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#include "esp_attr.h"
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@ -61,6 +62,16 @@ FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *de
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dev->lp_int_clr.alarm = 1;
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}
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FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_lp_intr_raw(lp_timer_dev_t *dev)
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{
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return dev->lp_int_raw.val;
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}
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FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uint32_t mask)
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{
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dev->lp_int_clr.val = mask;
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}
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FORCE_INLINE_ATTR uint64_t lp_timer_ll_time_to_count(uint64_t time_in_us)
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{
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uint32_t slow_clk_value = REG_READ(LP_AON_STORE1_REG);
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@ -531,6 +531,16 @@ FORCE_INLINE_ATTR uint32_t pmu_ll_hp_get_reject_cause(pmu_dev_t *hw)
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return hw->wakeup.status1;
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}
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FORCE_INLINE_ATTR uint32_t pmu_ll_lp_get_interrupt_raw(pmu_dev_t *hw)
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{
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return hw->lp_ext.int_raw.val;
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}
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FORCE_INLINE_ATTR void pmu_ll_lp_clear_intsts_mask(pmu_dev_t *hw, uint32_t mask)
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{
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hw->lp_ext.int_clr.val = mask;
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}
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FORCE_INLINE_ATTR void pmu_ll_lp_set_min_sleep_cycle(pmu_dev_t *hw, uint32_t slow_clk_cycle)
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{
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hw->wakeup.cntl3.lp_min_slp_val = slow_clk_cycle;
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@ -13,6 +13,19 @@ extern "C" {
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#include <stdint.h>
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#include <stdlib.h>
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/**
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* @brief Traverse all possible wake-up sources and update the wake-up cause so that
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* ulp_lp_core_get_wakeup_cause can obtain the bitmap of the wake-up reasons.
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*/
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void ulp_lp_core_update_wakeup_cause(void);
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/**
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* @brief Get the wakeup source which caused LP_CPU to wakeup from sleep
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*
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* @return Wakeup cause in bit map, for the meaning of each bit, refer
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* to the definition of wakeup source in lp_core_ll.h
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*/
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uint32_t ulp_lp_core_get_wakeup_cause(void);
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/**
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* @brief Wakeup main CPU from sleep or deep sleep.
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@ -14,6 +14,8 @@ extern void main();
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/* Initialize lp core related system functions before calling user's main*/
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void lp_core_startup()
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{
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ulp_lp_core_update_wakeup_cause();
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main();
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ulp_lp_core_memory_shared_cfg_t* shared_mem = ulp_lp_core_memory_shared_cfg_get();
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@ -9,10 +9,57 @@
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#include "riscv/csr.h"
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#include "soc/soc.h"
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#include "soc/pmu_reg.h"
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#include "hal/misc.h"
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#include "ulp_lp_core.h"
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#include "hal/etm_ll.h"
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#include "hal/lp_timer_ll.h"
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#include "hal/pmu_ll.h"
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#include "hal/uart_ll.h"
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#include "hal/rtc_io_ll.h"
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/* LP_FAST_CLK is not very accurate, for now use a rough estimate */
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#define LP_CORE_CPU_FREQUENCY_HZ 16000000
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static uint32_t lp_wakeup_cause = 0;
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void ulp_lp_core_update_wakeup_cause(void)
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{
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if ((REG_GET_FIELD(PMU_LP_CPU_PWR1_REG, PMU_LP_CPU_WAKEUP_EN) & ULP_LP_CORE_WAKEUP_SOURCE_HP_CPU) \
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&& (pmu_ll_lp_get_interrupt_raw(&PMU) & PMU_HP_SW_TRIGGER_INT_RAW)) {
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lp_wakeup_cause |= ULP_LP_CORE_WAKEUP_SOURCE_HP_CPU;
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pmu_ll_lp_clear_intsts_mask(&PMU, PMU_HP_SW_TRIGGER_INT_CLR);
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}
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if ((REG_GET_FIELD(PMU_LP_CPU_PWR1_REG, PMU_LP_CPU_WAKEUP_EN) & ULP_LP_CORE_WAKEUP_SOURCE_LP_UART) \
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&& (uart_ll_get_intraw_mask(&LP_UART) & LP_UART_WAKEUP_INT_RAW)) {
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lp_wakeup_cause |= ULP_LP_CORE_WAKEUP_SOURCE_LP_UART;
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uart_ll_clr_intsts_mask(&LP_UART, LP_UART_WAKEUP_INT_CLR);
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}
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if ((REG_GET_FIELD(PMU_LP_CPU_PWR1_REG, PMU_LP_CPU_WAKEUP_EN) & ULP_LP_CORE_WAKEUP_SOURCE_LP_IO) \
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&& rtcio_ll_get_interrupt_status()) {
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lp_wakeup_cause |= ULP_LP_CORE_WAKEUP_SOURCE_LP_IO;
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rtcio_ll_clear_interrupt_status();
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}
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if ((REG_GET_FIELD(PMU_LP_CPU_PWR1_REG, PMU_LP_CPU_WAKEUP_EN) & ULP_LP_CORE_WAKEUP_SOURCE_ETM) \
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&& etm_ll_is_lpcore_wakeup_triggered()) {
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lp_wakeup_cause |= ULP_LP_CORE_WAKEUP_SOURCE_ETM;
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etm_ll_clear_lpcore_wakeup_status();
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}
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if ((REG_GET_FIELD(PMU_LP_CPU_PWR1_REG, PMU_LP_CPU_WAKEUP_EN) & ULP_LP_CORE_WAKEUP_SOURCE_LP_TIMER) \
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&& (lp_timer_ll_get_lp_intr_raw(&LP_TIMER) & LP_TIMER_MAIN_TIMER_LP_INT_RAW)) {
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lp_wakeup_cause |= ULP_LP_CORE_WAKEUP_SOURCE_LP_TIMER;
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lp_timer_ll_clear_lp_intsts_mask(&LP_TIMER, LP_TIMER_MAIN_TIMER_LP_INT_CLR);
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}
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}
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uint32_t ulp_lp_core_get_wakeup_cause()
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{
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return lp_wakeup_cause;
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}
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/**
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* @brief Wakeup main CPU from sleep or deep sleep.
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*
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