From 17fc026c482efdc27890b1979d01f18a0e5de5ae Mon Sep 17 00:00:00 2001 From: Armando Date: Sun, 8 Sep 2024 10:04:31 +0800 Subject: [PATCH] fix(pma): fixed pma 15 occupied by rom on c5 issue --- components/esp_hw_support/port/esp32c5/cpu_region_protect.c | 2 ++ components/riscv/include/riscv/csr.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/components/esp_hw_support/port/esp32c5/cpu_region_protect.c b/components/esp_hw_support/port/esp32c5/cpu_region_protect.c index cd054372da..95055058c4 100644 --- a/components/esp_hw_support/port/esp32c5/cpu_region_protect.c +++ b/components/esp_hw_support/port/esp32c5/cpu_region_protect.c @@ -69,6 +69,8 @@ static void esp_cpu_configure_invalid_regions(void) // 8. End of address space PMA_ENTRY_SET_TOR(14, SOC_PERIPHERAL_HIGH, PMA_NONE); + + PMA_ENTRY_CFG_RESET(15); PMA_ENTRY_SET_TOR(15, UINT32_MAX, PMA_TOR | PMA_NONE); } diff --git a/components/riscv/include/riscv/csr.h b/components/riscv/include/riscv/csr.h index f393f635ac..5640151c75 100644 --- a/components/riscv/include/riscv/csr.h +++ b/components/riscv/include/riscv/csr.h @@ -136,6 +136,12 @@ extern "C" { RV_CLEAR_CSR((CSR_PMPCFG0) + (ENTRY)/4, (0xFF) << (ENTRY%4)*8); \ } while(0) +/*Reset all permissions of a particular PMACFG entry*/ +#define PMA_ENTRY_CFG_RESET(ENTRY) do {\ + RV_WRITE_CSR((CSR_PMACFG0) + (ENTRY) , 0); \ + RV_WRITE_CSR((CSR_PMAADDR0) + (ENTRY) , 0); \ + } while(0) + /******************************************************** Trigger Module register fields (Debug specification) ********************************************************/